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GET /api/patches/55710/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 55710,
    "url": "http://patches.dpdk.org/api/patches/55710/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190630180609.36705-42-jerinj@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190630180609.36705-42-jerinj@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190630180609.36705-42-jerinj@marvell.com",
    "date": "2019-06-30T18:05:53",
    "name": "[v2,41/57] net/octeontx2: add flow init and fini",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "2dc9537ee7ebdb6676108a4b0c61394ae6badb5d",
    "submitter": {
        "id": 1188,
        "url": "http://patches.dpdk.org/api/people/1188/?format=api",
        "name": "Jerin Jacob Kollanukkaran",
        "email": "jerinj@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190630180609.36705-42-jerinj@marvell.com/mbox/",
    "series": [
        {
            "id": 5236,
            "url": "http://patches.dpdk.org/api/series/5236/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5236",
            "date": "2019-06-30T18:05:12",
            "name": "OCTEON TX2 Ethdev driver",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/5236/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/55710/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/55710/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 6DA151BB71;\n\tSun, 30 Jun 2019 20:10:27 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id EB85A1BACC\n\tfor <dev@dpdk.org>; Sun, 30 Jun 2019 20:08:38 +0200 (CEST)",
            "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx5UI6of3016863 for <dev@dpdk.org>; Sun, 30 Jun 2019 11:08:38 -0700",
            "from sc-exch03.marvell.com ([199.233.58.183])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2te7gm3ydp-2\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Sun, 30 Jun 2019 11:08:38 -0700",
            "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSun, 30 Jun 2019 11:08:37 -0700",
            "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sun, 30 Jun 2019 11:08:37 -0700",
            "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id 78E753F703F;\n\tSun, 30 Jun 2019 11:08:35 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=yzUiCTKHp5ob/Ke/Qv/kU/mA2qHPyURFTMwYTfq2vMk=;\n\tb=AHX0xCgaUU/ynFX+zgwtUZr/r4dPDFRMMLOOWoY8eYnS0bj31D8sKn9zDPwthXVUcZiJ\n\tS/UtcFZCvnjSL6h7Gz51+p8e1LbCcmjoFbfvYWOea/f3BpLcNu9atPUR+8Pl7D6NSEhf\n\te0i3zPp1kSUz5upY6/3bUH41+aBtchnTHIUu+kfBKONIclK98VecJcYHOmyhMU+9JsZe\n\t7pqIpGUNS8C+hmGAC5GFkar8RKjtrKS0Us2cr/uv/vV0CrX0ggfeE0Assn5Hgv6xo+bt\n\tQfGMtShNz40MKNeiV1peQtkYtcg05EhM0qvnfppx6Fu9Yvxk+PAy6d9SCY7OqScRUcuf\n\tkA== ",
        "From": "<jerinj@marvell.com>",
        "To": "<dev@dpdk.org>, Jerin Jacob <jerinj@marvell.com>, Nithin Dabilpuram\n\t<ndabilpuram@marvell.com>, Kiran Kumar K <kirankumark@marvell.com>",
        "CC": "Vivek Sharma <viveksharma@marvell.com>",
        "Date": "Sun, 30 Jun 2019 23:35:53 +0530",
        "Message-ID": "<20190630180609.36705-42-jerinj@marvell.com>",
        "X-Mailer": "git-send-email 2.21.0",
        "In-Reply-To": "<20190630180609.36705-1-jerinj@marvell.com>",
        "References": "<20190602152434.23996-1-jerinj@marvell.com>\n\t<20190630180609.36705-1-jerinj@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-30_08:, , signatures=0",
        "Subject": "[dpdk-dev] [PATCH v2 41/57] net/octeontx2: add flow init and fini",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Kiran Kumar K <kirankumark@marvell.com>\n\nAdding the flow init and fini functionality. These will be called from\ndev init and will initialize and de-initialize the flow related memory.\n\nSigned-off-by: Kiran Kumar K <kirankumark@marvell.com>\nSigned-off-by: Vivek Sharma <viveksharma@marvell.com>\n---\n drivers/net/octeontx2/otx2_flow.c | 315 ++++++++++++++++++++++++++++++\n 1 file changed, 315 insertions(+)",
    "diff": "diff --git a/drivers/net/octeontx2/otx2_flow.c b/drivers/net/octeontx2/otx2_flow.c\nindex 24bde623d..94bd85161 100644\n--- a/drivers/net/octeontx2/otx2_flow.c\n+++ b/drivers/net/octeontx2/otx2_flow.c\n@@ -655,3 +655,318 @@ const struct rte_flow_ops otx2_flow_ops = {\n \t.query = otx2_flow_query,\n \t.isolate = otx2_flow_isolate,\n };\n+\n+static int\n+flow_supp_key_len(uint32_t supp_mask)\n+{\n+\tint nib_count = 0;\n+\twhile (supp_mask) {\n+\t\tnib_count++;\n+\t\tsupp_mask &= (supp_mask - 1);\n+\t}\n+\treturn nib_count * 4;\n+}\n+\n+/* Refer HRM register:\n+ * NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG\n+ * and\n+ * NPC_AF_INTF(0..1)_LDATA(0..1)_FLAGS(0..15)_CFG\n+ **/\n+#define BYTESM1_SHIFT\t16\n+#define HDR_OFF_SHIFT\t8\n+static void\n+flow_update_kex_info(struct npc_xtract_info *xtract_info,\n+\t\t     uint64_t val)\n+{\n+\txtract_info->len = ((val >> BYTESM1_SHIFT) & 0xf) + 1;\n+\txtract_info->hdr_off = (val >> HDR_OFF_SHIFT) & 0xff;\n+\txtract_info->key_off = val & 0x3f;\n+\txtract_info->enable = ((val >> 7) & 0x1);\n+}\n+\n+static void\n+flow_process_mkex_cfg(struct otx2_npc_flow_info *npc,\n+\t\t      struct npc_get_kex_cfg_rsp *kex_rsp)\n+{\n+\tvolatile uint64_t (*q)[NPC_MAX_INTF][NPC_MAX_LID][NPC_MAX_LT]\n+\t\t[NPC_MAX_LD];\n+\tstruct npc_xtract_info *x_info = NULL;\n+\tint lid, lt, ld, fl, ix;\n+\totx2_dxcfg_t *p;\n+\tuint64_t keyw;\n+\tuint64_t val;\n+\n+\tnpc->keyx_supp_nmask[NPC_MCAM_RX] =\n+\t\tkex_rsp->rx_keyx_cfg & 0x7fffffffULL;\n+\tnpc->keyx_supp_nmask[NPC_MCAM_TX] =\n+\t\tkex_rsp->tx_keyx_cfg & 0x7fffffffULL;\n+\tnpc->keyx_len[NPC_MCAM_RX] =\n+\t\tflow_supp_key_len(npc->keyx_supp_nmask[NPC_MCAM_RX]);\n+\tnpc->keyx_len[NPC_MCAM_TX] =\n+\t\tflow_supp_key_len(npc->keyx_supp_nmask[NPC_MCAM_TX]);\n+\n+\tkeyw = (kex_rsp->rx_keyx_cfg >> 32) & 0x7ULL;\n+\tnpc->keyw[NPC_MCAM_RX] = keyw;\n+\tkeyw = (kex_rsp->tx_keyx_cfg >> 32) & 0x7ULL;\n+\tnpc->keyw[NPC_MCAM_TX] = keyw;\n+\n+\t/* Update KEX_LD_FLAG */\n+\tfor (ix = 0; ix < NPC_MAX_INTF; ix++) {\n+\t\tfor (ld = 0; ld < NPC_MAX_LD; ld++) {\n+\t\t\tfor (fl = 0; fl < NPC_MAX_LFL; fl++) {\n+\t\t\t\tx_info =\n+\t\t\t\t    &npc->prx_fxcfg[ix][ld][fl].xtract[0];\n+\t\t\t\tval = kex_rsp->intf_ld_flags[ix][ld][fl];\n+\t\t\t\tflow_update_kex_info(x_info, val);\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\t/* Update LID, LT and LDATA cfg */\n+\tp = &npc->prx_dxcfg;\n+\tq = (volatile uint64_t (*)[][NPC_MAX_LID][NPC_MAX_LT][NPC_MAX_LD])\n+\t\t\t(&kex_rsp->intf_lid_lt_ld);\n+\tfor (ix = 0; ix < NPC_MAX_INTF; ix++) {\n+\t\tfor (lid = 0; lid < NPC_MAX_LID; lid++) {\n+\t\t\tfor (lt = 0; lt < NPC_MAX_LT; lt++) {\n+\t\t\t\tfor (ld = 0; ld < NPC_MAX_LD; ld++) {\n+\t\t\t\t\tx_info = &(*p)[ix][lid][lt].xtract[ld];\n+\t\t\t\t\tval = (*q)[ix][lid][lt][ld];\n+\t\t\t\t\tflow_update_kex_info(x_info, val);\n+\t\t\t\t}\n+\t\t\t}\n+\t\t}\n+\t}\n+\t/* Update LDATA Flags cfg */\n+\tnpc->prx_lfcfg[0].i = kex_rsp->kex_ld_flags[0];\n+\tnpc->prx_lfcfg[1].i = kex_rsp->kex_ld_flags[1];\n+}\n+\n+static struct otx2_idev_kex_cfg *\n+flow_intra_dev_kex_cfg(void)\n+{\n+\tstatic const char name[] = \"octeontx2_intra_device_kex_conf\";\n+\tstruct otx2_idev_kex_cfg *idev;\n+\tconst struct rte_memzone *mz;\n+\n+\tmz = rte_memzone_lookup(name);\n+\tif (mz)\n+\t\treturn mz->addr;\n+\n+\t/* Request for the first time */\n+\tmz = rte_memzone_reserve_aligned(name, sizeof(struct otx2_idev_kex_cfg),\n+\t\t\t\t\t SOCKET_ID_ANY, 0, OTX2_ALIGN);\n+\tif (mz) {\n+\t\tidev = mz->addr;\n+\t\trte_atomic16_set(&idev->kex_refcnt, 0);\n+\t\treturn idev;\n+\t}\n+\treturn NULL;\n+}\n+\n+static int\n+flow_fetch_kex_cfg(struct otx2_eth_dev *dev)\n+{\n+\tstruct otx2_npc_flow_info *npc = &dev->npc_flow;\n+\tstruct npc_get_kex_cfg_rsp *kex_rsp;\n+\tstruct otx2_mbox *mbox = dev->mbox;\n+\tstruct otx2_idev_kex_cfg *idev;\n+\tint rc = 0;\n+\n+\tidev = flow_intra_dev_kex_cfg();\n+\tif (!idev)\n+\t\treturn -ENOMEM;\n+\n+\t/* Is kex_cfg read by any another driver? */\n+\tif (rte_atomic16_add_return(&idev->kex_refcnt, 1) == 1) {\n+\t\t/* Call mailbox to get key & data size */\n+\t\t(void)otx2_mbox_alloc_msg_npc_get_kex_cfg(mbox);\n+\t\totx2_mbox_msg_send(mbox, 0);\n+\t\trc = otx2_mbox_get_rsp(mbox, 0, (void *)&kex_rsp);\n+\t\tif (rc) {\n+\t\t\totx2_err(\"Failed to fetch NPC keyx config\");\n+\t\t\tgoto done;\n+\t\t}\n+\t\tmemcpy(&idev->kex_cfg, kex_rsp,\n+\t\t       sizeof(struct npc_get_kex_cfg_rsp));\n+\t}\n+\n+\tflow_process_mkex_cfg(npc, &idev->kex_cfg);\n+\n+done:\n+\treturn rc;\n+}\n+\n+int\n+otx2_flow_init(struct otx2_eth_dev *hw)\n+{\n+\tuint8_t *mem = NULL, *nix_mem = NULL, *npc_mem = NULL;\n+\tstruct otx2_npc_flow_info *npc = &hw->npc_flow;\n+\tuint32_t bmap_sz;\n+\tint rc = 0, idx;\n+\n+\trc = flow_fetch_kex_cfg(hw);\n+\tif (rc) {\n+\t\totx2_err(\"Failed to fetch NPC keyx config from idev\");\n+\t\treturn rc;\n+\t}\n+\n+\trte_atomic32_init(&npc->mark_actions);\n+\n+\tnpc->mcam_entries = NPC_MCAM_TOT_ENTRIES >> npc->keyw[NPC_MCAM_RX];\n+\t/* Free, free_rev, live and live_rev entries */\n+\tbmap_sz = rte_bitmap_get_memory_footprint(npc->mcam_entries);\n+\tmem = rte_zmalloc(NULL, 4 * bmap_sz * npc->flow_max_priority,\n+\t\t\t  RTE_CACHE_LINE_SIZE);\n+\tif (mem == NULL) {\n+\t\totx2_err(\"Bmap alloc failed\");\n+\t\trc = -ENOMEM;\n+\t\treturn rc;\n+\t}\n+\n+\tnpc->flow_entry_info = rte_zmalloc(NULL, npc->flow_max_priority\n+\t\t\t\t\t   * sizeof(struct otx2_mcam_ents_info),\n+\t\t\t\t\t   0);\n+\tif (npc->flow_entry_info == NULL) {\n+\t\totx2_err(\"flow_entry_info alloc failed\");\n+\t\trc = -ENOMEM;\n+\t\tgoto err;\n+\t}\n+\n+\tnpc->free_entries = rte_zmalloc(NULL, npc->flow_max_priority\n+\t\t\t\t\t* sizeof(struct rte_bitmap),\n+\t\t\t\t\t0);\n+\tif (npc->free_entries == NULL) {\n+\t\totx2_err(\"free_entries alloc failed\");\n+\t\trc = -ENOMEM;\n+\t\tgoto err;\n+\t}\n+\n+\tnpc->free_entries_rev = rte_zmalloc(NULL, npc->flow_max_priority\n+\t\t\t\t\t* sizeof(struct rte_bitmap),\n+\t\t\t\t\t0);\n+\tif (npc->free_entries_rev == NULL) {\n+\t\totx2_err(\"free_entries_rev alloc failed\");\n+\t\trc = -ENOMEM;\n+\t\tgoto err;\n+\t}\n+\n+\tnpc->live_entries = rte_zmalloc(NULL, npc->flow_max_priority\n+\t\t\t\t\t* sizeof(struct rte_bitmap),\n+\t\t\t\t\t0);\n+\tif (npc->live_entries == NULL) {\n+\t\totx2_err(\"live_entries alloc failed\");\n+\t\trc = -ENOMEM;\n+\t\tgoto err;\n+\t}\n+\n+\tnpc->live_entries_rev = rte_zmalloc(NULL, npc->flow_max_priority\n+\t\t\t\t\t* sizeof(struct rte_bitmap),\n+\t\t\t\t\t0);\n+\tif (npc->live_entries_rev == NULL) {\n+\t\totx2_err(\"live_entries_rev alloc failed\");\n+\t\trc = -ENOMEM;\n+\t\tgoto err;\n+\t}\n+\n+\tnpc->flow_list = rte_zmalloc(NULL, npc->flow_max_priority\n+\t\t\t\t\t* sizeof(struct otx2_flow_list),\n+\t\t\t\t\t0);\n+\tif (npc->flow_list == NULL) {\n+\t\totx2_err(\"flow_list alloc failed\");\n+\t\trc = -ENOMEM;\n+\t\tgoto err;\n+\t}\n+\n+\tnpc_mem = mem;\n+\tfor (idx = 0; idx < npc->flow_max_priority; idx++) {\n+\t\tTAILQ_INIT(&npc->flow_list[idx]);\n+\n+\t\tnpc->free_entries[idx] =\n+\t\t\trte_bitmap_init(npc->mcam_entries, mem, bmap_sz);\n+\t\tmem += bmap_sz;\n+\n+\t\tnpc->free_entries_rev[idx] =\n+\t\t\trte_bitmap_init(npc->mcam_entries, mem, bmap_sz);\n+\t\tmem += bmap_sz;\n+\n+\t\tnpc->live_entries[idx] =\n+\t\t\trte_bitmap_init(npc->mcam_entries, mem, bmap_sz);\n+\t\tmem += bmap_sz;\n+\n+\t\tnpc->live_entries_rev[idx] =\n+\t\t\trte_bitmap_init(npc->mcam_entries, mem, bmap_sz);\n+\t\tmem += bmap_sz;\n+\n+\t\tnpc->flow_entry_info[idx].free_ent = 0;\n+\t\tnpc->flow_entry_info[idx].live_ent = 0;\n+\t\tnpc->flow_entry_info[idx].max_id = 0;\n+\t\tnpc->flow_entry_info[idx].min_id = ~(0);\n+\t}\n+\n+\tnpc->rss_grps = NIX_RSS_GRPS;\n+\n+\tbmap_sz = rte_bitmap_get_memory_footprint(npc->rss_grps);\n+\tnix_mem = rte_zmalloc(NULL, bmap_sz,  RTE_CACHE_LINE_SIZE);\n+\tif (nix_mem == NULL) {\n+\t\totx2_err(\"Bmap alloc failed\");\n+\t\trc = -ENOMEM;\n+\t\tgoto err;\n+\t}\n+\n+\tnpc->rss_grp_entries = rte_bitmap_init(npc->rss_grps, nix_mem, bmap_sz);\n+\n+\t/* Group 0 will be used for RSS,\n+\t * 1 -7 will be used for rte_flow RSS action\n+\t */\n+\trte_bitmap_set(npc->rss_grp_entries, 0);\n+\n+\treturn 0;\n+\n+err:\n+\tif (npc->flow_list)\n+\t\trte_free(npc->flow_list);\n+\tif (npc->live_entries_rev)\n+\t\trte_free(npc->live_entries_rev);\n+\tif (npc->live_entries)\n+\t\trte_free(npc->live_entries);\n+\tif (npc->free_entries_rev)\n+\t\trte_free(npc->free_entries_rev);\n+\tif (npc->free_entries)\n+\t\trte_free(npc->free_entries);\n+\tif (npc->flow_entry_info)\n+\t\trte_free(npc->flow_entry_info);\n+\tif (npc_mem)\n+\t\trte_free(npc_mem);\n+\tif (nix_mem)\n+\t\trte_free(nix_mem);\n+\treturn rc;\n+}\n+\n+int\n+otx2_flow_fini(struct otx2_eth_dev *hw)\n+{\n+\tstruct otx2_npc_flow_info *npc = &hw->npc_flow;\n+\tint rc;\n+\n+\trc = otx2_flow_free_all_resources(hw);\n+\tif (rc) {\n+\t\totx2_err(\"Error when deleting NPC MCAM entries, counters\");\n+\t\treturn rc;\n+\t}\n+\n+\tif (npc->flow_list)\n+\t\trte_free(npc->flow_list);\n+\tif (npc->live_entries_rev)\n+\t\trte_free(npc->live_entries_rev);\n+\tif (npc->live_entries)\n+\t\trte_free(npc->live_entries);\n+\tif (npc->free_entries_rev)\n+\t\trte_free(npc->free_entries_rev);\n+\tif (npc->free_entries)\n+\t\trte_free(npc->free_entries);\n+\tif (npc->flow_entry_info)\n+\t\trte_free(npc->flow_entry_info);\n+\n+\treturn 0;\n+}\n",
    "prefixes": [
        "v2",
        "41/57"
    ]
}