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GET /api/patches/54699/?format=api
{ "id": 54699, "url": "http://patches.dpdk.org/api/patches/54699/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190611155221.2703-41-leyi.rong@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190611155221.2703-41-leyi.rong@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190611155221.2703-41-leyi.rong@intel.com", "date": "2019-06-11T15:51:55", "name": "[v2,40/66] net/ice/base: use more efficient structures", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "dc1448f85177b418c633af3621d70335b85686e7", "submitter": { "id": 1204, "url": "http://patches.dpdk.org/api/people/1204/?format=api", "name": "Leyi Rong", "email": "leyi.rong@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190611155221.2703-41-leyi.rong@intel.com/mbox/", "series": [ { "id": 4981, "url": "http://patches.dpdk.org/api/series/4981/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4981", "date": "2019-06-11T15:51:15", "name": "shared code update", "version": 2, "mbox": "http://patches.dpdk.org/series/4981/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/54699/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/54699/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 164E71C59B;\n\tTue, 11 Jun 2019 17:55:12 +0200 (CEST)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby dpdk.org (Postfix) with ESMTP id C849A1C50C\n\tfor <dev@dpdk.org>; Tue, 11 Jun 2019 17:54:27 +0200 (CEST)", "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t11 Jun 2019 08:54:27 -0700", "from lrong-srv-03.sh.intel.com ([10.67.119.177])\n\tby orsmga001.jf.intel.com with ESMTP; 11 Jun 2019 08:54:26 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Leyi Rong <leyi.rong@intel.com>", "To": "qi.z.zhang@intel.com", "Cc": "dev@dpdk.org, Leyi Rong <leyi.rong@intel.com>,\n\tJesse Brandeburg <jesse.brandeburg@intel.com>,\n\tPaul M Stillwell Jr <paul.m.stillwell.jr@intel.com>", "Date": "Tue, 11 Jun 2019 23:51:55 +0800", "Message-Id": "<20190611155221.2703-41-leyi.rong@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20190611155221.2703-1-leyi.rong@intel.com>", "References": "<20190604054248.68510-1-leyi.rong@intel.com>\n\t<20190611155221.2703-1-leyi.rong@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 40/66] net/ice/base: use more efficient\n\tstructures", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Move a bunch of members around to make more efficient use of\nmemory, eliminating holes where possible. None of these members\nare hot path so cache line alignment is not very important here.\n\nSigned-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Leyi Rong <leyi.rong@intel.com>\n---\n drivers/net/ice/base/ice_controlq.h | 4 +--\n drivers/net/ice/base/ice_flex_type.h | 38 +++++++++++++---------------\n drivers/net/ice/base/ice_flow.c | 4 +--\n drivers/net/ice/base/ice_flow.h | 18 ++++++-------\n 4 files changed, 29 insertions(+), 35 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h\nindex 182db6754..21c8722e5 100644\n--- a/drivers/net/ice/base/ice_controlq.h\n+++ b/drivers/net/ice/base/ice_controlq.h\n@@ -81,6 +81,7 @@ struct ice_rq_event_info {\n /* Control Queue information */\n struct ice_ctl_q_info {\n \tenum ice_ctl_q qtype;\n+\tenum ice_aq_err rq_last_status;\t/* last status on receive queue */\n \tstruct ice_ctl_q_ring rq;\t/* receive queue */\n \tstruct ice_ctl_q_ring sq;\t/* send queue */\n \tu32 sq_cmd_timeout;\t\t/* send queue cmd write back timeout */\n@@ -88,10 +89,9 @@ struct ice_ctl_q_info {\n \tu16 num_sq_entries;\t\t/* send queue depth */\n \tu16 rq_buf_size;\t\t/* receive queue buffer size */\n \tu16 sq_buf_size;\t\t/* send queue buffer size */\n+\tenum ice_aq_err sq_last_status;\t/* last status on send queue */\n \tstruct ice_lock sq_lock;\t\t/* Send queue lock */\n \tstruct ice_lock rq_lock;\t\t/* Receive queue lock */\n-\tenum ice_aq_err sq_last_status;\t/* last status on send queue */\n-\tenum ice_aq_err rq_last_status;\t/* last status on receive queue */\n };\n \n #endif /* _ICE_CONTROLQ_H_ */\ndiff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h\nindex d23b2ae82..dca5cf285 100644\n--- a/drivers/net/ice/base/ice_flex_type.h\n+++ b/drivers/net/ice/base/ice_flex_type.h\n@@ -5,7 +5,7 @@\n #ifndef _ICE_FLEX_TYPE_H_\n #define _ICE_FLEX_TYPE_H_\n \n-#define ICE_FV_OFFSET_INVAL 0x1FF\n+#define ICE_FV_OFFSET_INVAL\t0x1FF\n \n #pragma pack(1)\n /* Extraction Sequence (Field Vector) Table */\n@@ -14,7 +14,6 @@ struct ice_fv_word {\n \tu16 off;\t\t/* Offset within the protocol header */\n \tu8 resvrd;\n };\n-\n #pragma pack()\n \n #define ICE_MAX_FV_WORDS 48\n@@ -367,7 +366,6 @@ struct ice_boost_key_value {\n \t__le16 hv_src_port_key;\n \tu8 tcam_search_key;\n };\n-\n #pragma pack()\n \n struct ice_boost_key {\n@@ -406,7 +404,6 @@ struct ice_xlt1_section {\n \t__le16 offset;\n \tu8 value[1];\n };\n-\n #pragma pack()\n \n #define ICE_XLT1_SIZE(n)\t(sizeof(struct ice_xlt1_section) + \\\n@@ -467,19 +464,19 @@ struct ice_tunnel_type_scan {\n \n struct ice_tunnel_entry {\n \tenum ice_tunnel_type type;\n-\tu8 valid;\n-\tu8 in_use;\n-\tu8 marked;\n \tu16 boost_addr;\n \tu16 port;\n \tstruct ice_boost_tcam_entry *boost_entry;\n+\tu8 valid;\n+\tu8 in_use;\n+\tu8 marked;\n };\n \n #define ICE_TUNNEL_MAX_ENTRIES\t16\n \n struct ice_tunnel_table {\n-\tu16 count;\n \tstruct ice_tunnel_entry tbl[ICE_TUNNEL_MAX_ENTRIES];\n+\tu16 count;\n };\n \n struct ice_pkg_es {\n@@ -511,13 +508,13 @@ struct ice_es {\n #define ICE_DEFAULT_PTG\t0\n \n struct ice_ptg_entry {\n-\tu8 in_use;\n \tstruct ice_ptg_ptype *first_ptype;\n+\tu8 in_use;\n };\n \n struct ice_ptg_ptype {\n-\tu8 ptg;\n \tstruct ice_ptg_ptype *next_ptype;\n+\tu8 ptg;\n };\n \n #define ICE_MAX_TCAM_PER_PROFILE\t8\n@@ -535,9 +532,9 @@ struct ice_prof_map {\n #define ICE_INVALID_TCAM\t0xFFFF\n \n struct ice_tcam_inf {\n+\tu16 tcam_idx;\n \tu8 ptg;\n \tu8 prof_id;\n-\tu16 tcam_idx;\n \tu8 in_use;\n };\n \n@@ -550,16 +547,16 @@ struct ice_vsig_prof {\n };\n \n struct ice_vsig_entry {\n-\tu8 in_use;\n \tstruct LIST_HEAD_TYPE prop_lst;\n \tstruct ice_vsig_vsi *first_vsi;\n+\tu8 in_use;\n };\n \n struct ice_vsig_vsi {\n+\tstruct ice_vsig_vsi *next_vsi;\n+\tu32 prop_mask;\n \tu16 changed;\n \tu16 vsig;\n-\tu32 prop_mask;\n-\tstruct ice_vsig_vsi *next_vsi;\n };\n \n #define ICE_XLT1_CNT\t1024\n@@ -567,11 +564,11 @@ struct ice_vsig_vsi {\n \n /* XLT1 Table */\n struct ice_xlt1 {\n-\tu32 sid;\n-\tu16 count;\n \tstruct ice_ptg_entry *ptg_tbl;\n \tstruct ice_ptg_ptype *ptypes;\n \tu8 *t;\n+\tu32 sid;\n+\tu16 count;\n };\n \n #define ICE_XLT2_CNT\t768\n@@ -591,11 +588,11 @@ struct ice_xlt1 {\n \n /* XLT2 Table */\n struct ice_xlt2 {\n-\tu32 sid;\n-\tu16 count;\n \tstruct ice_vsig_entry *vsig_tbl;\n \tstruct ice_vsig_vsi *vsis;\n \tu16 *t;\n+\tu32 sid;\n+\tu16 count;\n };\n \n /* Extraction sequence - list of match fields:\n@@ -641,21 +638,20 @@ struct ice_prof_id_section {\n \t__le16 count;\n \tstruct ice_prof_tcam_entry entry[1];\n };\n-\n #pragma pack()\n \n struct ice_prof_tcam {\n \tu32 sid;\n \tu16 count;\n \tu16 max_prof_id;\n-\tu8 cdid_bits; /* # cdid bits to use in key, 0, 2, 4, or 8 */\n \tstruct ice_prof_tcam_entry *t;\n+\tu8 cdid_bits; /* # cdid bits to use in key, 0, 2, 4, or 8 */\n };\n \n struct ice_prof_redir {\n+\tu8 *t;\n \tu32 sid;\n \tu16 count;\n-\tu8 *t;\n };\n \n /* Tables per block */\ndiff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c\nindex 36657a1a3..795abe98f 100644\n--- a/drivers/net/ice/base/ice_flow.c\n+++ b/drivers/net/ice/base/ice_flow.c\n@@ -284,10 +284,10 @@ static const u32 ice_ptypes_mac_il[] = {\n /* Manage parameters and info. used during the creation of a flow profile */\n struct ice_flow_prof_params {\n \tenum ice_block blk;\n-\tstruct ice_flow_prof *prof;\n-\n \tu16 entry_length; /* # of bytes formatted entry will require */\n \tu8 es_cnt;\n+\tstruct ice_flow_prof *prof;\n+\n \t/* For ACL, the es[0] will have the data of ICE_RX_MDID_PKT_FLAGS_15_0\n \t * This will give us the direction flags.\n \t */\ndiff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h\nindex 57514a078..715fd7471 100644\n--- a/drivers/net/ice/base/ice_flow.h\n+++ b/drivers/net/ice/base/ice_flow.h\n@@ -225,20 +225,18 @@ struct ice_flow_entry {\n \tstruct LIST_ENTRY_TYPE l_entry;\n \n \tu64 id;\n-\tu16 vsi_handle;\n-\tenum ice_flow_priority priority;\n \tstruct ice_flow_prof *prof;\n-\n+\t/* Action list */\n+\tstruct ice_flow_action *acts;\n \t/* Flow entry's content */\n-\tu16 entry_sz;\n \tvoid *entry;\n-\n-\t/* Action list */\n+\tenum ice_flow_priority priority;\n+\tu16 vsi_handle;\n+\tu16 entry_sz;\n \tu8 acts_cnt;\n-\tstruct ice_flow_action *acts;\n };\n \n-#define ICE_FLOW_ENTRY_HNDL(e)\t((unsigned long)e)\n+#define ICE_FLOW_ENTRY_HNDL(e)\t((u64)e)\n #define ICE_FLOW_ENTRY_PTR(h)\t((struct ice_flow_entry *)(h))\n \n struct ice_flow_prof {\n@@ -246,12 +244,13 @@ struct ice_flow_prof {\n \n \tu64 id;\n \tenum ice_flow_dir dir;\n+\tu8 segs_cnt;\n+\tu8 acts_cnt;\n \n \t/* Keep track of flow entries associated with this flow profile */\n \tstruct ice_lock entries_lock;\n \tstruct LIST_HEAD_TYPE entries;\n \n-\tu8 segs_cnt;\n \tstruct ice_flow_seg_info segs[ICE_FLOW_SEG_MAX];\n \n \t/* software VSI handles referenced by this flow profile */\n@@ -264,7 +263,6 @@ struct ice_flow_prof {\n \t} cfg;\n \n \t/* Default actions */\n-\tu8 acts_cnt;\n \tstruct ice_flow_action *acts;\n };\n \n", "prefixes": [ "v2", "40/66" ] }