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{
    "id": 54606,
    "url": "http://patches.dpdk.org/api/patches/54606/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1560152324-20538-11-git-send-email-arybchenko@solarflare.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1560152324-20538-11-git-send-email-arybchenko@solarflare.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1560152324-20538-11-git-send-email-arybchenko@solarflare.com",
    "date": "2019-06-10T07:38:25",
    "name": "[10/29] net/sfc/base: update MCDI headers",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "9e4a1f52e503011122180452a52532fc8e590e8b",
    "submitter": {
        "id": 607,
        "url": "http://patches.dpdk.org/api/people/607/?format=api",
        "name": "Andrew Rybchenko",
        "email": "arybchenko@solarflare.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1560152324-20538-11-git-send-email-arybchenko@solarflare.com/mbox/",
    "series": [
        {
            "id": 4965,
            "url": "http://patches.dpdk.org/api/series/4965/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4965",
            "date": "2019-06-10T07:38:19",
            "name": "net/sfc/base: update base driver",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/4965/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/54606/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/54606/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
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        "Received": [
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        ],
        "X-Virus-Scanned": "Proofpoint Essentials engine",
        "From": "Andrew Rybchenko <arybchenko@solarflare.com>",
        "To": "<dev@dpdk.org>",
        "Date": "Mon, 10 Jun 2019 08:38:25 +0100",
        "Message-ID": "<1560152324-20538-11-git-send-email-arybchenko@solarflare.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1560152324-20538-1-git-send-email-arybchenko@solarflare.com>",
        "References": "<1560152324-20538-1-git-send-email-arybchenko@solarflare.com>",
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        "Content-Type": "text/plain",
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        "X-MDID": "1560152337-AWNMInhbGBTh",
        "Subject": "[dpdk-dev] [PATCH 10/29] net/sfc/base: update MCDI headers",
        "X-BeenThere": "dev@dpdk.org",
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    },
    "content": "Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>\n---\n drivers/net/sfc/base/efx_regs_mcdi.h      | 1667 ++++++++++++++++++++++++++++-\n drivers/net/sfc/base/efx_regs_mcdi_aoe.h  |   13 +\n drivers/net/sfc/base/efx_regs_mcdi_strs.h |  174 +--\n 3 files changed, 1751 insertions(+), 103 deletions(-)",
    "diff": "diff --git a/drivers/net/sfc/base/efx_regs_mcdi.h b/drivers/net/sfc/base/efx_regs_mcdi.h\nindex bc44602..122a320 100644\n--- a/drivers/net/sfc/base/efx_regs_mcdi.h\n+++ b/drivers/net/sfc/base/efx_regs_mcdi.h\n@@ -725,6 +725,18 @@\n  * a module change.\n  */\n #define\tMCDI_EVENT_CODE_MODULECHANGE 0x21\n+/* enum: Notification that the sensors have been added and/or removed from the\n+ * sensor table. This event includes the new sensor table generation count, if\n+ * this does not match the driver's local copy it is expected to call\n+ * DYNAMIC_SENSORS_LIST to refresh it.\n+ */\n+#define\tMCDI_EVENT_CODE_DYNAMIC_SENSORS_CHANGE 0x22\n+/* enum: Notification that a sensor has changed state as a result of a reading\n+ * crossing a threshold. This is sent as two events, the first event contains\n+ * the handle and the sensor's state (in the SRC field), and the second\n+ * contains the value.\n+ */\n+#define\tMCDI_EVENT_CODE_DYNAMIC_SENSORS_STATE_CHANGE 0x23\n /* enum: Artificial event generated by host and posted via MC for test\n  * purposes.\n  */\n@@ -858,6 +870,24 @@\n #define\tMCDI_EVENT_MODULECHANGE_DATA_LEN 4\n #define\tMCDI_EVENT_MODULECHANGE_DATA_LBN 0\n #define\tMCDI_EVENT_MODULECHANGE_DATA_WIDTH 32\n+/* The new generation count after a sensor has been added or deleted. */\n+#define\tMCDI_EVENT_DYNAMIC_SENSORS_GENERATION_OFST 0\n+#define\tMCDI_EVENT_DYNAMIC_SENSORS_GENERATION_LEN 4\n+#define\tMCDI_EVENT_DYNAMIC_SENSORS_GENERATION_LBN 0\n+#define\tMCDI_EVENT_DYNAMIC_SENSORS_GENERATION_WIDTH 32\n+/* The handle of a dynamic sensor. */\n+#define\tMCDI_EVENT_DYNAMIC_SENSORS_HANDLE_OFST 0\n+#define\tMCDI_EVENT_DYNAMIC_SENSORS_HANDLE_LEN 4\n+#define\tMCDI_EVENT_DYNAMIC_SENSORS_HANDLE_LBN 0\n+#define\tMCDI_EVENT_DYNAMIC_SENSORS_HANDLE_WIDTH 32\n+/* The current values of a sensor. */\n+#define\tMCDI_EVENT_DYNAMIC_SENSORS_VALUE_OFST 0\n+#define\tMCDI_EVENT_DYNAMIC_SENSORS_VALUE_LEN 4\n+#define\tMCDI_EVENT_DYNAMIC_SENSORS_VALUE_LBN 0\n+#define\tMCDI_EVENT_DYNAMIC_SENSORS_VALUE_WIDTH 32\n+/* The current state of a sensor. */\n+#define\tMCDI_EVENT_DYNAMIC_SENSORS_STATE_LBN 36\n+#define\tMCDI_EVENT_DYNAMIC_SENSORS_STATE_WIDTH 8\n \n /* FCDI_EVENT structuredef */\n #define\tFCDI_EVENT_LEN 8\n@@ -967,6 +997,7 @@\n #define\tFCDI_EXTENDED_EVENT_PPS_LENMAX 248\n #define\tFCDI_EXTENDED_EVENT_PPS_LENMAX_MCDI2 1016\n #define\tFCDI_EXTENDED_EVENT_PPS_LEN(num) (8+8*(num))\n+#define\tFCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_NUM(len) (((len)-8)/8)\n /* Number of timestamps following */\n #define\tFCDI_EXTENDED_EVENT_PPS_COUNT_OFST 0\n #define\tFCDI_EXTENDED_EVENT_PPS_COUNT_LEN 4\n@@ -1107,6 +1138,7 @@\n #define\tMC_CMD_READ32_OUT_LENMAX 252\n #define\tMC_CMD_READ32_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_READ32_OUT_LEN(num) (0+4*(num))\n+#define\tMC_CMD_READ32_OUT_BUFFER_NUM(len) (((len)-0)/4)\n #define\tMC_CMD_READ32_OUT_BUFFER_OFST 0\n #define\tMC_CMD_READ32_OUT_BUFFER_LEN 4\n #define\tMC_CMD_READ32_OUT_BUFFER_MINNUM 1\n@@ -1128,6 +1160,7 @@\n #define\tMC_CMD_WRITE32_IN_LENMAX 252\n #define\tMC_CMD_WRITE32_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_WRITE32_IN_LEN(num) (4+4*(num))\n+#define\tMC_CMD_WRITE32_IN_BUFFER_NUM(len) (((len)-4)/4)\n #define\tMC_CMD_WRITE32_IN_ADDR_OFST 0\n #define\tMC_CMD_WRITE32_IN_ADDR_LEN 4\n #define\tMC_CMD_WRITE32_IN_BUFFER_OFST 4\n@@ -1296,6 +1329,104 @@\n #define\tMC_CMD_GET_ASSERTS_OUT_RESERVED_OFST 136\n #define\tMC_CMD_GET_ASSERTS_OUT_RESERVED_LEN 4\n \n+/* MC_CMD_GET_ASSERTS_OUT_V2 msgresponse: Extended response for MicroBlaze CPUs\n+ * found on Riverhead designs\n+ */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V2_LEN 240\n+/* Assertion status flag. */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V2_GLOBAL_FLAGS_OFST 0\n+#define\tMC_CMD_GET_ASSERTS_OUT_V2_GLOBAL_FLAGS_LEN 4\n+/* enum: No assertions have failed. */\n+/*               MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS 0x1 */\n+/* enum: A system-level assertion has failed. */\n+/*               MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL 0x2 */\n+/* enum: A thread-level assertion has failed. */\n+/*               MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL 0x3 */\n+/* enum: The system was reset by the watchdog. */\n+/*               MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED 0x4 */\n+/* enum: An illegal address trap stopped the system (huntington and later) */\n+/*               MC_CMD_GET_ASSERTS_FLAGS_ADDR_TRAP 0x5 */\n+/* Failing PC value */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V2_SAVED_PC_OFFS_OFST 4\n+#define\tMC_CMD_GET_ASSERTS_OUT_V2_SAVED_PC_OFFS_LEN 4\n+/* Saved GP regs */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V2_GP_REGS_OFFS_OFST 8\n+#define\tMC_CMD_GET_ASSERTS_OUT_V2_GP_REGS_OFFS_LEN 4\n+#define\tMC_CMD_GET_ASSERTS_OUT_V2_GP_REGS_OFFS_NUM 31\n+/* enum: A magic value hinting that the value in this register at the time of\n+ * the failure has likely been lost.\n+ */\n+/*               MC_CMD_GET_ASSERTS_REG_NO_DATA 0xda7a1057 */\n+/* Failing thread address */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V2_THREAD_OFFS_OFST 132\n+#define\tMC_CMD_GET_ASSERTS_OUT_V2_THREAD_OFFS_LEN 4\n+#define\tMC_CMD_GET_ASSERTS_OUT_V2_RESERVED_OFST 136\n+#define\tMC_CMD_GET_ASSERTS_OUT_V2_RESERVED_LEN 4\n+/* Saved Special Function Registers */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V2_SF_REGS_OFFS_OFST 136\n+#define\tMC_CMD_GET_ASSERTS_OUT_V2_SF_REGS_OFFS_LEN 4\n+#define\tMC_CMD_GET_ASSERTS_OUT_V2_SF_REGS_OFFS_NUM 26\n+\n+/* MC_CMD_GET_ASSERTS_OUT_V3 msgresponse: Extended response with asserted\n+ * firmware version information\n+ */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_LEN 360\n+/* Assertion status flag. */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_GLOBAL_FLAGS_OFST 0\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_GLOBAL_FLAGS_LEN 4\n+/* enum: No assertions have failed. */\n+/*               MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS 0x1 */\n+/* enum: A system-level assertion has failed. */\n+/*               MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL 0x2 */\n+/* enum: A thread-level assertion has failed. */\n+/*               MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL 0x3 */\n+/* enum: The system was reset by the watchdog. */\n+/*               MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED 0x4 */\n+/* enum: An illegal address trap stopped the system (huntington and later) */\n+/*               MC_CMD_GET_ASSERTS_FLAGS_ADDR_TRAP 0x5 */\n+/* Failing PC value */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_SAVED_PC_OFFS_OFST 4\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_SAVED_PC_OFFS_LEN 4\n+/* Saved GP regs */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_GP_REGS_OFFS_OFST 8\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_GP_REGS_OFFS_LEN 4\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_GP_REGS_OFFS_NUM 31\n+/* enum: A magic value hinting that the value in this register at the time of\n+ * the failure has likely been lost.\n+ */\n+/*               MC_CMD_GET_ASSERTS_REG_NO_DATA 0xda7a1057 */\n+/* Failing thread address */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_THREAD_OFFS_OFST 132\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_THREAD_OFFS_LEN 4\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_RESERVED_OFST 136\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_RESERVED_LEN 4\n+/* Saved Special Function Registers */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_SF_REGS_OFFS_OFST 136\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_SF_REGS_OFFS_LEN 4\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_SF_REGS_OFFS_NUM 26\n+/* MC firmware unique build ID (as binary SHA-1 value) */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_ID_OFST 240\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_ID_LEN 20\n+/* MC firmware build date (as Unix timestamp) */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_OFST 260\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LEN 8\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_OFST 260\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_OFST 264\n+/* MC firmware version number */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_OFST 268\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LEN 8\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_OFST 268\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_OFST 272\n+/* MC firmware security level */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_OFST 276\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_LEN 4\n+/* MC firmware extra version info (as null-terminated US-ASCII string) */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_MC_FW_EXTRA_INFO_OFST 280\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_MC_FW_EXTRA_INFO_LEN 16\n+/* MC firmware build name (as null-terminated US-ASCII string) */\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_NAME_OFST 296\n+#define\tMC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_NAME_LEN 64\n+\n \n /***********************************/\n /* MC_CMD_LOG_CTRL\n@@ -1326,7 +1457,7 @@\n \n /***********************************/\n /* MC_CMD_GET_VERSION\n- * Get version information about the MC firmware.\n+ * Get version information about adapter components.\n  */\n #define\tMC_CMD_GET_VERSION 0x8\n #undef\tMC_CMD_0x8_PRIVILEGE_CTG\n@@ -1390,6 +1521,95 @@\n #define\tMC_CMD_GET_VERSION_EXT_OUT_EXTRA_OFST 32\n #define\tMC_CMD_GET_VERSION_EXT_OUT_EXTRA_LEN 16\n \n+/* MC_CMD_GET_VERSION_V2_OUT msgresponse: Extended response providing version\n+ * information for all adapter components. For Riverhead based designs, base MC\n+ * firmware version fields refer to NMC firmware, while CMC firmware data is in\n+ * dedicated CMC fields. Flags indicate which data is present in the response\n+ * (depending on which components exist on a particular adapter)\n+ */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_LEN 304\n+/*            MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */\n+/*            MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */\n+/*            Enum values, see field(s): */\n+/*               MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_PCOL_OFST 4\n+#define\tMC_CMD_GET_VERSION_V2_OUT_PCOL_LEN 4\n+/* 128bit mask of functions supported by the current firmware */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_SUPPORTED_FUNCS_OFST 8\n+#define\tMC_CMD_GET_VERSION_V2_OUT_SUPPORTED_FUNCS_LEN 16\n+#define\tMC_CMD_GET_VERSION_V2_OUT_VERSION_OFST 24\n+#define\tMC_CMD_GET_VERSION_V2_OUT_VERSION_LEN 8\n+#define\tMC_CMD_GET_VERSION_V2_OUT_VERSION_LO_OFST 24\n+#define\tMC_CMD_GET_VERSION_V2_OUT_VERSION_HI_OFST 28\n+/* extra info */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_EXTRA_OFST 32\n+#define\tMC_CMD_GET_VERSION_V2_OUT_EXTRA_LEN 16\n+/* Flags indicating which extended fields are valid */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_FLAGS_OFST 48\n+#define\tMC_CMD_GET_VERSION_V2_OUT_FLAGS_LEN 4\n+#define\tMC_CMD_GET_VERSION_V2_OUT_MCFW_EXT_INFO_PRESENT_LBN 0\n+#define\tMC_CMD_GET_VERSION_V2_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1\n+#define\tMC_CMD_GET_VERSION_V2_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1\n+#define\tMC_CMD_GET_VERSION_V2_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1\n+#define\tMC_CMD_GET_VERSION_V2_OUT_CMC_EXT_INFO_PRESENT_LBN 2\n+#define\tMC_CMD_GET_VERSION_V2_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1\n+#define\tMC_CMD_GET_VERSION_V2_OUT_FPGA_EXT_INFO_PRESENT_LBN 3\n+#define\tMC_CMD_GET_VERSION_V2_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1\n+#define\tMC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_LBN 4\n+#define\tMC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1\n+/* MC firmware unique build ID (as binary SHA-1 value) */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_ID_OFST 52\n+#define\tMC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_ID_LEN 20\n+/* MC firmware security level */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_MCFW_SECURITY_LEVEL_OFST 72\n+#define\tMC_CMD_GET_VERSION_V2_OUT_MCFW_SECURITY_LEVEL_LEN 4\n+/* MC firmware build name (as null-terminated US-ASCII string) */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_NAME_OFST 76\n+#define\tMC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_NAME_LEN 64\n+/* The SUC firmware version as four numbers - a.b.c.d */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_OFST 140\n+#define\tMC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_LEN 4\n+#define\tMC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_NUM 4\n+/* SUC firmware build date (as 64-bit Unix timestamp) */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_OFST 156\n+#define\tMC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LEN 8\n+#define\tMC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_OFST 156\n+#define\tMC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_OFST 160\n+/* The ID of the SUC chip. This is specific to the platform but typically\n+ * indicates family, memory sizes etc. See SF-116728-SW for further details.\n+ */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_SUCFW_CHIP_ID_OFST 164\n+#define\tMC_CMD_GET_VERSION_V2_OUT_SUCFW_CHIP_ID_LEN 4\n+/* The CMC firmware version as four numbers - a.b.c.d */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_CMCFW_VERSION_OFST 168\n+#define\tMC_CMD_GET_VERSION_V2_OUT_CMCFW_VERSION_LEN 4\n+#define\tMC_CMD_GET_VERSION_V2_OUT_CMCFW_VERSION_NUM 4\n+/* CMC firmware build date (as 64-bit Unix timestamp) */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_OFST 184\n+#define\tMC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LEN 8\n+#define\tMC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_OFST 184\n+#define\tMC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_OFST 188\n+/* FPGA version as three numbers. On Riverhead based systems this field uses\n+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):\n+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1\n+ * => B, ...) FPGA_VERSION[2]: Sub-revision number\n+ */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_FPGA_VERSION_OFST 192\n+#define\tMC_CMD_GET_VERSION_V2_OUT_FPGA_VERSION_LEN 4\n+#define\tMC_CMD_GET_VERSION_V2_OUT_FPGA_VERSION_NUM 3\n+/* Extra FPGA revision information (as null-terminated US-ASCII string) */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_FPGA_EXTRA_OFST 204\n+#define\tMC_CMD_GET_VERSION_V2_OUT_FPGA_EXTRA_LEN 16\n+/* Board name / adapter model (as null-terminated US-ASCII string) */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_BOARD_NAME_OFST 220\n+#define\tMC_CMD_GET_VERSION_V2_OUT_BOARD_NAME_LEN 16\n+/* Board revision number */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_BOARD_REVISION_OFST 236\n+#define\tMC_CMD_GET_VERSION_V2_OUT_BOARD_REVISION_LEN 4\n+/* Board serial number (as null-terminated US-ASCII string) */\n+#define\tMC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_OFST 240\n+#define\tMC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_LEN 64\n+\n \n /***********************************/\n /* MC_CMD_PTP\n@@ -1524,6 +1744,7 @@\n #define\tMC_CMD_PTP_IN_TRANSMIT_LENMAX 252\n #define\tMC_CMD_PTP_IN_TRANSMIT_LENMAX_MCDI2 1020\n #define\tMC_CMD_PTP_IN_TRANSMIT_LEN(num) (12+1*(num))\n+#define\tMC_CMD_PTP_IN_TRANSMIT_PACKET_NUM(len) (((len)-12)/1)\n /*            MC_CMD_PTP_IN_CMD_OFST 0 */\n /*            MC_CMD_PTP_IN_CMD_LEN 4 */\n /*            MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */\n@@ -1691,6 +1912,7 @@\n #define\tMC_CMD_PTP_IN_FPGAWRITE_LENMAX 252\n #define\tMC_CMD_PTP_IN_FPGAWRITE_LENMAX_MCDI2 1020\n #define\tMC_CMD_PTP_IN_FPGAWRITE_LEN(num) (12+1*(num))\n+#define\tMC_CMD_PTP_IN_FPGAWRITE_BUFFER_NUM(len) (((len)-12)/1)\n /*            MC_CMD_PTP_IN_CMD_OFST 0 */\n /*            MC_CMD_PTP_IN_CMD_LEN 4 */\n /*            MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */\n@@ -2034,6 +2256,7 @@\n #define\tMC_CMD_PTP_OUT_SYNCHRONIZE_LENMAX 240\n #define\tMC_CMD_PTP_OUT_SYNCHRONIZE_LENMAX_MCDI2 1020\n #define\tMC_CMD_PTP_OUT_SYNCHRONIZE_LEN(num) (0+20*(num))\n+#define\tMC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_NUM(len) (((len)-0)/20)\n /* A set of host and NIC times */\n #define\tMC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_OFST 0\n #define\tMC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_LEN 20\n@@ -2118,6 +2341,7 @@\n #define\tMC_CMD_PTP_OUT_FPGAREAD_LENMAX 252\n #define\tMC_CMD_PTP_OUT_FPGAREAD_LENMAX_MCDI2 1020\n #define\tMC_CMD_PTP_OUT_FPGAREAD_LEN(num) (0+1*(num))\n+#define\tMC_CMD_PTP_OUT_FPGAREAD_BUFFER_NUM(len) (((len)-0)/1)\n #define\tMC_CMD_PTP_OUT_FPGAREAD_BUFFER_OFST 0\n #define\tMC_CMD_PTP_OUT_FPGAREAD_BUFFER_LEN 1\n #define\tMC_CMD_PTP_OUT_FPGAREAD_BUFFER_MINNUM 1\n@@ -2258,6 +2482,7 @@\n #define\tMC_CMD_CSR_READ32_OUT_LENMAX 252\n #define\tMC_CMD_CSR_READ32_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_CSR_READ32_OUT_LEN(num) (0+4*(num))\n+#define\tMC_CMD_CSR_READ32_OUT_BUFFER_NUM(len) (((len)-0)/4)\n /* The last dword is the status, not a value read */\n #define\tMC_CMD_CSR_READ32_OUT_BUFFER_OFST 0\n #define\tMC_CMD_CSR_READ32_OUT_BUFFER_LEN 4\n@@ -2280,6 +2505,7 @@\n #define\tMC_CMD_CSR_WRITE32_IN_LENMAX 252\n #define\tMC_CMD_CSR_WRITE32_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_CSR_WRITE32_IN_LEN(num) (8+4*(num))\n+#define\tMC_CMD_CSR_WRITE32_IN_BUFFER_NUM(len) (((len)-8)/4)\n /* Address */\n #define\tMC_CMD_CSR_WRITE32_IN_ADDR_OFST 0\n #define\tMC_CMD_CSR_WRITE32_IN_ADDR_LEN 4\n@@ -2362,6 +2588,7 @@\n #define\tMC_CMD_STACKINFO_OUT_LENMAX 252\n #define\tMC_CMD_STACKINFO_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_STACKINFO_OUT_LEN(num) (0+12*(num))\n+#define\tMC_CMD_STACKINFO_OUT_THREAD_INFO_NUM(len) (((len)-0)/12)\n /* (thread ptr, stack size, free space) for each thread in system */\n #define\tMC_CMD_STACKINFO_OUT_THREAD_INFO_OFST 0\n #define\tMC_CMD_STACKINFO_OUT_THREAD_INFO_LEN 12\n@@ -2480,6 +2707,7 @@\n #define\tMC_CMD_DBI_WRITE_IN_LENMAX 252\n #define\tMC_CMD_DBI_WRITE_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_DBI_WRITE_IN_LEN(num) (0+12*(num))\n+#define\tMC_CMD_DBI_WRITE_IN_DBIWROP_NUM(len) (((len)-0)/12)\n /* Each write op consists of an address (offset 0), byte enable/VF/CS2 (offset\n  * 32) and value (offset 64). See MC_CMD_DBIWROP_TYPEDEF.\n  */\n@@ -2649,6 +2877,7 @@\n #define\tMC_CMD_GET_BOARD_CFG_OUT_LENMAX 136\n #define\tMC_CMD_GET_BOARD_CFG_OUT_LENMAX_MCDI2 136\n #define\tMC_CMD_GET_BOARD_CFG_OUT_LEN(num) (72+2*(num))\n+#define\tMC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_NUM(len) (((len)-72)/2)\n #define\tMC_CMD_GET_BOARD_CFG_OUT_BOARD_TYPE_OFST 0\n #define\tMC_CMD_GET_BOARD_CFG_OUT_BOARD_TYPE_LEN 4\n #define\tMC_CMD_GET_BOARD_CFG_OUT_BOARD_NAME_OFST 4\n@@ -2720,6 +2949,7 @@\n #define\tMC_CMD_DBI_READX_IN_LENMAX 248\n #define\tMC_CMD_DBI_READX_IN_LENMAX_MCDI2 1016\n #define\tMC_CMD_DBI_READX_IN_LEN(num) (0+8*(num))\n+#define\tMC_CMD_DBI_READX_IN_DBIRDOP_NUM(len) (((len)-0)/8)\n /* Each Read op consists of an address (offset 0), VF/CS2) */\n #define\tMC_CMD_DBI_READX_IN_DBIRDOP_OFST 0\n #define\tMC_CMD_DBI_READX_IN_DBIRDOP_LEN 8\n@@ -2734,6 +2964,7 @@\n #define\tMC_CMD_DBI_READX_OUT_LENMAX 252\n #define\tMC_CMD_DBI_READX_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_DBI_READX_OUT_LEN(num) (0+4*(num))\n+#define\tMC_CMD_DBI_READX_OUT_VALUE_NUM(len) (((len)-0)/4)\n /* Value */\n #define\tMC_CMD_DBI_READX_OUT_VALUE_OFST 0\n #define\tMC_CMD_DBI_READX_OUT_VALUE_LEN 4\n@@ -2792,6 +3023,7 @@\n #define\tMC_CMD_LTSSM_HIST_OUT_LENMAX 252\n #define\tMC_CMD_LTSSM_HIST_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_LTSSM_HIST_OUT_LEN(num) (0+4*(num))\n+#define\tMC_CMD_LTSSM_HIST_OUT_DATA_NUM(len) (((len)-0)/4)\n /* variable number of LTSSM values, as bytes. The history is read-to-clear. */\n #define\tMC_CMD_LTSSM_HIST_OUT_DATA_OFST 0\n #define\tMC_CMD_LTSSM_HIST_OUT_DATA_LEN 4\n@@ -2835,6 +3067,8 @@\n #define\tMC_CMD_DRV_ATTACH_IN_WANT_V2_LINKCHANGES_WIDTH 1\n #define\tMC_CMD_DRV_ATTACH_IN_WANT_RX_VI_SPREADING_INHIBIT_LBN 5\n #define\tMC_CMD_DRV_ATTACH_IN_WANT_RX_VI_SPREADING_INHIBIT_WIDTH 1\n+#define\tMC_CMD_DRV_ATTACH_IN_WANT_TX_ONLY_SPREADING_LBN 5\n+#define\tMC_CMD_DRV_ATTACH_IN_WANT_TX_ONLY_SPREADING_WIDTH 1\n /* 1 to set new state, or 0 to just report the existing state */\n #define\tMC_CMD_DRV_ATTACH_IN_UPDATE_OFST 4\n #define\tMC_CMD_DRV_ATTACH_IN_UPDATE_LEN 4\n@@ -2895,6 +3129,8 @@\n #define\tMC_CMD_DRV_ATTACH_IN_V2_WANT_V2_LINKCHANGES_WIDTH 1\n #define\tMC_CMD_DRV_ATTACH_IN_V2_WANT_RX_VI_SPREADING_INHIBIT_LBN 5\n #define\tMC_CMD_DRV_ATTACH_IN_V2_WANT_RX_VI_SPREADING_INHIBIT_WIDTH 1\n+#define\tMC_CMD_DRV_ATTACH_IN_V2_WANT_TX_ONLY_SPREADING_LBN 5\n+#define\tMC_CMD_DRV_ATTACH_IN_V2_WANT_TX_ONLY_SPREADING_WIDTH 1\n /* 1 to set new state, or 0 to just report the existing state */\n #define\tMC_CMD_DRV_ATTACH_IN_V2_UPDATE_OFST 4\n #define\tMC_CMD_DRV_ATTACH_IN_V2_UPDATE_LEN 4\n@@ -2968,11 +3204,13 @@\n  * input.\n  */\n #define\tMC_CMD_DRV_ATTACH_EXT_OUT_FLAG_VI_SPREADING_ENABLED 0x4\n-/* enum: If set, indicates that VI spreading is inhibited on RX. See\n- * description of WANT_RX_VI_SPREADING_INHIBIT above. It is an error to set\n- * this flag without also setting FLAG_VI_SPREADING_ENABLED.\n- */\n+/* enum: Used during development only. Should no longer be used. */\n #define\tMC_CMD_DRV_ATTACH_EXT_OUT_FLAG_RX_VI_SPREADING_INHIBITED 0x5\n+/* enum: If set, indicates that TX only spreading is enabled. Even-numbered\n+ * TXQs will use one engine, and odd-numbered TXQs will use the other. This\n+ * also has the effect that only even-numbered RXQs will receive traffic.\n+ */\n+#define\tMC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TX_ONLY_VI_SPREADING_ENABLED 0x5\n \n \n /***********************************/\n@@ -3140,6 +3378,7 @@\n #define\tMC_CMD_PUTS_IN_LENMAX 252\n #define\tMC_CMD_PUTS_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_PUTS_IN_LEN(num) (12+1*(num))\n+#define\tMC_CMD_PUTS_IN_STRING_NUM(len) (((len)-12)/1)\n #define\tMC_CMD_PUTS_IN_DEST_OFST 0\n #define\tMC_CMD_PUTS_IN_DEST_LEN 4\n #define\tMC_CMD_PUTS_IN_UART_LBN 0\n@@ -3507,6 +3746,7 @@\n #define\tMC_CMD_FLUSH_RX_QUEUES_IN_LENMAX 252\n #define\tMC_CMD_FLUSH_RX_QUEUES_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_FLUSH_RX_QUEUES_IN_LEN(num) (0+4*(num))\n+#define\tMC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_NUM(len) (((len)-0)/4)\n #define\tMC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_OFST 0\n #define\tMC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_LEN 4\n #define\tMC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MINNUM 1\n@@ -4699,6 +4939,7 @@\n #define\tMC_CMD_MEMCPY_IN_LENMAX 224\n #define\tMC_CMD_MEMCPY_IN_LENMAX_MCDI2 992\n #define\tMC_CMD_MEMCPY_IN_LEN(num) (0+32*(num))\n+#define\tMC_CMD_MEMCPY_IN_RECORD_NUM(len) (((len)-0)/32)\n /* see MC_CMD_MEMCPY_RECORD_TYPEDEF */\n #define\tMC_CMD_MEMCPY_IN_RECORD_OFST 0\n #define\tMC_CMD_MEMCPY_IN_RECORD_LEN 32\n@@ -5127,6 +5368,7 @@\n #define\tMC_CMD_NVRAM_READ_OUT_LENMAX 252\n #define\tMC_CMD_NVRAM_READ_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_NVRAM_READ_OUT_LEN(num) (0+1*(num))\n+#define\tMC_CMD_NVRAM_READ_OUT_READ_BUFFER_NUM(len) (((len)-0)/1)\n #define\tMC_CMD_NVRAM_READ_OUT_READ_BUFFER_OFST 0\n #define\tMC_CMD_NVRAM_READ_OUT_READ_BUFFER_LEN 1\n #define\tMC_CMD_NVRAM_READ_OUT_READ_BUFFER_MINNUM 1\n@@ -5150,6 +5392,7 @@\n #define\tMC_CMD_NVRAM_WRITE_IN_LENMAX 252\n #define\tMC_CMD_NVRAM_WRITE_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_NVRAM_WRITE_IN_LEN(num) (12+1*(num))\n+#define\tMC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_NUM(len) (((len)-12)/1)\n #define\tMC_CMD_NVRAM_WRITE_IN_TYPE_OFST 0\n #define\tMC_CMD_NVRAM_WRITE_IN_TYPE_LEN 4\n /*            Enum values, see field(s): */\n@@ -5236,6 +5479,10 @@\n #define\tMC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAGS_LEN 4\n #define\tMC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_REPORT_VERIFY_RESULT_LBN 0\n #define\tMC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_REPORT_VERIFY_RESULT_WIDTH 1\n+#define\tMC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_RUN_IN_BACKGROUND_LBN 1\n+#define\tMC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_RUN_IN_BACKGROUND_WIDTH 1\n+#define\tMC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_LBN 2\n+#define\tMC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_WIDTH 1\n \n /* MC_CMD_NVRAM_UPDATE_FINISH_OUT msgresponse: Legacy NVRAM_UPDATE_FINISH\n  * response. Use NVRAM_UPDATE_FINISH_V2_OUT in new code\n@@ -5258,7 +5505,10 @@\n  * has completed.\n  */\n #define\tMC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN 4\n-/* Result of nvram update completion processing */\n+/* Result of nvram update completion processing. Result codes that indicate an\n+ * internal build failure and therefore not expected to be seen by customers in\n+ * the field are marked with a prefix 'Internal-error'.\n+ */\n #define\tMC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE_OFST 0\n #define\tMC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE_LEN 4\n /* enum: Invalid return code; only non-zero values are defined. Defined as\n@@ -5297,6 +5547,51 @@\n #define\tMC_CMD_NVRAM_VERIFY_RC_REJECT_TEST_SIGNED 0xc\n /* enum: The image has a lower security level than the current firmware. */\n #define\tMC_CMD_NVRAM_VERIFY_RC_SECURITY_LEVEL_DOWNGRADE 0xd\n+/* enum: Internal-error. The signed image is missing the 'contents' section,\n+ * where the 'contents' section holds the actual image payload to be applied.\n+ */\n+#define\tMC_CMD_NVRAM_VERIFY_RC_CONTENT_NOT_FOUND 0xe\n+/* enum: Internal-error. The bundle header is invalid. */\n+#define\tMC_CMD_NVRAM_VERIFY_RC_BUNDLE_CONTENT_HEADER_INVALID 0xf\n+/* enum: Internal-error. The bundle does not have a valid reflash image layout.\n+ */\n+#define\tMC_CMD_NVRAM_VERIFY_RC_BUNDLE_REFLASH_IMAGE_INVALID 0x10\n+/* enum: Internal-error. The bundle has an inconsistent layout of components or\n+ * incorrect checksum.\n+ */\n+#define\tMC_CMD_NVRAM_VERIFY_RC_BUNDLE_IMAGE_LAYOUT_INVALID 0x11\n+/* enum: Internal-error. The bundle manifest is inconsistent with components in\n+ * the bundle.\n+ */\n+#define\tMC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_INVALID 0x12\n+/* enum: Internal-error. The number of components in a bundle do not match the\n+ * number of components advertised by the bundle manifest.\n+ */\n+#define\tMC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_NUM_COMPONENTS_MISMATCH 0x13\n+/* enum: Internal-error. The bundle contains too many components for the MC\n+ * firmware to process\n+ */\n+#define\tMC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_TOO_MANY_COMPONENTS 0x14\n+/* enum: Internal-error. The bundle manifest has an invalid/inconsistent\n+ * component.\n+ */\n+#define\tMC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_COMPONENT_INVALID 0x15\n+/* enum: Internal-error. The hash of a component does not match the hash stored\n+ * in the bundle manifest.\n+ */\n+#define\tMC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_COMPONENT_HASH_MISMATCH 0x16\n+/* enum: Internal-error. Component hash calculation failed. */\n+#define\tMC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_COMPONENT_HASH_FAILED 0x17\n+/* enum: Internal-error. The component does not have a valid reflash image\n+ * layout.\n+ */\n+#define\tMC_CMD_NVRAM_VERIFY_RC_BUNDLE_COMPONENT_REFLASH_IMAGE_INVALID 0x18\n+/* enum: The bundle processing code failed to copy a component to its target\n+ * partition.\n+ */\n+#define\tMC_CMD_NVRAM_VERIFY_RC_BUNDLE_COMPONENT_COPY_FAILED 0x19\n+/* enum: The update operation is in-progress. */\n+#define\tMC_CMD_NVRAM_VERIFY_RC_PENDING 0x1a\n \n \n /***********************************/\n@@ -5351,6 +5646,7 @@\n #define\tMC_CMD_SCHEDINFO_OUT_LENMAX 252\n #define\tMC_CMD_SCHEDINFO_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_SCHEDINFO_OUT_LEN(num) (0+4*(num))\n+#define\tMC_CMD_SCHEDINFO_OUT_DATA_NUM(len) (((len)-0)/4)\n #define\tMC_CMD_SCHEDINFO_OUT_DATA_OFST 0\n #define\tMC_CMD_SCHEDINFO_OUT_DATA_LEN 4\n #define\tMC_CMD_SCHEDINFO_OUT_DATA_MINNUM 1\n@@ -5460,6 +5756,7 @@\n #define\tMC_CMD_SENSOR_INFO_OUT_LENMAX 252\n #define\tMC_CMD_SENSOR_INFO_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_SENSOR_INFO_OUT_LEN(num) (4+8*(num))\n+#define\tMC_CMD_SENSOR_INFO_OUT_MC_CMD_SENSOR_ENTRY_NUM(len) (((len)-4)/8)\n #define\tMC_CMD_SENSOR_INFO_OUT_MASK_OFST 0\n #define\tMC_CMD_SENSOR_INFO_OUT_MASK_LEN 4\n /* enum: Controller temperature: degC */\n@@ -5668,6 +5965,7 @@\n #define\tMC_CMD_SENSOR_INFO_EXT_OUT_LENMAX 252\n #define\tMC_CMD_SENSOR_INFO_EXT_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_SENSOR_INFO_EXT_OUT_LEN(num) (4+8*(num))\n+#define\tMC_CMD_SENSOR_INFO_EXT_OUT_MC_CMD_SENSOR_ENTRY_NUM(len) (((len)-4)/8)\n #define\tMC_CMD_SENSOR_INFO_EXT_OUT_MASK_OFST 0\n #define\tMC_CMD_SENSOR_INFO_EXT_OUT_MASK_LEN 4\n /*            Enum values, see field(s): */\n@@ -5869,6 +6167,7 @@\n #define\tMC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMAX 252\n #define\tMC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LEN(num) (4+4*(num))\n+#define\tMC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_NUM(len) (((len)-4)/4)\n #define\tMC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0\n #define\tMC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4\n #define\tMC_CMD_LIGHTSOUT_OFFLOAD_PROTOCOL_ARP 0x1 /* enum */\n@@ -6065,6 +6364,7 @@\n #define\tMC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX 252\n #define\tMC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(num) (4+1*(num))\n+#define\tMC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_NUM(len) (((len)-4)/1)\n /* in bytes */\n #define\tMC_CMD_GET_PHY_MEDIA_INFO_OUT_DATALEN_OFST 0\n #define\tMC_CMD_GET_PHY_MEDIA_INFO_OUT_DATALEN_LEN 4\n@@ -6219,6 +6519,7 @@\n #define\tMC_CMD_NVRAM_PARTITIONS_OUT_LENMAX 252\n #define\tMC_CMD_NVRAM_PARTITIONS_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_NVRAM_PARTITIONS_OUT_LEN(num) (4+4*(num))\n+#define\tMC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_NUM(len) (((len)-4)/4)\n /* total number of partitions */\n #define\tMC_CMD_NVRAM_PARTITIONS_OUT_NUM_PARTITIONS_OFST 0\n #define\tMC_CMD_NVRAM_PARTITIONS_OUT_NUM_PARTITIONS_LEN 4\n@@ -6251,6 +6552,7 @@\n #define\tMC_CMD_NVRAM_METADATA_OUT_LENMAX 252\n #define\tMC_CMD_NVRAM_METADATA_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_NVRAM_METADATA_OUT_LEN(num) (20+1*(num))\n+#define\tMC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_NUM(len) (((len)-20)/1)\n /* Partition type ID code */\n #define\tMC_CMD_NVRAM_METADATA_OUT_TYPE_OFST 0\n #define\tMC_CMD_NVRAM_METADATA_OUT_TYPE_LEN 4\n@@ -6520,6 +6822,7 @@\n #define\tMC_CMD_MUM_IN_WRITE_LENMAX 252\n #define\tMC_CMD_MUM_IN_WRITE_LENMAX_MCDI2 1020\n #define\tMC_CMD_MUM_IN_WRITE_LEN(num) (12+4*(num))\n+#define\tMC_CMD_MUM_IN_WRITE_BUFFER_NUM(len) (((len)-12)/4)\n /* MUM cmd header */\n /*            MC_CMD_MUM_IN_CMD_OFST 0 */\n /*            MC_CMD_MUM_IN_CMD_LEN 4 */\n@@ -6543,6 +6846,7 @@\n #define\tMC_CMD_MUM_IN_RAW_CMD_LENMAX 252\n #define\tMC_CMD_MUM_IN_RAW_CMD_LENMAX_MCDI2 1020\n #define\tMC_CMD_MUM_IN_RAW_CMD_LEN(num) (16+1*(num))\n+#define\tMC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_NUM(len) (((len)-16)/1)\n /* MUM cmd header */\n /*            MC_CMD_MUM_IN_CMD_OFST 0 */\n /*            MC_CMD_MUM_IN_CMD_LEN 4 */\n@@ -6849,6 +7153,7 @@\n #define\tMC_CMD_MUM_OUT_RAW_CMD_LENMAX 252\n #define\tMC_CMD_MUM_OUT_RAW_CMD_LENMAX_MCDI2 1020\n #define\tMC_CMD_MUM_OUT_RAW_CMD_LEN(num) (0+1*(num))\n+#define\tMC_CMD_MUM_OUT_RAW_CMD_DATA_NUM(len) (((len)-0)/1)\n /* returned data */\n #define\tMC_CMD_MUM_OUT_RAW_CMD_DATA_OFST 0\n #define\tMC_CMD_MUM_OUT_RAW_CMD_DATA_LEN 1\n@@ -6861,6 +7166,7 @@\n #define\tMC_CMD_MUM_OUT_READ_LENMAX 252\n #define\tMC_CMD_MUM_OUT_READ_LENMAX_MCDI2 1020\n #define\tMC_CMD_MUM_OUT_READ_LEN(num) (0+4*(num))\n+#define\tMC_CMD_MUM_OUT_READ_BUFFER_NUM(len) (((len)-0)/4)\n #define\tMC_CMD_MUM_OUT_READ_BUFFER_OFST 0\n #define\tMC_CMD_MUM_OUT_READ_BUFFER_LEN 4\n #define\tMC_CMD_MUM_OUT_READ_BUFFER_MINNUM 1\n@@ -6926,6 +7232,7 @@\n #define\tMC_CMD_MUM_OUT_READ_SENSORS_LENMAX 252\n #define\tMC_CMD_MUM_OUT_READ_SENSORS_LENMAX_MCDI2 1020\n #define\tMC_CMD_MUM_OUT_READ_SENSORS_LEN(num) (0+4*(num))\n+#define\tMC_CMD_MUM_OUT_READ_SENSORS_DATA_NUM(len) (((len)-0)/4)\n #define\tMC_CMD_MUM_OUT_READ_SENSORS_DATA_OFST 0\n #define\tMC_CMD_MUM_OUT_READ_SENSORS_DATA_LEN 4\n #define\tMC_CMD_MUM_OUT_READ_SENSORS_DATA_MINNUM 1\n@@ -6975,6 +7282,7 @@\n #define\tMC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMAX 252\n #define\tMC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMAX_MCDI2 1020\n #define\tMC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LEN(num) (4+1*(num))\n+#define\tMC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_NUM(len) (((len)-4)/1)\n /* in bytes */\n #define\tMC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATALEN_OFST 0\n #define\tMC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATALEN_LEN 4\n@@ -7001,6 +7309,7 @@\n #define\tMC_CMD_MUM_OUT_READ_DDR_INFO_LENMAX 248\n #define\tMC_CMD_MUM_OUT_READ_DDR_INFO_LENMAX_MCDI2 1016\n #define\tMC_CMD_MUM_OUT_READ_DDR_INFO_LEN(num) (8+8*(num))\n+#define\tMC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_NUM(len) (((len)-8)/8)\n /* Discrete (soldered) DDR resistor strap info */\n #define\tMC_CMD_MUM_OUT_READ_DDR_INFO_DISCRETE_DDR_INFO_OFST 0\n #define\tMC_CMD_MUM_OUT_READ_DDR_INFO_DISCRETE_DDR_INFO_LEN 4\n@@ -7063,6 +7372,311 @@\n #define\tMC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED2_LBN 52\n #define\tMC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED2_WIDTH 12\n \n+/* MC_CMD_DYNAMIC_SENSORS_LIMITS structuredef: Set of sensor limits. This\n+ * should match the equivalent structure in the sensor_query SPHINX service.\n+ */\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_LEN 24\n+/* A value below this will trigger a warning event. */\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_LO_WARNING_OFST 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_LO_WARNING_LEN 4\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_LO_WARNING_LBN 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_LO_WARNING_WIDTH 32\n+/* A value below this will trigger a critical event. */\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_LO_CRITICAL_OFST 4\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_LO_CRITICAL_LEN 4\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_LO_CRITICAL_LBN 32\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_LO_CRITICAL_WIDTH 32\n+/* A value below this will shut down the card. */\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_LO_FATAL_OFST 8\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_LO_FATAL_LEN 4\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_LO_FATAL_LBN 64\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_LO_FATAL_WIDTH 32\n+/* A value above this will trigger a warning event. */\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_HI_WARNING_OFST 12\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_HI_WARNING_LEN 4\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_HI_WARNING_LBN 96\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_HI_WARNING_WIDTH 32\n+/* A value above this will trigger a critical event. */\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_HI_CRITICAL_OFST 16\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_HI_CRITICAL_LEN 4\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_HI_CRITICAL_LBN 128\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_HI_CRITICAL_WIDTH 32\n+/* A value above this will shut down the card. */\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_HI_FATAL_OFST 20\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_HI_FATAL_LEN 4\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_HI_FATAL_LBN 160\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIMITS_HI_FATAL_WIDTH 32\n+\n+/* MC_CMD_DYNAMIC_SENSORS_DESCRIPTION structuredef: Description of a sensor.\n+ * This should match the equivalent structure in the sensor_query SPHINX\n+ * service.\n+ */\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_LEN 64\n+/* The handle used to identify the sensor in calls to\n+ * MC_CMD_DYNAMIC_SENSORS_GET_VALUES\n+ */\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_HANDLE_OFST 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_HANDLE_LEN 4\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_HANDLE_LBN 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_HANDLE_WIDTH 32\n+/* A human-readable name for the sensor (zero terminated string, max 32 bytes)\n+ */\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_NAME_OFST 4\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_NAME_LEN 32\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_NAME_LBN 32\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_NAME_WIDTH 256\n+/* The type of the sensor device, and by implication the unit of that the\n+ * values will be reported in\n+ */\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_TYPE_OFST 36\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_TYPE_LEN 4\n+/* enum: A voltage sensor. Unit is mV */\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_VOLTAGE 0x0\n+/* enum: A current sensor. Unit is mA */\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_CURRENT 0x1\n+/* enum: A power sensor. Unit is mW */\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_POWER 0x2\n+/* enum: A temperature sensor. Unit is Celsius */\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_TEMPERATURE 0x3\n+/* enum: A cooling fan sensor. Unit is RPM */\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_FAN 0x4\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_TYPE_LBN 288\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_TYPE_WIDTH 32\n+/* A single MC_CMD_DYNAMIC_SENSORS_LIMITS structure */\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_LIMITS_OFST 40\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_LIMITS_LEN 24\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_LIMITS_LBN 320\n+#define\tMC_CMD_DYNAMIC_SENSORS_DESCRIPTION_LIMITS_WIDTH 192\n+\n+/* MC_CMD_DYNAMIC_SENSORS_READING structuredef: State and value of a sensor.\n+ * This should match the equivalent structure in the sensor_query SPHINX\n+ * service.\n+ */\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_LEN 12\n+/* The handle used to identify the sensor */\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_HANDLE_OFST 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_HANDLE_LEN 4\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_HANDLE_LBN 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_HANDLE_WIDTH 32\n+/* The current value of the sensor */\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_VALUE_OFST 4\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_VALUE_LEN 4\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_VALUE_LBN 32\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_VALUE_WIDTH 32\n+/* The sensor's condition, e.g. good, broken or removed */\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_STATE_OFST 8\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_STATE_LEN 4\n+/* enum: Sensor working normally within limits */\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_OK 0x0\n+/* enum: Warning threshold breached */\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_WARNING 0x1\n+/* enum: Critical threshold breached */\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_CRITICAL 0x2\n+/* enum: Fatal threshold breached */\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_FATAL 0x3\n+/* enum: Sensor not working */\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_BROKEN 0x4\n+/* enum: Sensor working but no reading available */\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_NO_READING 0x5\n+/* enum: Sensor initialization failed */\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_INIT_FAILED 0x6\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_STATE_LBN 64\n+#define\tMC_CMD_DYNAMIC_SENSORS_READING_STATE_WIDTH 32\n+\n+\n+/***********************************/\n+/* MC_CMD_DYNAMIC_SENSORS_LIST\n+ * Return a complete list of handles for sensors currently managed by the MC,\n+ * and a generation count for this version of the sensor table. On systems\n+ * advertising the DYNAMIC_SENSORS capability bit, this replaces the\n+ * MC_CMD_READ_SENSORS command. On multi-MC systems this may include sensors\n+ * added by the NMC.\n+ *\n+ * Sensor handles are persistent for the lifetime of the sensor and are used to\n+ * identify sensors in MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS and\n+ * MC_CMD_DYNAMIC_SENSORS_GET_VALUES.\n+ *\n+ * The generation count is maintained by the MC, is persistent across reboots\n+ * and will be incremented each time the sensor table is modified. When the\n+ * table is modified, a CODE_DYNAMIC_SENSORS_CHANGE event will be generated\n+ * containing the new generation count. The driver should compare this against\n+ * the current generation count, and if it is different, call\n+ * MC_CMD_DYNAMIC_SENSORS_LIST again to update it's copy of the sensor table.\n+ *\n+ * The sensor count is provided to allow a future path to supporting more than\n+ * MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_MAXNUM_MCDI2 sensors, i.e.\n+ * the maximum number that will fit in a single response. As this is a fairly\n+ * large number (253) it is not anticipated that this will be needed in the\n+ * near future, so can currently be ignored.\n+ *\n+ * On Riverhead this command is implemented as a a wrapper for `list` in the\n+ * sensor_query SPHINX service.\n+ */\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIST 0x66\n+#undef\tMC_CMD_0x66_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x66_PRIVILEGE_CTG SRIOV_CTG_GENERAL\n+\n+/* MC_CMD_DYNAMIC_SENSORS_LIST_IN msgrequest */\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIST_IN_LEN 0\n+\n+/* MC_CMD_DYNAMIC_SENSORS_LIST_OUT msgresponse */\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIST_OUT_LENMIN 8\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIST_OUT_LENMAX 252\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIST_OUT_LENMAX_MCDI2 1020\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIST_OUT_LEN(num) (8+4*(num))\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIST_OUT_HANDLES_NUM(len) (((len)-8)/4)\n+/* Generation count, which will be updated each time a sensor is added to or\n+ * removed from the MC sensor table.\n+ */\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIST_OUT_GENERATION_OFST 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIST_OUT_GENERATION_LEN 4\n+/* Number of sensors managed by the MC. Note that in principle, this can be\n+ * larger than the size of the HANDLES array.\n+ */\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIST_OUT_COUNT_OFST 4\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIST_OUT_COUNT_LEN 4\n+/* Array of sensor handles */\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIST_OUT_HANDLES_OFST 8\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIST_OUT_HANDLES_LEN 4\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIST_OUT_HANDLES_MINNUM 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIST_OUT_HANDLES_MAXNUM 61\n+#define\tMC_CMD_DYNAMIC_SENSORS_LIST_OUT_HANDLES_MAXNUM_MCDI2 253\n+\n+\n+/***********************************/\n+/* MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS\n+ * Get descriptions for a set of sensors, specified as an array of sensor\n+ * handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST\n+ *\n+ * Any handles which do not correspond to a sensor currently managed by the MC\n+ * will be dropped from from the response. This may happen when a sensor table\n+ * update is in progress, and effectively means the set of usable sensors is\n+ * the intersection between the sets of sensors known to the driver and the MC.\n+ *\n+ * On Riverhead this command is implemented as a a wrapper for\n+ * `get_descriptions` in the sensor_query SPHINX service.\n+ */\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS 0x67\n+#undef\tMC_CMD_0x67_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x67_PRIVILEGE_CTG SRIOV_CTG_GENERAL\n+\n+/* MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN msgrequest */\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_LENMIN 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_LENMAX 252\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_LENMAX_MCDI2 1020\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_LEN(num) (0+4*(num))\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_HANDLES_NUM(len) (((len)-0)/4)\n+/* Array of sensor handles */\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_HANDLES_OFST 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_HANDLES_LEN 4\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_HANDLES_MINNUM 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_HANDLES_MAXNUM 63\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_HANDLES_MAXNUM_MCDI2 255\n+\n+/* MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT msgresponse */\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_LENMIN 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_LENMAX 192\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_LENMAX_MCDI2 960\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_LEN(num) (0+64*(num))\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_SENSORS_NUM(len) (((len)-0)/64)\n+/* Array of MC_CMD_DYNAMIC_SENSORS_DESCRIPTION structures */\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_SENSORS_OFST 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_SENSORS_LEN 64\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_SENSORS_MINNUM 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_SENSORS_MAXNUM 3\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_SENSORS_MAXNUM_MCDI2 15\n+\n+\n+/***********************************/\n+/* MC_CMD_DYNAMIC_SENSORS_GET_READINGS\n+ * Read the state and value for a set of sensors, specified as an array of\n+ * sensor handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST.\n+ *\n+ * In the case of a broken sensor, then the state of the response's\n+ * MC_CMD_DYNAMIC_SENSORS_VALUE entry will be set to BROKEN, and any value\n+ * provided should be treated as erroneous.\n+ *\n+ * Any handles which do not correspond to a sensor currently managed by the MC\n+ * will be dropped from from the response. This may happen when a sensor table\n+ * update is in progress, and effectively means the set of usable sensors is\n+ * the intersection between the sets of sensors known to the driver and the MC.\n+ *\n+ * On Riverhead this command is implemented as a a wrapper for `get_readings`\n+ * in the sensor_query SPHINX service.\n+ */\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS 0x68\n+#undef\tMC_CMD_0x68_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x68_PRIVILEGE_CTG SRIOV_CTG_GENERAL\n+\n+/* MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN msgrequest */\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_LENMIN 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_LENMAX 252\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_LENMAX_MCDI2 1020\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_LEN(num) (0+4*(num))\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_NUM(len) (((len)-0)/4)\n+/* Array of sensor handles */\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_OFST 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_LEN 4\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_MINNUM 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_MAXNUM 63\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_MAXNUM_MCDI2 255\n+\n+/* MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT msgresponse */\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_LENMIN 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_LENMAX 252\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_LENMAX_MCDI2 1020\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_LEN(num) (0+12*(num))\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_NUM(len) (((len)-0)/12)\n+/* Array of MC_CMD_DYNAMIC_SENSORS_READING structures */\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_OFST 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_LEN 12\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_MINNUM 0\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_MAXNUM 21\n+#define\tMC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_MAXNUM_MCDI2 85\n+\n+\n+/***********************************/\n+/* MC_CMD_EVENT_CTRL\n+ * Configure which categories of unsolicited events the driver expects to\n+ * receive (Riverhead).\n+ */\n+#define\tMC_CMD_EVENT_CTRL 0x69\n+#undef\tMC_CMD_0x69_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x69_PRIVILEGE_CTG SRIOV_CTG_GENERAL\n+\n+/* MC_CMD_EVENT_CTRL_IN msgrequest */\n+#define\tMC_CMD_EVENT_CTRL_IN_LENMIN 0\n+#define\tMC_CMD_EVENT_CTRL_IN_LENMAX 252\n+#define\tMC_CMD_EVENT_CTRL_IN_LENMAX_MCDI2 1020\n+#define\tMC_CMD_EVENT_CTRL_IN_LEN(num) (0+4*(num))\n+#define\tMC_CMD_EVENT_CTRL_IN_EVENT_TYPE_NUM(len) (((len)-0)/4)\n+/* Array of event categories for which the driver wishes to receive events. */\n+#define\tMC_CMD_EVENT_CTRL_IN_EVENT_TYPE_OFST 0\n+#define\tMC_CMD_EVENT_CTRL_IN_EVENT_TYPE_LEN 4\n+#define\tMC_CMD_EVENT_CTRL_IN_EVENT_TYPE_MINNUM 0\n+#define\tMC_CMD_EVENT_CTRL_IN_EVENT_TYPE_MAXNUM 63\n+#define\tMC_CMD_EVENT_CTRL_IN_EVENT_TYPE_MAXNUM_MCDI2 255\n+/* enum: Driver wishes to receive LINKCHANGE events. */\n+#define\tMC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_LINKCHANGE 0x0\n+/* enum: Driver wishes to receive SENSOR_CHANGE and SENSOR_STATE_CHANGE events.\n+ */\n+#define\tMC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_SENSOREVT 0x1\n+/* enum: Driver wishes to receive receive errors. */\n+#define\tMC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_RX_ERR 0x2\n+/* enum: Driver wishes to receive transmit errors. */\n+#define\tMC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_TX_ERR 0x3\n+/* enum: Driver wishes to receive firmware alerts. */\n+#define\tMC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_FWALERT 0x4\n+/* enum: Driver wishes to receive reboot events. */\n+#define\tMC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_MC_REBOOT 0x5\n+\n+/* MC_CMD_EVENT_CTRL_OUT msgrequest */\n+#define\tMC_CMD_EVENT_CTRL_OUT_LEN 0\n+\n /* MC_CMD_RESOURCE_SPECIFIER enum */\n /* enum: Any */\n #define\tMC_CMD_RESOURCE_INSTANCE_ANY 0xffffffff\n@@ -7229,6 +7843,8 @@\n #define\tNVRAM_PARTITION_TYPE_BUNDLE_METADATA 0x1e01\n /* enum: Bundle update non-volatile log output partition */\n #define\tNVRAM_PARTITION_TYPE_BUNDLE_LOG 0x1e02\n+/* enum: Partition for Solarflare gPXE bootrom installed via Bundle update. */\n+#define\tNVRAM_PARTITION_TYPE_EXPANSION_ROM_INTERNAL 0x1e03\n /* enum: Start of reserved value range (firmware may use for any purpose) */\n #define\tNVRAM_PARTITION_TYPE_RESERVED_VALUES_MIN 0xff00\n /* enum: End of reserved value range (firmware may use for any purpose) */\n@@ -7529,6 +8145,7 @@\n #define\tMC_CMD_INIT_EVQ_IN_LENMAX 548\n #define\tMC_CMD_INIT_EVQ_IN_LENMAX_MCDI2 548\n #define\tMC_CMD_INIT_EVQ_IN_LEN(num) (36+8*(num))\n+#define\tMC_CMD_INIT_EVQ_IN_DMA_ADDR_NUM(len) (((len)-36)/8)\n /* Size, in entries */\n #define\tMC_CMD_INIT_EVQ_IN_SIZE_OFST 0\n #define\tMC_CMD_INIT_EVQ_IN_SIZE_LEN 4\n@@ -7614,6 +8231,7 @@\n #define\tMC_CMD_INIT_EVQ_V2_IN_LENMAX 548\n #define\tMC_CMD_INIT_EVQ_V2_IN_LENMAX_MCDI2 548\n #define\tMC_CMD_INIT_EVQ_V2_IN_LEN(num) (36+8*(num))\n+#define\tMC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_NUM(len) (((len)-36)/8)\n /* Size, in entries */\n #define\tMC_CMD_INIT_EVQ_V2_IN_SIZE_OFST 0\n #define\tMC_CMD_INIT_EVQ_V2_IN_SIZE_LEN 4\n@@ -7764,6 +8382,7 @@\n #define\tMC_CMD_INIT_RXQ_IN_LENMAX 252\n #define\tMC_CMD_INIT_RXQ_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_INIT_RXQ_IN_LEN(num) (28+8*(num))\n+#define\tMC_CMD_INIT_RXQ_IN_DMA_ADDR_NUM(len) (((len)-28)/8)\n /* Size, in entries */\n #define\tMC_CMD_INIT_RXQ_IN_SIZE_OFST 0\n #define\tMC_CMD_INIT_RXQ_IN_SIZE_LEN 4\n@@ -8136,6 +8755,139 @@\n #define\tMC_CMD_INIT_RXQ_V4_IN_BUFFER_SIZE_BYTES_OFST 560\n #define\tMC_CMD_INIT_RXQ_V4_IN_BUFFER_SIZE_BYTES_LEN 4\n \n+/* MC_CMD_INIT_RXQ_V5_IN msgrequest: INIT_RXQ request with ability to request a\n+ * different RX packet prefix\n+ */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_LEN 568\n+/* Size, in entries */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_SIZE_OFST 0\n+#define\tMC_CMD_INIT_RXQ_V5_IN_SIZE_LEN 4\n+/* The EVQ to send events to. This is an index originally specified to\n+ * INIT_EVQ. If DMA_MODE == PACKED_STREAM this must be equal to INSTANCE.\n+ */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_TARGET_EVQ_OFST 4\n+#define\tMC_CMD_INIT_RXQ_V5_IN_TARGET_EVQ_LEN 4\n+/* The value to put in the event data. Check hardware spec. for valid range.\n+ * This field is ignored if DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER or DMA_MODE\n+ * == PACKED_STREAM.\n+ */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_LABEL_OFST 8\n+#define\tMC_CMD_INIT_RXQ_V5_IN_LABEL_LEN 4\n+/* Desired instance. Must be set to a specific instance, which is a function\n+ * local queue index.\n+ */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_INSTANCE_OFST 12\n+#define\tMC_CMD_INIT_RXQ_V5_IN_INSTANCE_LEN 4\n+/* There will be more flags here. */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAGS_OFST 16\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAGS_LEN 4\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_BUFF_MODE_LBN 0\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_BUFF_MODE_WIDTH 1\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_HDR_SPLIT_LBN 1\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_HDR_SPLIT_WIDTH 1\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_TIMESTAMP_LBN 2\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_TIMESTAMP_WIDTH 1\n+#define\tMC_CMD_INIT_RXQ_V5_IN_CRC_MODE_LBN 3\n+#define\tMC_CMD_INIT_RXQ_V5_IN_CRC_MODE_WIDTH 4\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_CHAIN_LBN 7\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_CHAIN_WIDTH 1\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_PREFIX_LBN 8\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_PREFIX_WIDTH 1\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_DISABLE_SCATTER_LBN 9\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_DISABLE_SCATTER_WIDTH 1\n+#define\tMC_CMD_INIT_RXQ_V5_IN_DMA_MODE_LBN 10\n+#define\tMC_CMD_INIT_RXQ_V5_IN_DMA_MODE_WIDTH 4\n+/* enum: One packet per descriptor (for normal networking) */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_SINGLE_PACKET 0x0\n+/* enum: Pack multiple packets into large descriptors (for SolarCapture) */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_PACKED_STREAM 0x1\n+/* enum: Pack multiple packets into large descriptors using the format designed\n+ * to maximise packet rate. This mode uses 1 \"bucket\" per descriptor with\n+ * multiple fixed-size packet buffers within each bucket. For a full\n+ * description see SF-119419-TC. This mode is only supported by \"dpdk\" datapath\n+ * firmware.\n+ */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_EQUAL_STRIDE_SUPER_BUFFER 0x2\n+/* enum: Deprecated name for EQUAL_STRIDE_SUPER_BUFFER. */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_EQUAL_STRIDE_PACKED_STREAM 0x2\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_SNAPSHOT_MODE_LBN 14\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_SNAPSHOT_MODE_WIDTH 1\n+#define\tMC_CMD_INIT_RXQ_V5_IN_PACKED_STREAM_BUFF_SIZE_LBN 15\n+#define\tMC_CMD_INIT_RXQ_V5_IN_PACKED_STREAM_BUFF_SIZE_WIDTH 3\n+#define\tMC_CMD_INIT_RXQ_V5_IN_PS_BUFF_1M 0x0 /* enum */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_PS_BUFF_512K 0x1 /* enum */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_PS_BUFF_256K 0x2 /* enum */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_PS_BUFF_128K 0x3 /* enum */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_PS_BUFF_64K 0x4 /* enum */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_WANT_OUTER_CLASSES_LBN 18\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_WANT_OUTER_CLASSES_WIDTH 1\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_FORCE_EV_MERGING_LBN 19\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_FORCE_EV_MERGING_WIDTH 1\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_NO_CONT_EV_LBN 20\n+#define\tMC_CMD_INIT_RXQ_V5_IN_FLAG_NO_CONT_EV_WIDTH 1\n+/* Owner ID to use if in buffer mode (zero if physical) */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_OWNER_ID_OFST 20\n+#define\tMC_CMD_INIT_RXQ_V5_IN_OWNER_ID_LEN 4\n+/* The port ID associated with the v-adaptor which should contain this DMAQ. */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_PORT_ID_OFST 24\n+#define\tMC_CMD_INIT_RXQ_V5_IN_PORT_ID_LEN 4\n+/* 64-bit address of 4k of 4k-aligned host memory buffer */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_OFST 28\n+#define\tMC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LEN 8\n+#define\tMC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_OFST 28\n+#define\tMC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_OFST 32\n+#define\tMC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_NUM 64\n+/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_SNAPSHOT_LENGTH_OFST 540\n+#define\tMC_CMD_INIT_RXQ_V5_IN_SNAPSHOT_LENGTH_LEN 4\n+/* The number of packet buffers that will be contained within each\n+ * EQUAL_STRIDE_SUPER_BUFFER format bucket supplied by the driver. This field\n+ * is ignored unless DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER.\n+ */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_ES_PACKET_BUFFERS_PER_BUCKET_OFST 544\n+#define\tMC_CMD_INIT_RXQ_V5_IN_ES_PACKET_BUFFERS_PER_BUCKET_LEN 4\n+/* The length in bytes of the area in each packet buffer that can be written to\n+ * by the adapter. This is used to store the packet prefix and the packet\n+ * payload. This length does not include any end padding added by the driver.\n+ * This field is ignored unless DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER.\n+ */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_ES_MAX_DMA_LEN_OFST 548\n+#define\tMC_CMD_INIT_RXQ_V5_IN_ES_MAX_DMA_LEN_LEN 4\n+/* The length in bytes of a single packet buffer within a\n+ * EQUAL_STRIDE_SUPER_BUFFER format bucket. This field is ignored unless\n+ * DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER.\n+ */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_ES_PACKET_STRIDE_OFST 552\n+#define\tMC_CMD_INIT_RXQ_V5_IN_ES_PACKET_STRIDE_LEN 4\n+/* The maximum time in nanoseconds that the datapath will be backpressured if\n+ * there are no RX descriptors available. If the timeout is reached and there\n+ * are still no descriptors then the packet will be dropped. A timeout of 0\n+ * means the datapath will never be blocked. This field is ignored unless\n+ * DMA_MODE == EQUAL_STRIDE_SUPER_BUFFER.\n+ */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_OFST 556\n+#define\tMC_CMD_INIT_RXQ_V5_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_LEN 4\n+/* V4 message data */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_V4_DATA_OFST 560\n+#define\tMC_CMD_INIT_RXQ_V5_IN_V4_DATA_LEN 4\n+/* Size in bytes of buffers attached to descriptors posted to this queue. Set\n+ * to zero if using this message on non-QDMA based platforms. Currently in\n+ * Riverhead there is a global limit of eight different buffer sizes across all\n+ * active queues. A 2KB and 4KB buffer is guaranteed to be available, but a\n+ * request for a different buffer size will fail if there are already eight\n+ * other buffer sizes in use. In future Riverhead this limit will go away and\n+ * any size will be accepted.\n+ */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_BUFFER_SIZE_BYTES_OFST 560\n+#define\tMC_CMD_INIT_RXQ_V5_IN_BUFFER_SIZE_BYTES_LEN 4\n+/* Prefix id for the RX prefix format to use on packets delivered this queue.\n+ * Zero is always a valid prefix id and means the default prefix format\n+ * documented for the platform. Other prefix ids can be obtained by calling\n+ * MC_CMD_GET_RX_PREFIX_ID with a requested set of prefix fields.\n+ */\n+#define\tMC_CMD_INIT_RXQ_V5_IN_RX_PREFIX_ID_OFST 564\n+#define\tMC_CMD_INIT_RXQ_V5_IN_RX_PREFIX_ID_LEN 4\n+\n /* MC_CMD_INIT_RXQ_OUT msgresponse */\n #define\tMC_CMD_INIT_RXQ_OUT_LEN 0\n \n@@ -8148,6 +8900,9 @@\n /* MC_CMD_INIT_RXQ_V4_OUT msgresponse */\n #define\tMC_CMD_INIT_RXQ_V4_OUT_LEN 0\n \n+/* MC_CMD_INIT_RXQ_V5_OUT msgresponse */\n+#define\tMC_CMD_INIT_RXQ_V5_OUT_LEN 0\n+\n \n /***********************************/\n /* MC_CMD_INIT_TXQ\n@@ -8164,6 +8919,7 @@\n #define\tMC_CMD_INIT_TXQ_IN_LENMAX 252\n #define\tMC_CMD_INIT_TXQ_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_INIT_TXQ_IN_LEN(num) (28+8*(num))\n+#define\tMC_CMD_INIT_TXQ_IN_DMA_ADDR_NUM(len) (((len)-28)/8)\n /* Size, in entries */\n #define\tMC_CMD_INIT_TXQ_IN_SIZE_OFST 0\n #define\tMC_CMD_INIT_TXQ_IN_SIZE_LEN 4\n@@ -8633,6 +9389,7 @@\n #define\tMC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMAX 268\n #define\tMC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMAX_MCDI2 268\n #define\tMC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LEN(num) (12+8*(num))\n+#define\tMC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_NUM(len) (((len)-12)/8)\n #define\tMC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_HANDLE_OFST 0\n #define\tMC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_HANDLE_LEN 4\n /* ID */\n@@ -9413,6 +10170,7 @@\n #define\tMC_CMD_GET_PARSER_DISP_INFO_OUT_LENMAX 252\n #define\tMC_CMD_GET_PARSER_DISP_INFO_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_GET_PARSER_DISP_INFO_OUT_LEN(num) (8+4*(num))\n+#define\tMC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_NUM(len) (((len)-8)/4)\n /* identifies the type of operation requested */\n #define\tMC_CMD_GET_PARSER_DISP_INFO_OUT_OP_OFST 0\n #define\tMC_CMD_GET_PARSER_DISP_INFO_OUT_OP_LEN 4\n@@ -10192,6 +10950,7 @@\n #define\tMC_CMD_SATELLITE_DOWNLOAD_IN_LENMAX 252\n #define\tMC_CMD_SATELLITE_DOWNLOAD_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_SATELLITE_DOWNLOAD_IN_LEN(num) (16+4*(num))\n+#define\tMC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_NUM(len) (((len)-16)/4)\n /* Download phase. (Note: the IDLE phase is used internally and is never valid\n  * in a command from the host.)\n  */\n@@ -10798,8 +11557,14 @@\n #define\tMC_CMD_GET_CAPABILITIES_V2_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1\n #define\tMC_CMD_GET_CAPABILITIES_V2_OUT_BUNDLE_UPDATE_LBN 28\n #define\tMC_CMD_GET_CAPABILITIES_V2_OUT_BUNDLE_UPDATE_WIDTH 1\n-/* Number of FATSOv2 contexts per datapath supported by this NIC. Not present\n- * on older firmware (check the length).\n+#define\tMC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V3_LBN 29\n+#define\tMC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V3_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V2_OUT_DYNAMIC_SENSORS_LBN 30\n+#define\tMC_CMD_GET_CAPABILITIES_V2_OUT_DYNAMIC_SENSORS_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V2_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN 31\n+#define\tMC_CMD_GET_CAPABILITIES_V2_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1\n+/* Number of FATSOv2 contexts per datapath supported by this NIC (when\n+ * TX_TSO_V2 == 1). Not present on older firmware (check the length).\n  */\n #define\tMC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V2_N_CONTEXTS_OFST 24\n #define\tMC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V2_N_CONTEXTS_LEN 2\n@@ -11133,8 +11898,14 @@\n #define\tMC_CMD_GET_CAPABILITIES_V3_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1\n #define\tMC_CMD_GET_CAPABILITIES_V3_OUT_BUNDLE_UPDATE_LBN 28\n #define\tMC_CMD_GET_CAPABILITIES_V3_OUT_BUNDLE_UPDATE_WIDTH 1\n-/* Number of FATSOv2 contexts per datapath supported by this NIC. Not present\n- * on older firmware (check the length).\n+#define\tMC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V3_LBN 29\n+#define\tMC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V3_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V3_OUT_DYNAMIC_SENSORS_LBN 30\n+#define\tMC_CMD_GET_CAPABILITIES_V3_OUT_DYNAMIC_SENSORS_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V3_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN 31\n+#define\tMC_CMD_GET_CAPABILITIES_V3_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1\n+/* Number of FATSOv2 contexts per datapath supported by this NIC (when\n+ * TX_TSO_V2 == 1). Not present on older firmware (check the length).\n  */\n #define\tMC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V2_N_CONTEXTS_OFST 24\n #define\tMC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V2_N_CONTEXTS_LEN 2\n@@ -11493,8 +12264,14 @@\n #define\tMC_CMD_GET_CAPABILITIES_V4_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1\n #define\tMC_CMD_GET_CAPABILITIES_V4_OUT_BUNDLE_UPDATE_LBN 28\n #define\tMC_CMD_GET_CAPABILITIES_V4_OUT_BUNDLE_UPDATE_WIDTH 1\n-/* Number of FATSOv2 contexts per datapath supported by this NIC. Not present\n- * on older firmware (check the length).\n+#define\tMC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V3_LBN 29\n+#define\tMC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V3_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V4_OUT_DYNAMIC_SENSORS_LBN 30\n+#define\tMC_CMD_GET_CAPABILITIES_V4_OUT_DYNAMIC_SENSORS_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V4_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN 31\n+#define\tMC_CMD_GET_CAPABILITIES_V4_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1\n+/* Number of FATSOv2 contexts per datapath supported by this NIC (when\n+ * TX_TSO_V2 == 1). Not present on older firmware (check the length).\n  */\n #define\tMC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V2_N_CONTEXTS_OFST 24\n #define\tMC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V2_N_CONTEXTS_LEN 2\n@@ -11861,8 +12638,14 @@\n #define\tMC_CMD_GET_CAPABILITIES_V5_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1\n #define\tMC_CMD_GET_CAPABILITIES_V5_OUT_BUNDLE_UPDATE_LBN 28\n #define\tMC_CMD_GET_CAPABILITIES_V5_OUT_BUNDLE_UPDATE_WIDTH 1\n-/* Number of FATSOv2 contexts per datapath supported by this NIC. Not present\n- * on older firmware (check the length).\n+#define\tMC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V3_LBN 29\n+#define\tMC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V3_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V5_OUT_DYNAMIC_SENSORS_LBN 30\n+#define\tMC_CMD_GET_CAPABILITIES_V5_OUT_DYNAMIC_SENSORS_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V5_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN 31\n+#define\tMC_CMD_GET_CAPABILITIES_V5_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1\n+/* Number of FATSOv2 contexts per datapath supported by this NIC (when\n+ * TX_TSO_V2 == 1). Not present on older firmware (check the length).\n  */\n #define\tMC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V2_N_CONTEXTS_OFST 24\n #define\tMC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V2_N_CONTEXTS_LEN 2\n@@ -11955,6 +12738,396 @@\n #define\tMC_CMD_GET_CAPABILITIES_V5_OUT_FILTER_ACTION_MARK_MAX_OFST 80\n #define\tMC_CMD_GET_CAPABILITIES_V5_OUT_FILTER_ACTION_MARK_MAX_LEN 4\n \n+/* MC_CMD_GET_CAPABILITIES_V6_OUT msgresponse */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_LEN 148\n+/* First word of flags. */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_FLAGS1_OFST 0\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_FLAGS1_LEN 4\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VPORT_RECONFIGURE_LBN 3\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VPORT_RECONFIGURE_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_STRIPING_LBN 4\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_STRIPING_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VADAPTOR_QUERY_LBN 5\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VADAPTOR_QUERY_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_EVB_PORT_VLAN_RESTRICT_LBN 6\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_DRV_ATTACH_PREBOOT_LBN 7\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_DRV_ATTACH_PREBOOT_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_FORCE_EVENT_MERGING_LBN 8\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_FORCE_EVENT_MERGING_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_SET_MAC_ENHANCED_LBN 9\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_SET_MAC_ENHANCED_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_LBN 10\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN 11\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_MAC_SECURITY_FILTERING_LBN 12\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_ADDITIONAL_RSS_MODES_LBN 13\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_ADDITIONAL_RSS_MODES_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_QBB_LBN 14\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_QBB_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN 15\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_RSS_LIMITED_LBN 16\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_RSS_LIMITED_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_PACKED_STREAM_LBN 17\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_PACKED_STREAM_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_INCLUDE_FCS_LBN 18\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_INCLUDE_FCS_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_VLAN_INSERTION_LBN 19\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_VLAN_INSERTION_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_VLAN_STRIPPING_LBN 20\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_VLAN_STRIPPING_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_LBN 21\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_PREFIX_LEN_0_LBN 22\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_PREFIX_LEN_0_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_PREFIX_LEN_14_LBN 23\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_PREFIX_LEN_14_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_TIMESTAMP_LBN 24\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_TIMESTAMP_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_BATCHING_LBN 25\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_BATCHING_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_MCAST_FILTER_CHAINING_LBN 26\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_MCAST_FILTER_CHAINING_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_PM_AND_RXDP_COUNTERS_LBN 27\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_DISABLE_SCATTER_LBN 28\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_DISABLE_SCATTER_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_MCAST_UDP_LOOPBACK_LBN 29\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_EVB_LBN 30\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_EVB_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VXLAN_NVGRE_LBN 31\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VXLAN_NVGRE_WIDTH 1\n+/* RxDPCPU firmware id. */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_DPCPU_FW_ID_OFST 4\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_DPCPU_FW_ID_LEN 2\n+/* enum: Standard RXDP firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP 0x0\n+/* enum: Low latency RXDP firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_LOW_LATENCY 0x1\n+/* enum: Packed stream RXDP firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_PACKED_STREAM 0x2\n+/* enum: Rules engine RXDP firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_RULES_ENGINE 0x5\n+/* enum: DPDK RXDP firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_DPDK 0x6\n+/* enum: BIST RXDP firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_BIST 0x10a\n+/* enum: RXDP Test firmware image 1 */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH 0x101\n+/* enum: RXDP Test firmware image 2 */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD 0x102\n+/* enum: RXDP Test firmware image 3 */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST 0x103\n+/* enum: RXDP Test firmware image 4 */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE 0x104\n+/* enum: RXDP Test firmware image 5 */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_BACKPRESSURE 0x105\n+/* enum: RXDP Test firmware image 6 */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_FW_PACKET_EDITS 0x106\n+/* enum: RXDP Test firmware image 7 */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_FW_RX_HDR_SPLIT 0x107\n+/* enum: RXDP Test firmware image 8 */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_FW_DISABLE_DL 0x108\n+/* enum: RXDP Test firmware image 9 */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_FW_DOORBELL_DELAY 0x10b\n+/* enum: RXDP Test firmware image 10 */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_TEST_FW_SLOW 0x10c\n+/* TxDPCPU firmware id. */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_DPCPU_FW_ID_OFST 6\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_DPCPU_FW_ID_LEN 2\n+/* enum: Standard TXDP firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXDP 0x0\n+/* enum: Low latency TXDP firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXDP_LOW_LATENCY 0x1\n+/* enum: High packet rate TXDP firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXDP_HIGH_PACKET_RATE 0x3\n+/* enum: Rules engine TXDP firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXDP_RULES_ENGINE 0x5\n+/* enum: DPDK TXDP firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXDP_DPDK 0x6\n+/* enum: BIST TXDP firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXDP_BIST 0x12d\n+/* enum: TXDP Test firmware image 1 */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXDP_TEST_FW_TSO_EDIT 0x101\n+/* enum: TXDP Test firmware image 2 */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXDP_TEST_FW_PACKET_EDITS 0x102\n+/* enum: TXDP CSR bus test firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXDP_TEST_FW_CSR 0x103\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_VERSION_OFST 8\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_VERSION_LEN 2\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_VERSION_REV_LBN 0\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_VERSION_REV_WIDTH 12\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_VERSION_TYPE_LBN 12\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4\n+/* enum: reserved value - do not use (may indicate alternative interpretation\n+ * of REV field in future)\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_RESERVED 0x0\n+/* enum: Trivial RX PD firmware for early Huntington development (Huntington\n+ * development only)\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_FIRST_PKT 0x1\n+/* enum: RX PD firmware for telemetry prototyping (Medford2 development only)\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY 0x1\n+/* enum: RX PD firmware with approximately Siena-compatible behaviour\n+ * (Huntington development only)\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_SIENA_COMPAT 0x2\n+/* enum: Full featured RX PD production firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_FULL_FEATURED 0x3\n+/* enum: (deprecated original name for the FULL_FEATURED variant) */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_VSWITCH 0x3\n+/* enum: siena_compat variant RX PD firmware using PM rather than MAC\n+ * (Huntington development only)\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM 0x4\n+/* enum: Low latency RX PD production firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_LOW_LATENCY 0x5\n+/* enum: Packed stream RX PD production firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_PACKED_STREAM 0x6\n+/* enum: RX PD firmware handling layer 2 only for high packet rate performance\n+ * tests (Medford development only)\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_LAYER2_PERF 0x7\n+/* enum: Rules engine RX PD production firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_RULES_ENGINE 0x8\n+/* enum: Custom firmware variant (see SF-119495-PD and bug69716) */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_L3XUDP 0x9\n+/* enum: DPDK RX PD production firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_DPDK 0xa\n+/* enum: RX PD firmware for GUE parsing prototype (Medford development only) */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE 0xe\n+/* enum: RX PD firmware parsing but not filtering network overlay tunnel\n+ * encapsulations (Medford development only)\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY 0xf\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_VERSION_OFST 10\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_VERSION_LEN 2\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_VERSION_REV_LBN 0\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_VERSION_REV_WIDTH 12\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_VERSION_TYPE_LBN 12\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4\n+/* enum: reserved value - do not use (may indicate alternative interpretation\n+ * of REV field in future)\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_RESERVED 0x0\n+/* enum: Trivial TX PD firmware for early Huntington development (Huntington\n+ * development only)\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_FIRST_PKT 0x1\n+/* enum: TX PD firmware for telemetry prototyping (Medford2 development only)\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY 0x1\n+/* enum: TX PD firmware with approximately Siena-compatible behaviour\n+ * (Huntington development only)\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_SIENA_COMPAT 0x2\n+/* enum: Full featured TX PD production firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_FULL_FEATURED 0x3\n+/* enum: (deprecated original name for the FULL_FEATURED variant) */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_VSWITCH 0x3\n+/* enum: siena_compat variant TX PD firmware using PM rather than MAC\n+ * (Huntington development only)\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM 0x4\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_LOW_LATENCY 0x5 /* enum */\n+/* enum: TX PD firmware handling layer 2 only for high packet rate performance\n+ * tests (Medford development only)\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_LAYER2_PERF 0x7\n+/* enum: Rules engine TX PD production firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_RULES_ENGINE 0x8\n+/* enum: Custom firmware variant (see SF-119495-PD and bug69716) */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_L3XUDP 0x9\n+/* enum: DPDK TX PD production firmware */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_DPDK 0xa\n+/* enum: RX PD firmware for GUE parsing prototype (Medford development only) */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE 0xe\n+/* Hardware capabilities of NIC */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_HW_CAPABILITIES_OFST 12\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_HW_CAPABILITIES_LEN 4\n+/* Licensed capabilities */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_LICENSE_CAPABILITIES_OFST 16\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_LICENSE_CAPABILITIES_LEN 4\n+/* Second word of flags. Not present on older firmware (check the length). */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_FLAGS2_OFST 20\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_FLAGS2_LEN 4\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_LBN 0\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_ENCAP_LBN 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_ENCAP_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_EVQ_TIMER_CTRL_LBN 2\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_EVQ_TIMER_CTRL_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_EVENT_CUT_THROUGH_LBN 3\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_EVENT_CUT_THROUGH_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_CUT_THROUGH_LBN 4\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_CUT_THROUGH_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_VFIFO_ULL_MODE_LBN 5\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_VFIFO_ULL_MODE_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_MAC_STATS_40G_TX_SIZE_BINS_LBN 6\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_INIT_EVQ_V2_LBN 7\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_INIT_EVQ_V2_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_MAC_TIMESTAMPING_LBN 8\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_MAC_TIMESTAMPING_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_TIMESTAMP_LBN 9\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_TIMESTAMP_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_SNIFF_LBN 10\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_SNIFF_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_SNIFF_LBN 11\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_SNIFF_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_LBN 12\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_MCDI_BACKGROUND_LBN 13\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_MCDI_BACKGROUND_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_MCDI_DB_RETURN_LBN 14\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_MCDI_DB_RETURN_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_CTPIO_LBN 15\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_CTPIO_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TSA_SUPPORT_LBN 16\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TSA_SUPPORT_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TSA_BOUND_LBN 17\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TSA_BOUND_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_SF_ADAPTER_AUTHENTICATION_LBN 18\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_FLAG_LBN 19\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_FLAG_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_MARK_LBN 20\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_MARK_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_EQUAL_STRIDE_SUPER_BUFFER_LBN 21\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_EQUAL_STRIDE_PACKED_STREAM_LBN 21\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_L3XUDP_SUPPORT_LBN 22\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_L3XUDP_SUPPORT_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_FW_SUBVARIANT_NO_TX_CSUM_LBN 23\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VI_SPREADING_LBN 24\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VI_SPREADING_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_HLB_IDLE_LBN 25\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_HLB_IDLE_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_INIT_RXQ_NO_CONT_EV_LBN 26\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN 27\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_BUNDLE_UPDATE_LBN 28\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_BUNDLE_UPDATE_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V3_LBN 29\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V3_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_DYNAMIC_SENSORS_LBN 30\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_DYNAMIC_SENSORS_WIDTH 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN 31\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1\n+/* Number of FATSOv2 contexts per datapath supported by this NIC (when\n+ * TX_TSO_V2 == 1). Not present on older firmware (check the length).\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_N_CONTEXTS_OFST 24\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_N_CONTEXTS_LEN 2\n+/* One byte per PF containing the number of the external port assigned to this\n+ * PF, indexed by PF number. Special values indicate that a PF is either not\n+ * present or not assigned.\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_PFS_TO_PORTS_ASSIGNMENT_OFST 26\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_PFS_TO_PORTS_ASSIGNMENT_NUM 16\n+/* enum: The caller is not permitted to access information on this PF. */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_ACCESS_NOT_PERMITTED 0xff\n+/* enum: PF does not exist. */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_PF_NOT_PRESENT 0xfe\n+/* enum: PF does exist but is not assigned to any external port. */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_PF_NOT_ASSIGNED 0xfd\n+/* enum: This value indicates that PF is assigned, but it cannot be expressed\n+ * in this field. It is intended for a possible future situation where a more\n+ * complex scheme of PFs to ports mapping is being used. The future driver\n+ * should look for a new field supporting the new scheme. The current/old\n+ * driver should treat this value as PF_NOT_ASSIGNED.\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_INCOMPATIBLE_ASSIGNMENT 0xfc\n+/* One byte per PF containing the number of its VFs, indexed by PF number. A\n+ * special value indicates that a PF is not present.\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VFS_PER_PF_OFST 42\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VFS_PER_PF_LEN 1\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VFS_PER_PF_NUM 16\n+/* enum: The caller is not permitted to access information on this PF. */\n+/*               MC_CMD_GET_CAPABILITIES_V6_OUT_ACCESS_NOT_PERMITTED 0xff */\n+/* enum: PF does not exist. */\n+/*               MC_CMD_GET_CAPABILITIES_V6_OUT_PF_NOT_PRESENT 0xfe */\n+/* Number of VIs available for each external port */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_OFST 58\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_LEN 2\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_NUM 4\n+/* Size of RX descriptor cache expressed as binary logarithm The actual size\n+ * equals (2 ^ RX_DESC_CACHE_SIZE)\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_DESC_CACHE_SIZE_OFST 66\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_RX_DESC_CACHE_SIZE_LEN 1\n+/* Size of TX descriptor cache expressed as binary logarithm The actual size\n+ * equals (2 ^ TX_DESC_CACHE_SIZE)\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_DESC_CACHE_SIZE_OFST 67\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_TX_DESC_CACHE_SIZE_LEN 1\n+/* Total number of available PIO buffers */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_NUM_PIO_BUFFS_OFST 68\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_NUM_PIO_BUFFS_LEN 2\n+/* Size of a single PIO buffer */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_SIZE_PIO_BUFF_OFST 70\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_SIZE_PIO_BUFF_LEN 2\n+/* On chips later than Medford the amount of address space assigned to each VI\n+ * is configurable. This is a global setting that the driver must query to\n+ * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available\n+ * with 8k VI windows.\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VI_WINDOW_MODE_OFST 72\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VI_WINDOW_MODE_LEN 1\n+/* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.\n+ * CTPIO is not mapped.\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VI_WINDOW_MODE_8K 0x0\n+/* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VI_WINDOW_MODE_16K 0x1\n+/* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VI_WINDOW_MODE_64K 0x2\n+/* Number of vFIFOs per adapter that can be used for VFIFO Stuffing\n+ * (SF-115995-SW) in the present configuration of firmware and port mode.\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VFIFO_STUFFING_NUM_VFIFOS_OFST 73\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN 1\n+/* Number of buffers per adapter that can be used for VFIFO Stuffing\n+ * (SF-115995-SW) in the present configuration of firmware and port mode.\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_OFST 74\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_LEN 2\n+/* Entry count in the MAC stats array, including the final GENERATION_END\n+ * entry. For MAC stats DMA, drivers should allocate a buffer large enough to\n+ * hold at least this many 64-bit stats values, if they wish to receive all\n+ * available stats. If the buffer is shorter than MAC_STATS_NUM_STATS * 8, the\n+ * stats array returned will be truncated.\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_MAC_STATS_NUM_STATS_OFST 76\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_MAC_STATS_NUM_STATS_LEN 2\n+/* Maximum supported value for MC_CMD_FILTER_OP_V3/MATCH_MARK_VALUE. This field\n+ * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set.\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_MARK_MAX_OFST 80\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_MARK_MAX_LEN 4\n+/* On devices where the INIT_RXQ_WITH_BUFFER_SIZE flag (in\n+ * GET_CAPABILITIES_OUT_V2) is set, drivers have to specify a buffer size when\n+ * they create an RX queue. Due to hardware limitations, only a small number of\n+ * different buffer sizes may be available concurrently. Nonzero entries in\n+ * this array are the sizes of buffers which the system guarantees will be\n+ * available for use. If the list is empty, there are no limitations on\n+ * concurrent buffer sizes.\n+ */\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_GUARANTEED_RX_BUFFER_SIZES_OFST 84\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN 4\n+#define\tMC_CMD_GET_CAPABILITIES_V6_OUT_GUARANTEED_RX_BUFFER_SIZES_NUM 16\n+\n \n /***********************************/\n /* MC_CMD_V2_EXTN\n@@ -13071,6 +14244,7 @@\n #define\tMC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LENMAX 250\n #define\tMC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LENMAX_MCDI2 1018\n #define\tMC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LEN(num) (4+6*(num))\n+#define\tMC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_NUM(len) (((len)-4)/6)\n /* The number of MAC addresses returned */\n #define\tMC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_COUNT_OFST 0\n #define\tMC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_COUNT_LEN 4\n@@ -13187,6 +14361,7 @@\n #define\tMC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LENMAX 252\n #define\tMC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LEN(num) (0+12*(num))\n+#define\tMC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_NUM(len) (((len)-0)/12)\n /* Raw buffer table entries, layed out as BUFTBL_ENTRY. */\n #define\tMC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_OFST 0\n #define\tMC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_LEN 12\n@@ -13523,6 +14698,7 @@\n #define\tMC_CMD_CAP_BLK_READ_OUT_LENMAX 248\n #define\tMC_CMD_CAP_BLK_READ_OUT_LENMAX_MCDI2 1016\n #define\tMC_CMD_CAP_BLK_READ_OUT_LEN(num) (0+8*(num))\n+#define\tMC_CMD_CAP_BLK_READ_OUT_BUFFER_NUM(len) (((len)-0)/8)\n #define\tMC_CMD_CAP_BLK_READ_OUT_BUFFER_OFST 0\n #define\tMC_CMD_CAP_BLK_READ_OUT_BUFFER_LEN 8\n #define\tMC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_OFST 0\n@@ -13761,6 +14937,7 @@\n #define\tMC_CMD_UART_SEND_DATA_OUT_LENMAX 252\n #define\tMC_CMD_UART_SEND_DATA_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_UART_SEND_DATA_OUT_LEN(num) (16+1*(num))\n+#define\tMC_CMD_UART_SEND_DATA_OUT_DATA_NUM(len) (((len)-16)/1)\n /* CRC32 over OFFSET, LENGTH, RESERVED, DATA */\n #define\tMC_CMD_UART_SEND_DATA_OUT_CHECKSUM_OFST 0\n #define\tMC_CMD_UART_SEND_DATA_OUT_CHECKSUM_LEN 4\n@@ -13813,6 +14990,7 @@\n #define\tMC_CMD_UART_RECV_DATA_IN_LENMAX 252\n #define\tMC_CMD_UART_RECV_DATA_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_UART_RECV_DATA_IN_LEN(num) (16+1*(num))\n+#define\tMC_CMD_UART_RECV_DATA_IN_DATA_NUM(len) (((len)-16)/1)\n /* CRC32 over RESERVED1, RESERVED2, RESERVED3, DATA */\n #define\tMC_CMD_UART_RECV_DATA_IN_CHECKSUM_OFST 0\n #define\tMC_CMD_UART_RECV_DATA_IN_CHECKSUM_LEN 4\n@@ -13855,6 +15033,7 @@\n #define\tMC_CMD_READ_FUSES_OUT_LENMAX 252\n #define\tMC_CMD_READ_FUSES_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_READ_FUSES_OUT_LEN(num) (4+1*(num))\n+#define\tMC_CMD_READ_FUSES_OUT_DATA_NUM(len) (((len)-4)/1)\n /* Length of returned OTP data in bytes */\n #define\tMC_CMD_READ_FUSES_OUT_LENGTH_OFST 0\n #define\tMC_CMD_READ_FUSES_OUT_LENGTH_LEN 4\n@@ -13880,6 +15059,7 @@\n #define\tMC_CMD_KR_TUNE_IN_LENMAX 252\n #define\tMC_CMD_KR_TUNE_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_KR_TUNE_IN_LEN(num) (4+4*(num))\n+#define\tMC_CMD_KR_TUNE_IN_KR_TUNE_ARGS_NUM(len) (((len)-4)/4)\n /* Requested operation */\n #define\tMC_CMD_KR_TUNE_IN_KR_TUNE_OP_OFST 0\n #define\tMC_CMD_KR_TUNE_IN_KR_TUNE_OP_LEN 1\n@@ -13935,6 +15115,7 @@\n #define\tMC_CMD_KR_TUNE_RXEQ_GET_OUT_LENMAX 252\n #define\tMC_CMD_KR_TUNE_RXEQ_GET_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_KR_TUNE_RXEQ_GET_OUT_LEN(num) (0+4*(num))\n+#define\tMC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_NUM(len) (((len)-0)/4)\n /* RXEQ Parameter */\n #define\tMC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_OFST 0\n #define\tMC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_LEN 4\n@@ -14088,6 +15269,7 @@\n #define\tMC_CMD_KR_TUNE_RXEQ_SET_IN_LENMAX 252\n #define\tMC_CMD_KR_TUNE_RXEQ_SET_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_KR_TUNE_RXEQ_SET_IN_LEN(num) (4+4*(num))\n+#define\tMC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_NUM(len) (((len)-4)/4)\n /* Requested operation */\n #define\tMC_CMD_KR_TUNE_RXEQ_SET_IN_KR_TUNE_OP_OFST 0\n #define\tMC_CMD_KR_TUNE_RXEQ_SET_IN_KR_TUNE_OP_LEN 1\n@@ -14134,6 +15316,7 @@\n #define\tMC_CMD_KR_TUNE_TXEQ_GET_OUT_LENMAX 252\n #define\tMC_CMD_KR_TUNE_TXEQ_GET_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_KR_TUNE_TXEQ_GET_OUT_LEN(num) (0+4*(num))\n+#define\tMC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_NUM(len) (((len)-0)/4)\n /* TXEQ Parameter */\n #define\tMC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_OFST 0\n #define\tMC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_LEN 4\n@@ -14199,6 +15382,7 @@\n #define\tMC_CMD_KR_TUNE_TXEQ_SET_IN_LENMAX 252\n #define\tMC_CMD_KR_TUNE_TXEQ_SET_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_KR_TUNE_TXEQ_SET_IN_LEN(num) (4+4*(num))\n+#define\tMC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_NUM(len) (((len)-4)/4)\n /* Requested operation */\n #define\tMC_CMD_KR_TUNE_TXEQ_SET_IN_KR_TUNE_OP_OFST 0\n #define\tMC_CMD_KR_TUNE_TXEQ_SET_IN_KR_TUNE_OP_LEN 1\n@@ -14288,6 +15472,7 @@\n #define\tMC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_LENMAX 252\n #define\tMC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_LEN(num) (0+2*(num))\n+#define\tMC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_NUM(len) (((len)-0)/2)\n #define\tMC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_OFST 0\n #define\tMC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_LEN 2\n #define\tMC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MINNUM 0\n@@ -14404,6 +15589,7 @@\n #define\tMC_CMD_PCIE_TUNE_IN_LENMAX 252\n #define\tMC_CMD_PCIE_TUNE_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_PCIE_TUNE_IN_LEN(num) (4+4*(num))\n+#define\tMC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_NUM(len) (((len)-4)/4)\n /* Requested operation */\n #define\tMC_CMD_PCIE_TUNE_IN_PCIE_TUNE_OP_OFST 0\n #define\tMC_CMD_PCIE_TUNE_IN_PCIE_TUNE_OP_LEN 1\n@@ -14451,6 +15637,7 @@\n #define\tMC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LENMAX 252\n #define\tMC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LEN(num) (0+4*(num))\n+#define\tMC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_NUM(len) (((len)-0)/4)\n /* RXEQ Parameter */\n #define\tMC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_OFST 0\n #define\tMC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LEN 4\n@@ -14512,6 +15699,7 @@\n #define\tMC_CMD_PCIE_TUNE_RXEQ_SET_IN_LENMAX 252\n #define\tMC_CMD_PCIE_TUNE_RXEQ_SET_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_PCIE_TUNE_RXEQ_SET_IN_LEN(num) (4+4*(num))\n+#define\tMC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_NUM(len) (((len)-4)/4)\n /* Requested operation */\n #define\tMC_CMD_PCIE_TUNE_RXEQ_SET_IN_PCIE_TUNE_OP_OFST 0\n #define\tMC_CMD_PCIE_TUNE_RXEQ_SET_IN_PCIE_TUNE_OP_LEN 1\n@@ -14558,6 +15746,7 @@\n #define\tMC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LENMAX 252\n #define\tMC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LEN(num) (0+4*(num))\n+#define\tMC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_NUM(len) (((len)-0)/4)\n /* RXEQ Parameter */\n #define\tMC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_OFST 0\n #define\tMC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LEN 4\n@@ -14613,6 +15802,7 @@\n #define\tMC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMAX 252\n #define\tMC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LEN(num) (0+2*(num))\n+#define\tMC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_NUM(len) (((len)-0)/2)\n #define\tMC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_OFST 0\n #define\tMC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_LEN 2\n #define\tMC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MINNUM 0\n@@ -14770,6 +15960,7 @@\n #define\tMC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX 252\n #define\tMC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_LICENSING_GET_ID_V3_OUT_LEN(num) (8+1*(num))\n+#define\tMC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_NUM(len) (((len)-8)/1)\n /* type of license (eg 3) */\n #define\tMC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_TYPE_OFST 0\n #define\tMC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_TYPE_LEN 4\n@@ -14906,6 +16097,7 @@\n #define\tMC_CMD_LICENSED_APP_OP_IN_LENMAX 252\n #define\tMC_CMD_LICENSED_APP_OP_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_LICENSED_APP_OP_IN_LEN(num) (8+4*(num))\n+#define\tMC_CMD_LICENSED_APP_OP_IN_ARGS_NUM(len) (((len)-8)/4)\n /* application ID */\n #define\tMC_CMD_LICENSED_APP_OP_IN_APP_ID_OFST 0\n #define\tMC_CMD_LICENSED_APP_OP_IN_APP_ID_LEN 4\n@@ -14928,6 +16120,7 @@\n #define\tMC_CMD_LICENSED_APP_OP_OUT_LENMAX 252\n #define\tMC_CMD_LICENSED_APP_OP_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_LICENSED_APP_OP_OUT_LEN(num) (0+4*(num))\n+#define\tMC_CMD_LICENSED_APP_OP_OUT_RESULT_NUM(len) (((len)-0)/4)\n /* result specific to this particular operation */\n #define\tMC_CMD_LICENSED_APP_OP_OUT_RESULT_OFST 0\n #define\tMC_CMD_LICENSED_APP_OP_OUT_RESULT_LEN 4\n@@ -15219,6 +16412,7 @@\n #define\tMC_CMD_SET_PARSER_DISP_CONFIG_IN_LENMAX 252\n #define\tMC_CMD_SET_PARSER_DISP_CONFIG_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_SET_PARSER_DISP_CONFIG_IN_LEN(num) (8+4*(num))\n+#define\tMC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_NUM(len) (((len)-8)/4)\n /* the type of configuration setting to change */\n #define\tMC_CMD_SET_PARSER_DISP_CONFIG_IN_TYPE_OFST 0\n #define\tMC_CMD_SET_PARSER_DISP_CONFIG_IN_TYPE_LEN 4\n@@ -15276,6 +16470,7 @@\n #define\tMC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMAX 252\n #define\tMC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_GET_PARSER_DISP_CONFIG_OUT_LEN(num) (0+4*(num))\n+#define\tMC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_NUM(len) (((len)-0)/4)\n /* current value: the details depend on the type of configuration setting being\n  * read\n  */\n@@ -15833,6 +17028,7 @@\n #define\tMC_CMD_XPM_READ_BYTES_OUT_LENMAX 252\n #define\tMC_CMD_XPM_READ_BYTES_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_XPM_READ_BYTES_OUT_LEN(num) (0+1*(num))\n+#define\tMC_CMD_XPM_READ_BYTES_OUT_DATA_NUM(len) (((len)-0)/1)\n /* Data */\n #define\tMC_CMD_XPM_READ_BYTES_OUT_DATA_OFST 0\n #define\tMC_CMD_XPM_READ_BYTES_OUT_DATA_LEN 1\n@@ -15855,6 +17051,7 @@\n #define\tMC_CMD_XPM_WRITE_BYTES_IN_LENMAX 252\n #define\tMC_CMD_XPM_WRITE_BYTES_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_XPM_WRITE_BYTES_IN_LEN(num) (8+1*(num))\n+#define\tMC_CMD_XPM_WRITE_BYTES_IN_DATA_NUM(len) (((len)-8)/1)\n /* Start address (byte) */\n #define\tMC_CMD_XPM_WRITE_BYTES_IN_ADDR_OFST 0\n #define\tMC_CMD_XPM_WRITE_BYTES_IN_ADDR_LEN 4\n@@ -15895,6 +17092,7 @@\n #define\tMC_CMD_XPM_READ_SECTOR_OUT_LENMAX 36\n #define\tMC_CMD_XPM_READ_SECTOR_OUT_LENMAX_MCDI2 36\n #define\tMC_CMD_XPM_READ_SECTOR_OUT_LEN(num) (4+1*(num))\n+#define\tMC_CMD_XPM_READ_SECTOR_OUT_DATA_NUM(len) (((len)-4)/1)\n /* Sector type */\n #define\tMC_CMD_XPM_READ_SECTOR_OUT_TYPE_OFST 0\n #define\tMC_CMD_XPM_READ_SECTOR_OUT_TYPE_LEN 4\n@@ -15925,6 +17123,7 @@\n #define\tMC_CMD_XPM_WRITE_SECTOR_IN_LENMAX 44\n #define\tMC_CMD_XPM_WRITE_SECTOR_IN_LENMAX_MCDI2 44\n #define\tMC_CMD_XPM_WRITE_SECTOR_IN_LEN(num) (12+1*(num))\n+#define\tMC_CMD_XPM_WRITE_SECTOR_IN_DATA_NUM(len) (((len)-12)/1)\n /* If writing fails due to an uncorrectable error, try up to RETRIES following\n  * sectors (or until no more space available). If 0, only one write attempt is\n  * made. Note that uncorrectable errors are unlikely, thanks to XPM self-repair\n@@ -15998,6 +17197,7 @@\n #define\tMC_CMD_XPM_BLANK_CHECK_OUT_LENMAX 252\n #define\tMC_CMD_XPM_BLANK_CHECK_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_XPM_BLANK_CHECK_OUT_LEN(num) (4+2*(num))\n+#define\tMC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_NUM(len) (((len)-4)/2)\n /* Total number of bad (non-blank) locations */\n #define\tMC_CMD_XPM_BLANK_CHECK_OUT_BAD_COUNT_OFST 0\n #define\tMC_CMD_XPM_BLANK_CHECK_OUT_BAD_COUNT_LEN 4\n@@ -16346,6 +17546,7 @@\n #define\tMC_CMD_GET_SECURITY_RULESET_VERSION_OUT_LENMAX 252\n #define\tMC_CMD_GET_SECURITY_RULESET_VERSION_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_GET_SECURITY_RULESET_VERSION_OUT_LEN(num) (0+1*(num))\n+#define\tMC_CMD_GET_SECURITY_RULESET_VERSION_OUT_VERSION_NUM(len) (((len)-0)/1)\n /* Opaque hash value; length may vary depending on the hash scheme used */\n #define\tMC_CMD_GET_SECURITY_RULESET_VERSION_OUT_VERSION_OFST 0\n #define\tMC_CMD_GET_SECURITY_RULESET_VERSION_OUT_VERSION_LEN 1\n@@ -16378,6 +17579,7 @@\n #define\tMC_CMD_SECURITY_RULE_COUNTER_ALLOC_OUT_LENMAX 252\n #define\tMC_CMD_SECURITY_RULE_COUNTER_ALLOC_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_SECURITY_RULE_COUNTER_ALLOC_OUT_LEN(num) (4+4*(num))\n+#define\tMC_CMD_SECURITY_RULE_COUNTER_ALLOC_OUT_COUNTER_ID_NUM(len) (((len)-4)/4)\n /* the number of new counter IDs allocated (may be less than the number\n  * requested if resources are unavailable)\n  */\n@@ -16409,6 +17611,7 @@\n #define\tMC_CMD_SECURITY_RULE_COUNTER_FREE_IN_LENMAX 252\n #define\tMC_CMD_SECURITY_RULE_COUNTER_FREE_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_SECURITY_RULE_COUNTER_FREE_IN_LEN(num) (4+4*(num))\n+#define\tMC_CMD_SECURITY_RULE_COUNTER_FREE_IN_COUNTER_ID_NUM(len) (((len)-4)/4)\n /* the number of counter IDs to free */\n #define\tMC_CMD_SECURITY_RULE_COUNTER_FREE_IN_NUM_COUNTERS_OFST 0\n #define\tMC_CMD_SECURITY_RULE_COUNTER_FREE_IN_NUM_COUNTERS_LEN 4\n@@ -16443,6 +17646,7 @@\n #define\tMC_CMD_SUBNET_MAP_SET_NODE_IN_LENMAX 252\n #define\tMC_CMD_SUBNET_MAP_SET_NODE_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_SUBNET_MAP_SET_NODE_IN_LEN(num) (4+2*(num))\n+#define\tMC_CMD_SUBNET_MAP_SET_NODE_IN_ENTRY_NUM(len) (((len)-4)/2)\n /* node to update in the range 0 .. SUBNET_MAP_NUM_NODES-1 */\n #define\tMC_CMD_SUBNET_MAP_SET_NODE_IN_NODE_ID_OFST 0\n #define\tMC_CMD_SUBNET_MAP_SET_NODE_IN_NODE_ID_LEN 4\n@@ -16497,6 +17701,7 @@\n #define\tMC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_IN_LENMAX 252\n #define\tMC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_IN_LEN(num) (0+4*(num))\n+#define\tMC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_IN_ENTRIES_NUM(len) (((len)-0)/4)\n /* PORTRANGE_TREE_NUM_ENTRIES new entries, each laid out as a\n  * PORTRANGE_TREE_ENTRY\n  */\n@@ -16530,6 +17735,7 @@\n #define\tMC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_IN_LENMAX 252\n #define\tMC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_IN_LEN(num) (0+4*(num))\n+#define\tMC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_IN_ENTRIES_NUM(len) (((len)-0)/4)\n /* PORTRANGE_TREE_NUM_ENTRIES new entries, each laid out as a\n  * PORTRANGE_TREE_ENTRY\n  */\n@@ -16582,6 +17788,7 @@\n #define\tMC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LENMAX 68\n #define\tMC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LENMAX_MCDI2 68\n #define\tMC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LEN(num) (4+4*(num))\n+#define\tMC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_NUM(len) (((len)-4)/4)\n /* Flags */\n #define\tMC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_FLAGS_OFST 0\n #define\tMC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_FLAGS_LEN 2\n@@ -16726,6 +17933,7 @@\n #define\tMC_CMD_TSA_BIND_IN_SET_KEY_LENMAX 252\n #define\tMC_CMD_TSA_BIND_IN_SET_KEY_LENMAX_MCDI2 1020\n #define\tMC_CMD_TSA_BIND_IN_SET_KEY_LEN(num) (4+1*(num))\n+#define\tMC_CMD_TSA_BIND_IN_SET_KEY_DATKEY_NUM(len) (((len)-4)/1)\n /* The operation requested. */\n #define\tMC_CMD_TSA_BIND_IN_SET_KEY_OP_OFST 0\n #define\tMC_CMD_TSA_BIND_IN_SET_KEY_OP_LEN 4\n@@ -16759,6 +17967,7 @@\n #define\tMC_CMD_TSA_BIND_IN_UNBIND_EXT_LENMAX 252\n #define\tMC_CMD_TSA_BIND_IN_UNBIND_EXT_LENMAX_MCDI2 1020\n #define\tMC_CMD_TSA_BIND_IN_UNBIND_EXT_LEN(num) (92+1*(num))\n+#define\tMC_CMD_TSA_BIND_IN_UNBIND_EXT_SIG_NUM(len) (((len)-92)/1)\n /* The operation requested. */\n #define\tMC_CMD_TSA_BIND_IN_UNBIND_EXT_OP_OFST 0\n #define\tMC_CMD_TSA_BIND_IN_UNBIND_EXT_OP_LEN 4\n@@ -16822,6 +18031,7 @@\n #define\tMC_CMD_TSA_BIND_IN_DECOMMISSION_LENMAX 252\n #define\tMC_CMD_TSA_BIND_IN_DECOMMISSION_LENMAX_MCDI2 1020\n #define\tMC_CMD_TSA_BIND_IN_DECOMMISSION_LEN(num) (108+1*(num))\n+#define\tMC_CMD_TSA_BIND_IN_DECOMMISSION_SIG_NUM(len) (((len)-108)/1)\n /* This is the signature of the above mentioned fields- TSAID, USER and REASON.\n  * As per current requirements, the SIG opaque data blob contains ECDSA ECC-384\n  * based signature. The ECC curve is secp384r1. The signature is also ASN-1\n@@ -16888,6 +18098,7 @@\n #define\tMC_CMD_TSA_BIND_IN_SECURE_UNBIND_LENMAX 200\n #define\tMC_CMD_TSA_BIND_IN_SECURE_UNBIND_LENMAX_MCDI2 200\n #define\tMC_CMD_TSA_BIND_IN_SECURE_UNBIND_LEN(num) (96+1*(num))\n+#define\tMC_CMD_TSA_BIND_IN_SECURE_UNBIND_SIG_NUM(len) (((len)-96)/1)\n /* The operation requested, must be MC_CMD_TSA_BIND_OP_SECURE_UNBIND. */\n #define\tMC_CMD_TSA_BIND_IN_SECURE_UNBIND_OP_OFST 0\n #define\tMC_CMD_TSA_BIND_IN_SECURE_UNBIND_OP_LEN 4\n@@ -16931,6 +18142,7 @@\n #define\tMC_CMD_TSA_BIND_IN_SECURE_DECOMMISSION_LENMAX 216\n #define\tMC_CMD_TSA_BIND_IN_SECURE_DECOMMISSION_LENMAX_MCDI2 216\n #define\tMC_CMD_TSA_BIND_IN_SECURE_DECOMMISSION_LEN(num) (112+1*(num))\n+#define\tMC_CMD_TSA_BIND_IN_SECURE_DECOMMISSION_SIG_NUM(len) (((len)-112)/1)\n /* The operation requested, must be MC_CMD_TSA_BIND_OP_SECURE_DECOMMISSION. */\n #define\tMC_CMD_TSA_BIND_IN_SECURE_DECOMMISSION_OP_OFST 0\n #define\tMC_CMD_TSA_BIND_IN_SECURE_DECOMMISSION_OP_LEN 4\n@@ -16993,6 +18205,7 @@\n #define\tMC_CMD_TSA_BIND_OUT_GET_ID_LENMAX 252\n #define\tMC_CMD_TSA_BIND_OUT_GET_ID_LENMAX_MCDI2 1020\n #define\tMC_CMD_TSA_BIND_OUT_GET_ID_LEN(num) (14+1*(num))\n+#define\tMC_CMD_TSA_BIND_OUT_GET_ID_SIG_NUM(len) (((len)-14)/1)\n /* The protocol operation code MC_CMD_TSA_BIND_OP_GET_ID that is sent back to\n  * the caller.\n  */\n@@ -17030,6 +18243,7 @@\n #define\tMC_CMD_TSA_BIND_OUT_GET_TICKET_LENMAX 252\n #define\tMC_CMD_TSA_BIND_OUT_GET_TICKET_LENMAX_MCDI2 1020\n #define\tMC_CMD_TSA_BIND_OUT_GET_TICKET_LEN(num) (4+1*(num))\n+#define\tMC_CMD_TSA_BIND_OUT_GET_TICKET_TICKET_NUM(len) (((len)-4)/1)\n /* The protocol operation code MC_CMD_TSA_BIND_OP_GET_TICKET that is sent back\n  * to the caller.\n  */\n@@ -17117,6 +18331,7 @@\n #define\tMC_CMD_TSA_BIND_OUT_GET_CERTIFICATE_LENMAX 252\n #define\tMC_CMD_TSA_BIND_OUT_GET_CERTIFICATE_LENMAX_MCDI2 1020\n #define\tMC_CMD_TSA_BIND_OUT_GET_CERTIFICATE_LEN(num) (8+1*(num))\n+#define\tMC_CMD_TSA_BIND_OUT_GET_CERTIFICATE_DATA_NUM(len) (((len)-8)/1)\n /* The protocol operation code MC_CMD_TSA_BIND_OP_GET_CERTIFICATE that is sent\n  * back to the caller.\n  */\n@@ -17229,6 +18444,7 @@\n #define\tMC_CMD_MANAGE_SECURITY_RULESET_CACHE_OUT_LENMAX 252\n #define\tMC_CMD_MANAGE_SECURITY_RULESET_CACHE_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_MANAGE_SECURITY_RULESET_CACHE_OUT_LEN(num) (4+1*(num))\n+#define\tMC_CMD_MANAGE_SECURITY_RULESET_CACHE_OUT_VERSION_NUM(len) (((len)-4)/1)\n /* indicates whether the persistent cache is valid (after completion of the\n  * requested operation in the case of rollback, commit, or invalidate)\n  */\n@@ -17266,6 +18482,7 @@\n #define\tMC_CMD_NVRAM_PRIVATE_APPEND_IN_LENMAX 252\n #define\tMC_CMD_NVRAM_PRIVATE_APPEND_IN_LENMAX_MCDI2 1020\n #define\tMC_CMD_NVRAM_PRIVATE_APPEND_IN_LEN(num) (8+1*(num))\n+#define\tMC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_NUM(len) (((len)-8)/1)\n /* The tag to be appended */\n #define\tMC_CMD_NVRAM_PRIVATE_APPEND_IN_TAG_OFST 0\n #define\tMC_CMD_NVRAM_PRIVATE_APPEND_IN_TAG_LEN 4\n@@ -17305,6 +18522,7 @@\n #define\tMC_CMD_XPM_VERIFY_CONTENTS_OUT_LENMAX 252\n #define\tMC_CMD_XPM_VERIFY_CONTENTS_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_XPM_VERIFY_CONTENTS_OUT_LEN(num) (12+1*(num))\n+#define\tMC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_NUM(len) (((len)-12)/1)\n /* Number of sectors found (test builds only) */\n #define\tMC_CMD_XPM_VERIFY_CONTENTS_OUT_NUM_SECTORS_OFST 0\n #define\tMC_CMD_XPM_VERIFY_CONTENTS_OUT_NUM_SECTORS_LEN 4\n@@ -18045,6 +19263,7 @@\n #define\tMC_CMD_TSA_STATISTICS_IN_READ_CLEAR_LENMAX 252\n #define\tMC_CMD_TSA_STATISTICS_IN_READ_CLEAR_LENMAX_MCDI2 1020\n #define\tMC_CMD_TSA_STATISTICS_IN_READ_CLEAR_LEN(num) (16+4*(num))\n+#define\tMC_CMD_TSA_STATISTICS_IN_READ_CLEAR_COUNTER_ID_NUM(len) (((len)-16)/4)\n /* TSA statistics sub-operation code */\n #define\tMC_CMD_TSA_STATISTICS_IN_READ_CLEAR_OP_CODE_OFST 0\n #define\tMC_CMD_TSA_STATISTICS_IN_READ_CLEAR_OP_CODE_LEN 4\n@@ -18085,6 +19304,7 @@\n #define\tMC_CMD_TSA_STATISTICS_OUT_READ_CLEAR_LENMAX 248\n #define\tMC_CMD_TSA_STATISTICS_OUT_READ_CLEAR_LENMAX_MCDI2 1016\n #define\tMC_CMD_TSA_STATISTICS_OUT_READ_CLEAR_LEN(num) (8+16*(num))\n+#define\tMC_CMD_TSA_STATISTICS_OUT_READ_CLEAR_STATS_COUNTERS_NUM(len) (((len)-8)/16)\n /* Number of statistics counters returned in this response */\n #define\tMC_CMD_TSA_STATISTICS_OUT_READ_CLEAR_NUM_STATS_OFST 0\n #define\tMC_CMD_TSA_STATISTICS_OUT_READ_CLEAR_NUM_STATS_LEN 4\n@@ -18167,6 +19387,7 @@\n #define\tMC_CMD_TSA_CONFIG_IN_APPEND_LENMAX 252\n #define\tMC_CMD_TSA_CONFIG_IN_APPEND_LENMAX_MCDI2 1020\n #define\tMC_CMD_TSA_CONFIG_IN_APPEND_LEN(num) (12+1*(num))\n+#define\tMC_CMD_TSA_CONFIG_IN_APPEND_DATA_NUM(len) (((len)-12)/1)\n /* TSA configuration sub-operation code. The value shall be\n  * MC_CMD_TSA_CONFIG_OP_APPEND.\n  */\n@@ -18215,6 +19436,7 @@\n #define\tMC_CMD_TSA_CONFIG_OUT_READ_LENMAX 252\n #define\tMC_CMD_TSA_CONFIG_OUT_READ_LENMAX_MCDI2 1020\n #define\tMC_CMD_TSA_CONFIG_OUT_READ_LEN(num) (8+1*(num))\n+#define\tMC_CMD_TSA_CONFIG_OUT_READ_DATA_NUM(len) (((len)-8)/1)\n /* The tag that was read */\n #define\tMC_CMD_TSA_CONFIG_OUT_READ_TAG_OFST 0\n #define\tMC_CMD_TSA_CONFIG_OUT_READ_TAG_LEN 4\n@@ -18287,6 +19509,7 @@\n #define\tMC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_LENMAX 248\n #define\tMC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_LENMAX_MCDI2 1016\n #define\tMC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_LEN(num) (8+8*(num))\n+#define\tMC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_NUM(len) (((len)-8)/8)\n /* Header containing information to identify which sub-operation of this\n  * command to perform. The header contains a 16-bit op-code. Unused space in\n  * this field is reserved for future expansion.\n@@ -18315,6 +19538,7 @@\n #define\tMC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_LENMAX 248\n #define\tMC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_LENMAX_MCDI2 1016\n #define\tMC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_LEN(num) (8+8*(num))\n+#define\tMC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_NUM(len) (((len)-8)/8)\n /* Header containing information to identify which sub-operation of this\n  * command to perform. The header contains a 16-bit op-code. Unused space in\n  * this field is reserved for future expansion.\n@@ -18765,6 +19989,7 @@\n #define\tMC_CMD_GET_CERTIFICATE_OUT_LENMAX 252\n #define\tMC_CMD_GET_CERTIFICATE_OUT_LENMAX_MCDI2 1020\n #define\tMC_CMD_GET_CERTIFICATE_OUT_LEN(num) (12+1*(num))\n+#define\tMC_CMD_GET_CERTIFICATE_OUT_DATA_NUM(len) (((len)-12)/1)\n /* Type of the certificate. */\n #define\tMC_CMD_GET_CERTIFICATE_OUT_TYPE_OFST 0\n #define\tMC_CMD_GET_CERTIFICATE_OUT_TYPE_LEN 4\n@@ -18884,6 +20109,7 @@\n #define\tMC_CMD_LTSSM_TRACE_POLL_OUT_LENMAX 248\n #define\tMC_CMD_LTSSM_TRACE_POLL_OUT_LENMAX_MCDI2 1016\n #define\tMC_CMD_LTSSM_TRACE_POLL_OUT_LEN(num) (8+8*(num))\n+#define\tMC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_NUM(len) (((len)-8)/8)\n #define\tMC_CMD_LTSSM_TRACE_POLL_OUT_FLAGS_OFST 0\n #define\tMC_CMD_LTSSM_TRACE_POLL_OUT_FLAGS_LEN 4\n #define\tMC_CMD_LTSSM_TRACE_POLL_OUT_HW_BUFFER_OVERFLOW_LBN 0\n@@ -19070,6 +20296,342 @@\n #define\tMC_CMD_TELEMETRY_CONFIG_OUT_GET_PARAMETERS_OFST 0\n #define\tMC_CMD_TELEMETRY_CONFIG_OUT_GET_PARAMETERS_LEN 36\n \n+\n+/***********************************/\n+/* MC_CMD_GET_RX_PREFIX_ID\n+ * This command is part of the mechanism for configuring the format of the RX\n+ * packet prefix. It takes as input a bitmask of the fields the host would like\n+ * to be in the prefix. If the hardware supports RX prefixes with that\n+ * combination of fields, then this command returns a list of prefix-ids,\n+ * opaque identifiers suitable for use in the RX_PREFIX_ID field of a\n+ * MC_CMD_INIT_RXQ_V5_IN message. If the combination of fields is not\n+ * supported, returns ENOTSUP. If the firmware can't create any new prefix-ids\n+ * due to resource constraints, returns ENOSPC.\n+ */\n+#define\tMC_CMD_GET_RX_PREFIX_ID 0x13b\n+#undef\tMC_CMD_0x13b_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x13b_PRIVILEGE_CTG SRIOV_CTG_GENERAL\n+\n+/* MC_CMD_GET_RX_PREFIX_ID_IN msgrequest */\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_LEN 8\n+/* Field bitmask. */\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_OFST 0\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LEN 8\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_OFST 0\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_OFST 4\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_LBN 0\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_WIDTH 1\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_VALID_LBN 1\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_VALID_WIDTH 1\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_USER_FLAG_LBN 2\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_USER_FLAG_WIDTH 1\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_CLASS_LBN 3\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_CLASS_WIDTH 1\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_PARTIAL_TSTAMP_LBN 4\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_PARTIAL_TSTAMP_WIDTH 1\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_LBN 5\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_WIDTH 1\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_USER_MARK_LBN 6\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_USER_MARK_WIDTH 1\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_VPORT_LBN 7\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_VPORT_WIDTH 1\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_CSUM_FRAME_LBN 8\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_CSUM_FRAME_WIDTH 1\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIP_TCI_LBN 9\n+#define\tMC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIP_TCI_WIDTH 1\n+\n+/* MC_CMD_GET_RX_PREFIX_ID_OUT msgresponse */\n+#define\tMC_CMD_GET_RX_PREFIX_ID_OUT_LENMIN 8\n+#define\tMC_CMD_GET_RX_PREFIX_ID_OUT_LENMAX 252\n+#define\tMC_CMD_GET_RX_PREFIX_ID_OUT_LENMAX_MCDI2 1020\n+#define\tMC_CMD_GET_RX_PREFIX_ID_OUT_LEN(num) (4+4*(num))\n+#define\tMC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_NUM(len) (((len)-4)/4)\n+/* Number of prefix-ids returned */\n+#define\tMC_CMD_GET_RX_PREFIX_ID_OUT_NUM_RX_PREFIX_IDS_OFST 0\n+#define\tMC_CMD_GET_RX_PREFIX_ID_OUT_NUM_RX_PREFIX_IDS_LEN 4\n+/* Opaque prefix identifiers which can be passed into MC_CMD_INIT_RXQ_V5 or\n+ * MC_CMD_QUERY_PREFIX_ID\n+ */\n+#define\tMC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_OFST 4\n+#define\tMC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_LEN 4\n+#define\tMC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_MINNUM 1\n+#define\tMC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_MAXNUM 62\n+#define\tMC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_MAXNUM_MCDI2 254\n+\n+/* RX_PREFIX_FIELD_INFO structuredef: Information about a single RX prefix\n+ * field\n+ */\n+#define\tRX_PREFIX_FIELD_INFO_LEN 4\n+/* The offset of the field from the start of the prefix, in bits */\n+#define\tRX_PREFIX_FIELD_INFO_OFFSET_BITS_OFST 0\n+#define\tRX_PREFIX_FIELD_INFO_OFFSET_BITS_LEN 2\n+#define\tRX_PREFIX_FIELD_INFO_OFFSET_BITS_LBN 0\n+#define\tRX_PREFIX_FIELD_INFO_OFFSET_BITS_WIDTH 16\n+/* The width of the field, in bits */\n+#define\tRX_PREFIX_FIELD_INFO_WIDTH_BITS_OFST 2\n+#define\tRX_PREFIX_FIELD_INFO_WIDTH_BITS_LEN 1\n+#define\tRX_PREFIX_FIELD_INFO_WIDTH_BITS_LBN 16\n+#define\tRX_PREFIX_FIELD_INFO_WIDTH_BITS_WIDTH 8\n+/* The type of the field. These enum values are in the same order as the fields\n+ * in the MC_CMD_GET_RX_PREFIX_ID_IN bitmask\n+ */\n+#define\tRX_PREFIX_FIELD_INFO_TYPE_OFST 3\n+#define\tRX_PREFIX_FIELD_INFO_TYPE_LEN 1\n+#define\tRX_PREFIX_FIELD_INFO_LENGTH 0x0 /* enum */\n+#define\tRX_PREFIX_FIELD_INFO_RSS_HASH_VALID 0x1 /* enum */\n+#define\tRX_PREFIX_FIELD_INFO_USER_FLAG 0x2 /* enum */\n+#define\tRX_PREFIX_FIELD_INFO_CLASS 0x3 /* enum */\n+#define\tRX_PREFIX_FIELD_INFO_PARTIAL_TSTAMP 0x4 /* enum */\n+#define\tRX_PREFIX_FIELD_INFO_RSS_HASH 0x5 /* enum */\n+#define\tRX_PREFIX_FIELD_INFO_USER_MARK 0x6 /* enum */\n+#define\tRX_PREFIX_FIELD_INFO_INGRESS_VPORT 0x7 /* enum */\n+#define\tRX_PREFIX_FIELD_INFO_CSUM_FRAME 0x8 /* enum */\n+#define\tRX_PREFIX_FIELD_INFO_VLAN_STRIP_TCI 0x9 /* enum */\n+#define\tRX_PREFIX_FIELD_INFO_TYPE_LBN 24\n+#define\tRX_PREFIX_FIELD_INFO_TYPE_WIDTH 8\n+\n+/* RX_PREFIX_FIXED_RESPONSE structuredef: Information about an RX prefix in\n+ * which every field has a fixed offset and width\n+ */\n+#define\tRX_PREFIX_FIXED_RESPONSE_LENMIN 4\n+#define\tRX_PREFIX_FIXED_RESPONSE_LENMAX 252\n+#define\tRX_PREFIX_FIXED_RESPONSE_LENMAX_MCDI2 1020\n+#define\tRX_PREFIX_FIXED_RESPONSE_LEN(num) (4+4*(num))\n+#define\tRX_PREFIX_FIXED_RESPONSE_FIELDS_NUM(len) (((len)-4)/4)\n+/* Length of the RX prefix in bytes */\n+#define\tRX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES_OFST 0\n+#define\tRX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES_LEN 1\n+#define\tRX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES_LBN 0\n+#define\tRX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES_WIDTH 8\n+/* Number of fields present in the prefix */\n+#define\tRX_PREFIX_FIXED_RESPONSE_FIELD_COUNT_OFST 1\n+#define\tRX_PREFIX_FIXED_RESPONSE_FIELD_COUNT_LEN 1\n+#define\tRX_PREFIX_FIXED_RESPONSE_FIELD_COUNT_LBN 8\n+#define\tRX_PREFIX_FIXED_RESPONSE_FIELD_COUNT_WIDTH 8\n+#define\tRX_PREFIX_FIXED_RESPONSE_RESERVED_OFST 2\n+#define\tRX_PREFIX_FIXED_RESPONSE_RESERVED_LEN 2\n+#define\tRX_PREFIX_FIXED_RESPONSE_RESERVED_LBN 16\n+#define\tRX_PREFIX_FIXED_RESPONSE_RESERVED_WIDTH 16\n+/* Array of RX_PREFIX_FIELD_INFO structures, of length FIELD_COUNT */\n+#define\tRX_PREFIX_FIXED_RESPONSE_FIELDS_OFST 4\n+#define\tRX_PREFIX_FIXED_RESPONSE_FIELDS_LEN 4\n+#define\tRX_PREFIX_FIXED_RESPONSE_FIELDS_MINNUM 0\n+#define\tRX_PREFIX_FIXED_RESPONSE_FIELDS_MAXNUM 62\n+#define\tRX_PREFIX_FIXED_RESPONSE_FIELDS_MAXNUM_MCDI2 254\n+#define\tRX_PREFIX_FIXED_RESPONSE_FIELDS_LBN 32\n+#define\tRX_PREFIX_FIXED_RESPONSE_FIELDS_WIDTH 32\n+\n+\n+/***********************************/\n+/* MC_CMD_QUERY_RX_PREFIX_ID\n+ * This command takes an RX prefix id (obtained from MC_CMD_GET_RX_PREFIX_ID)\n+ * and returns a description of the RX prefix of packets delievered to an RXQ\n+ * created with that prefix id\n+ */\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID 0x13c\n+#undef\tMC_CMD_0x13c_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x13c_PRIVILEGE_CTG SRIOV_CTG_GENERAL\n+\n+/* MC_CMD_QUERY_RX_PREFIX_ID_IN msgrequest */\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_IN_LEN 4\n+/* Prefix id to query */\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_IN_RX_PREFIX_ID_OFST 0\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_IN_RX_PREFIX_ID_LEN 4\n+\n+/* MC_CMD_QUERY_RX_PREFIX_ID_OUT msgresponse */\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_OUT_LENMIN 4\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_OUT_LENMAX 252\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_OUT_LENMAX_MCDI2 1020\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_OUT_LEN(num) (4+1*(num))\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_NUM(len) (((len)-4)/1)\n+/* An enum describing the structure of this response. */\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_TYPE_OFST 0\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_TYPE_LEN 1\n+/* enum: The response is of format RX_PREFIX_FIXED_RESPONSE */\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_TYPE_FIXED 0x0\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_OUT_RESERVED_OFST 1\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_OUT_RESERVED_LEN 3\n+/* The response. Its format is as defined by the RESPONSE_TYPE value */\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_OFST 4\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_LEN 1\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_MINNUM 0\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_MAXNUM 248\n+#define\tMC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_MAXNUM_MCDI2 1016\n+\n+\n+/***********************************/\n+/* MC_CMD_BUNDLE\n+ * A command to perform various bundle-related operations on insecure cards.\n+ */\n+#define\tMC_CMD_BUNDLE 0x13d\n+#undef\tMC_CMD_0x13d_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x13d_PRIVILEGE_CTG SRIOV_CTG_INSECURE\n+\n+/* MC_CMD_BUNDLE_IN msgrequest */\n+#define\tMC_CMD_BUNDLE_IN_LEN 4\n+/* Sub-command code */\n+#define\tMC_CMD_BUNDLE_IN_OP_OFST 0\n+#define\tMC_CMD_BUNDLE_IN_OP_LEN 4\n+/* enum: Get the current host access mode set on component partitions. */\n+#define\tMC_CMD_BUNDLE_IN_OP_COMPONENT_ACCESS_GET 0x0\n+/* enum: Set the host access mode set on component partitions. */\n+#define\tMC_CMD_BUNDLE_IN_OP_COMPONENT_ACCESS_SET 0x1\n+\n+/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_IN msgrequest: Retrieve the current\n+ * access mode on component partitions such as MC_FIRMWARE, SUC_FIRMWARE and\n+ * EXPANSION_UEFI. This command only works on engineering (insecure) cards. On\n+ * secure adapters, this command returns MC_CMD_ERR_EPERM.\n+ */\n+#define\tMC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_IN_LEN 4\n+/* Sub-command code. Must be OP_COMPONENT_ACCESS_GET. */\n+#define\tMC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_IN_OP_OFST 0\n+#define\tMC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_IN_OP_LEN 4\n+\n+/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT msgresponse: Returns the access\n+ * control mode.\n+ */\n+#define\tMC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT_LEN 4\n+/* Access mode of component partitions. */\n+#define\tMC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT_ACCESS_MODE_OFST 0\n+#define\tMC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT_ACCESS_MODE_LEN 4\n+/* enum: Component partitions are read-only from the host. */\n+#define\tMC_CMD_BUNDLE_COMPONENTS_READ_ONLY 0x0\n+/* enum: Component partitions can read read-from written-to by the host. */\n+#define\tMC_CMD_BUNDLE_COMPONENTS_READ_WRITE 0x1\n+\n+/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN msgrequest: The component\n+ * partitions such as MC_FIRMWARE, SUC_FIRMWARE, EXPANSION_UEFI are set as\n+ * read-only on firmware built with bundle support. This command marks these\n+ * partitions as read/writeable. The access status set by this command does not\n+ * persist across MC reboots. This command only works on engineering (insecure)\n+ * cards. On secure adapters, this command returns MC_CMD_ERR_EPERM.\n+ */\n+#define\tMC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_LEN 8\n+/* Sub-command code. Must be OP_COMPONENT_ACCESS_SET. */\n+#define\tMC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_OP_OFST 0\n+#define\tMC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_OP_LEN 4\n+/* Access mode of component partitions. */\n+#define\tMC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_ACCESS_MODE_OFST 4\n+#define\tMC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_ACCESS_MODE_LEN 4\n+/*            Enum values, see field(s): */\n+/*               MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT/ACCESS_MODE */\n+\n+/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_OUT msgresponse */\n+#define\tMC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_OUT_LEN 0\n+\n+\n+/***********************************/\n+/* MC_CMD_GET_VPD\n+ * Read all VPD starting from a given address\n+ */\n+#define\tMC_CMD_GET_VPD 0x165\n+#undef\tMC_CMD_0x165_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x165_PRIVILEGE_CTG SRIOV_CTG_GENERAL\n+\n+/* MC_CMD_GET_VPD_IN msgresponse */\n+#define\tMC_CMD_GET_VPD_IN_LEN 4\n+/* To request only VPD tags from a certain origin. */\n+#define\tMC_CMD_GET_VPD_IN_STORAGE_TYPE_OFST 0\n+#define\tMC_CMD_GET_VPD_IN_STORAGE_TYPE_LEN 2\n+/* enum: Return all VPD regardless of origin. */\n+#define\tMC_CMD_GET_VPD_IN_STORAGE_TYPE_ALL 0x0\n+/* enum: Return only VPD tags generated by MCFW (not stored in NVRAM) */\n+#define\tMC_CMD_GET_VPD_IN_STORAGE_TYPE_LIVE 0x1\n+/* enum: Return only VPD tags stored in NVRAM (not generated by MCFW) */\n+#define\tMC_CMD_GET_VPD_IN_STORAGE_TYPE_NVRAM 0x2\n+/* VPD address to start from. In case VPD is longer than MCDI buffer\n+ * (unlikely), user can make multiple calls with different starting addresses.\n+ */\n+#define\tMC_CMD_GET_VPD_IN_ADDR_OFST 2\n+#define\tMC_CMD_GET_VPD_IN_ADDR_LEN 2\n+\n+/* MC_CMD_GET_VPD_OUT msgresponse */\n+#define\tMC_CMD_GET_VPD_OUT_LENMIN 5\n+#define\tMC_CMD_GET_VPD_OUT_LENMAX 252\n+#define\tMC_CMD_GET_VPD_OUT_LENMAX_MCDI2 1020\n+#define\tMC_CMD_GET_VPD_OUT_LEN(num) (4+1*(num))\n+#define\tMC_CMD_GET_VPD_OUT_DATA_NUM(len) (((len)-4)/1)\n+/* Length of VPD data returned. */\n+#define\tMC_CMD_GET_VPD_OUT_DATALEN_OFST 0\n+#define\tMC_CMD_GET_VPD_OUT_DATALEN_LEN 4\n+/* VPD data returned. */\n+#define\tMC_CMD_GET_VPD_OUT_DATA_OFST 4\n+#define\tMC_CMD_GET_VPD_OUT_DATA_LEN 1\n+#define\tMC_CMD_GET_VPD_OUT_DATA_MINNUM 1\n+#define\tMC_CMD_GET_VPD_OUT_DATA_MAXNUM 248\n+#define\tMC_CMD_GET_VPD_OUT_DATA_MAXNUM_MCDI2 1016\n+\n+\n+/***********************************/\n+/* MC_CMD_GET_NCSI_INFO\n+ * Provide information about the NC-SI stack\n+ */\n+#define\tMC_CMD_GET_NCSI_INFO 0x167\n+#undef\tMC_CMD_0x167_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x167_PRIVILEGE_CTG SRIOV_CTG_GENERAL\n+\n+/* MC_CMD_GET_NCSI_INFO_IN msgrequest */\n+#define\tMC_CMD_GET_NCSI_INFO_IN_LEN 8\n+/* Operation to be performed */\n+#define\tMC_CMD_GET_NCSI_INFO_IN_OP_OFST 0\n+#define\tMC_CMD_GET_NCSI_INFO_IN_OP_LEN 4\n+/* enum: Information on the link settings. */\n+#define\tMC_CMD_GET_NCSI_INFO_IN_OP_LINK 0x0\n+/* enum: Statistics associated with the channel */\n+#define\tMC_CMD_GET_NCSI_INFO_IN_OP_STATISTICS 0x1\n+/* The NC-SI channel on which the operation is to be performed */\n+#define\tMC_CMD_GET_NCSI_INFO_IN_CHANNEL_OFST 4\n+#define\tMC_CMD_GET_NCSI_INFO_IN_CHANNEL_LEN 4\n+\n+/* MC_CMD_GET_NCSI_INFO_LINK_OUT msgresponse */\n+#define\tMC_CMD_GET_NCSI_INFO_LINK_OUT_LEN 12\n+/* Settings as received from BMC. */\n+#define\tMC_CMD_GET_NCSI_INFO_LINK_OUT_SETTINGS_OFST 0\n+#define\tMC_CMD_GET_NCSI_INFO_LINK_OUT_SETTINGS_LEN 4\n+/* Advertised capabilities applied to channel. */\n+#define\tMC_CMD_GET_NCSI_INFO_LINK_OUT_ADV_CAP_OFST 4\n+#define\tMC_CMD_GET_NCSI_INFO_LINK_OUT_ADV_CAP_LEN 4\n+/* General status */\n+#define\tMC_CMD_GET_NCSI_INFO_LINK_OUT_STATUS_OFST 8\n+#define\tMC_CMD_GET_NCSI_INFO_LINK_OUT_STATUS_LEN 4\n+#define\tMC_CMD_GET_NCSI_INFO_LINK_OUT_STATE_LBN 0\n+#define\tMC_CMD_GET_NCSI_INFO_LINK_OUT_STATE_WIDTH 2\n+#define\tMC_CMD_GET_NCSI_INFO_LINK_OUT_ENABLE_LBN 2\n+#define\tMC_CMD_GET_NCSI_INFO_LINK_OUT_ENABLE_WIDTH 1\n+#define\tMC_CMD_GET_NCSI_INFO_LINK_OUT_NETWORK_TX_LBN 3\n+#define\tMC_CMD_GET_NCSI_INFO_LINK_OUT_NETWORK_TX_WIDTH 1\n+#define\tMC_CMD_GET_NCSI_INFO_LINK_OUT_ATTACHED_LBN 4\n+#define\tMC_CMD_GET_NCSI_INFO_LINK_OUT_ATTACHED_WIDTH 1\n+\n+/* MC_CMD_GET_NCSI_INFO_STATISTICS_OUT msgresponse */\n+#define\tMC_CMD_GET_NCSI_INFO_STATISTICS_OUT_LEN 28\n+/* The number of NC-SI commands received. */\n+#define\tMC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMDS_RX_OFST 0\n+#define\tMC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMDS_RX_LEN 4\n+/* The number of NC-SI commands dropped. */\n+#define\tMC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_PKTS_DROPPED_OFST 4\n+#define\tMC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_PKTS_DROPPED_LEN 4\n+/* The number of invalid NC-SI commands received. */\n+#define\tMC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMD_TYPE_ERRS_OFST 8\n+#define\tMC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMD_TYPE_ERRS_LEN 4\n+/* The number of checksum errors seen. */\n+#define\tMC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMD_CSUM_ERRS_OFST 12\n+#define\tMC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMD_CSUM_ERRS_LEN 4\n+/* The number of NC-SI requests received. */\n+#define\tMC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_RX_PKTS_OFST 16\n+#define\tMC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_RX_PKTS_LEN 4\n+/* The number of NC-SI responses sent (includes AENs) */\n+#define\tMC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_TX_PKTS_OFST 20\n+#define\tMC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_TX_PKTS_LEN 4\n+/* The number of NC-SI AENs sent */\n+#define\tMC_CMD_GET_NCSI_INFO_STATISTICS_OUT_AENS_SENT_OFST 24\n+#define\tMC_CMD_GET_NCSI_INFO_STATISTICS_OUT_AENS_SENT_LEN 4\n+\n /* EF100_MCDI_EVENT structuredef: The structure of an MCDI_EVENT on EF100\n  * platforms\n  */\n@@ -19102,10 +20664,15 @@\n  */\n #define\tEF100_MCDI_EVENT_PTP_DATA_OFST 2\n #define\tEF100_MCDI_EVENT_PTP_DATA_LEN 1\n-#define\tEF100_MCDI_EVENT_SRC_LBN 0\n-#define\tEF100_MCDI_EVENT_SRC_WIDTH 8\n #define\tEF100_MCDI_EVENT_PTP_DATA_LBN 16\n #define\tEF100_MCDI_EVENT_PTP_DATA_WIDTH 8\n+/* Alias for PTP_DATA. Nobody uses SRC to mean the source of anything, but\n+ * there's code that uses it to refer to ptp data\n+ */\n+#define\tEF100_MCDI_EVENT_SRC_OFST 2\n+#define\tEF100_MCDI_EVENT_SRC_LEN 1\n+#define\tEF100_MCDI_EVENT_SRC_LBN 16\n+#define\tEF100_MCDI_EVENT_SRC_WIDTH 8\n /* Set if this message continues into another event */\n #define\tEF100_MCDI_EVENT_CONT_LBN 24\n #define\tEF100_MCDI_EVENT_CONT_WIDTH 1\n@@ -19119,4 +20686,72 @@\n #define\tEF100_MCDI_EVENT_DATA_LBN 32\n #define\tEF100_MCDI_EVENT_DATA_WIDTH 32\n \n+/* CLOCK_INFO structuredef: Information about a single hardware clock */\n+#define\tCLOCK_INFO_LEN 28\n+/* Enumeration that uniquely identifies the clock */\n+#define\tCLOCK_INFO_CLOCK_ID_OFST 0\n+#define\tCLOCK_INFO_CLOCK_ID_LEN 2\n+/* enum: The Riverhead CMC (card MC) */\n+#define\tCLOCK_INFO_CLOCK_CMC 0x0\n+/* enum: The Riverhead NMC (network MC) */\n+#define\tCLOCK_INFO_CLOCK_NMC 0x1\n+/* enum: The Riverhead SDNET slice main logic */\n+#define\tCLOCK_INFO_CLOCK_SDNET 0x2\n+/* enum: The Riverhead SDNET LUT */\n+#define\tCLOCK_INFO_CLOCK_SDNET_LUT 0x3\n+/* enum: The Riverhead SDNET control logic */\n+#define\tCLOCK_INFO_CLOCK_SDNET_CTRL 0x4\n+/* enum: The Riverhead Streaming SubSystem */\n+#define\tCLOCK_INFO_CLOCK_SSS 0x5\n+/* enum: The Riverhead network MAC and associated CSR registers */\n+#define\tCLOCK_INFO_CLOCK_MAC 0x6\n+#define\tCLOCK_INFO_CLOCK_ID_LBN 0\n+#define\tCLOCK_INFO_CLOCK_ID_WIDTH 16\n+/* Assorted flags */\n+#define\tCLOCK_INFO_FLAGS_OFST 2\n+#define\tCLOCK_INFO_FLAGS_LEN 2\n+#define\tCLOCK_INFO_SETTABLE_LBN 0\n+#define\tCLOCK_INFO_SETTABLE_WIDTH 1\n+#define\tCLOCK_INFO_FLAGS_LBN 16\n+#define\tCLOCK_INFO_FLAGS_WIDTH 16\n+/* The frequency in HZ */\n+#define\tCLOCK_INFO_FREQUENCY_OFST 4\n+#define\tCLOCK_INFO_FREQUENCY_LEN 8\n+#define\tCLOCK_INFO_FREQUENCY_LO_OFST 4\n+#define\tCLOCK_INFO_FREQUENCY_HI_OFST 8\n+#define\tCLOCK_INFO_FREQUENCY_LBN 32\n+#define\tCLOCK_INFO_FREQUENCY_WIDTH 64\n+/* Human-readable ASCII name for clock, with NUL termination */\n+#define\tCLOCK_INFO_NAME_OFST 12\n+#define\tCLOCK_INFO_NAME_LEN 1\n+#define\tCLOCK_INFO_NAME_NUM 16\n+#define\tCLOCK_INFO_NAME_LBN 96\n+#define\tCLOCK_INFO_NAME_WIDTH 8\n+\n+\n+/***********************************/\n+/* MC_CMD_GET_CLOCKS_INFO\n+ * Get information about the device clocks\n+ */\n+#define\tMC_CMD_GET_CLOCKS_INFO 0x166\n+#undef\tMC_CMD_0x166_PRIVILEGE_CTG\n+\n+#define\tMC_CMD_0x166_PRIVILEGE_CTG SRIOV_CTG_GENERAL\n+\n+/* MC_CMD_GET_CLOCKS_INFO_IN msgrequest */\n+#define\tMC_CMD_GET_CLOCKS_INFO_IN_LEN 0\n+\n+/* MC_CMD_GET_CLOCKS_INFO_OUT msgresponse */\n+#define\tMC_CMD_GET_CLOCKS_INFO_OUT_LENMIN 0\n+#define\tMC_CMD_GET_CLOCKS_INFO_OUT_LENMAX 252\n+#define\tMC_CMD_GET_CLOCKS_INFO_OUT_LENMAX_MCDI2 1008\n+#define\tMC_CMD_GET_CLOCKS_INFO_OUT_LEN(num) (0+28*(num))\n+#define\tMC_CMD_GET_CLOCKS_INFO_OUT_INFOS_NUM(len) (((len)-0)/28)\n+/* An array of CLOCK_INFO structures. */\n+#define\tMC_CMD_GET_CLOCKS_INFO_OUT_INFOS_OFST 0\n+#define\tMC_CMD_GET_CLOCKS_INFO_OUT_INFOS_LEN 28\n+#define\tMC_CMD_GET_CLOCKS_INFO_OUT_INFOS_MINNUM 0\n+#define\tMC_CMD_GET_CLOCKS_INFO_OUT_INFOS_MAXNUM 9\n+#define\tMC_CMD_GET_CLOCKS_INFO_OUT_INFOS_MAXNUM_MCDI2 36\n+\n #endif /* _SIENA_MC_DRIVER_PCOL_H */\ndiff --git a/drivers/net/sfc/base/efx_regs_mcdi_aoe.h b/drivers/net/sfc/base/efx_regs_mcdi_aoe.h\nindex 6bedfd7..8570dbc 100644\n--- a/drivers/net/sfc/base/efx_regs_mcdi_aoe.h\n+++ b/drivers/net/sfc/base/efx_regs_mcdi_aoe.h\n@@ -277,6 +277,7 @@\n #define\tMC_CMD_FC_IN_WRITE32_LENMAX 252\n #define\tMC_CMD_FC_IN_WRITE32_LENMAX_MCDI2 1020\n #define\tMC_CMD_FC_IN_WRITE32_LEN(num) (12+4*(num))\n+#define\tMC_CMD_FC_IN_WRITE32_BUFFER_NUM(len) (((len)-12)/4)\n /*            MC_CMD_FC_IN_CMD_OFST 0 */\n /*            MC_CMD_FC_IN_CMD_LEN 4 */\n #define\tMC_CMD_FC_IN_WRITE32_ADDR_HI_OFST 4\n@@ -525,6 +526,7 @@\n #define\tMC_CMD_FC_IN_IO_REL_WRITE32_LENMAX 252\n #define\tMC_CMD_FC_IN_IO_REL_WRITE32_LENMAX_MCDI2 1020\n #define\tMC_CMD_FC_IN_IO_REL_WRITE32_LEN(num) (16+4*(num))\n+#define\tMC_CMD_FC_IN_IO_REL_WRITE32_BUFFER_NUM(len) (((len)-16)/4)\n /*            MC_CMD_FC_IN_CMD_OFST 0 */\n /*            MC_CMD_FC_IN_CMD_LEN 4 */\n /*            MC_CMD_FC_IN_IO_REL_HEADER_OFST 4 */\n@@ -1031,6 +1033,7 @@\n #define\tMC_CMD_FC_IN_SPI_WRITE_LENMAX 252\n #define\tMC_CMD_FC_IN_SPI_WRITE_LENMAX_MCDI2 1020\n #define\tMC_CMD_FC_IN_SPI_WRITE_LEN(num) (12+4*(num))\n+#define\tMC_CMD_FC_IN_SPI_WRITE_BUFFER_NUM(len) (((len)-12)/4)\n /*            MC_CMD_FC_IN_CMD_OFST 0 */\n /*            MC_CMD_FC_IN_CMD_LEN 4 */\n #define\tMC_CMD_FC_IN_SPI_WRITE_OP_OFST 4\n@@ -1256,6 +1259,7 @@\n #define\tMC_CMD_FC_OUT_READ32_LENMAX 252\n #define\tMC_CMD_FC_OUT_READ32_LENMAX_MCDI2 1020\n #define\tMC_CMD_FC_OUT_READ32_LEN(num) (0+4*(num))\n+#define\tMC_CMD_FC_OUT_READ32_BUFFER_NUM(len) (((len)-0)/4)\n #define\tMC_CMD_FC_OUT_READ32_BUFFER_OFST 0\n #define\tMC_CMD_FC_OUT_READ32_BUFFER_LEN 4\n #define\tMC_CMD_FC_OUT_READ32_BUFFER_MINNUM 1\n@@ -1870,6 +1874,7 @@\n #define\tMC_CMD_FC_OUT_IO_REL_READ32_LENMAX 252\n #define\tMC_CMD_FC_OUT_IO_REL_READ32_LENMAX_MCDI2 1020\n #define\tMC_CMD_FC_OUT_IO_REL_READ32_LEN(num) (0+4*(num))\n+#define\tMC_CMD_FC_OUT_IO_REL_READ32_BUFFER_NUM(len) (((len)-0)/4)\n #define\tMC_CMD_FC_OUT_IO_REL_READ32_BUFFER_OFST 0\n #define\tMC_CMD_FC_OUT_IO_REL_READ32_BUFFER_LEN 4\n #define\tMC_CMD_FC_OUT_IO_REL_READ32_BUFFER_MINNUM 1\n@@ -2027,6 +2032,7 @@\n #define\tMC_CMD_FC_OUT_DMA_READ_LENMAX 252\n #define\tMC_CMD_FC_OUT_DMA_READ_LENMAX_MCDI2 1020\n #define\tMC_CMD_FC_OUT_DMA_READ_LEN(num) (0+1*(num))\n+#define\tMC_CMD_FC_OUT_DMA_READ_DATA_NUM(len) (((len)-0)/1)\n /* The data read */\n #define\tMC_CMD_FC_OUT_DMA_READ_DATA_OFST 0\n #define\tMC_CMD_FC_OUT_DMA_READ_DATA_LEN 1\n@@ -2128,6 +2134,7 @@\n #define\tMC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_LENMAX 248\n #define\tMC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_LENMAX_MCDI2 1016\n #define\tMC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_LEN(num) (0+8*(num))\n+#define\tMC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_NUM(len) (((len)-0)/8)\n #define\tMC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_SECONDS_OFST 0\n #define\tMC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_SECONDS_LEN 4\n #define\tMC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_NANOSECONDS_OFST 4\n@@ -2145,6 +2152,7 @@\n #define\tMC_CMD_FC_OUT_SPI_READ_LENMAX 252\n #define\tMC_CMD_FC_OUT_SPI_READ_LENMAX_MCDI2 1020\n #define\tMC_CMD_FC_OUT_SPI_READ_LEN(num) (0+4*(num))\n+#define\tMC_CMD_FC_OUT_SPI_READ_BUFFER_NUM(len) (((len)-0)/4)\n #define\tMC_CMD_FC_OUT_SPI_READ_BUFFER_OFST 0\n #define\tMC_CMD_FC_OUT_SPI_READ_BUFFER_LEN 4\n #define\tMC_CMD_FC_OUT_SPI_READ_BUFFER_MINNUM 1\n@@ -2433,6 +2441,7 @@\n #define\tMC_CMD_AOE_IN_JTAG_WRITE_LENMAX 252\n #define\tMC_CMD_AOE_IN_JTAG_WRITE_LENMAX_MCDI2 1020\n #define\tMC_CMD_AOE_IN_JTAG_WRITE_LEN(num) (8+4*(num))\n+#define\tMC_CMD_AOE_IN_JTAG_WRITE_DATA_NUM(len) (((len)-8)/4)\n /*            MC_CMD_AOE_IN_CMD_OFST 0 */\n /*            MC_CMD_AOE_IN_CMD_LEN 4 */\n #define\tMC_CMD_AOE_IN_JTAG_WRITE_DATALEN_OFST 4\n@@ -2794,6 +2803,7 @@\n #define\tMC_CMD_AOE_OUT_FAN_FAILURES_LENMAX 252\n #define\tMC_CMD_AOE_OUT_FAN_FAILURES_LENMAX_MCDI2 1020\n #define\tMC_CMD_AOE_OUT_FAN_FAILURES_LEN(num) (0+4*(num))\n+#define\tMC_CMD_AOE_OUT_FAN_FAILURES_COUNT_NUM(len) (((len)-0)/4)\n /* Failure counts for each fan */\n #define\tMC_CMD_AOE_OUT_FAN_FAILURES_COUNT_OFST 0\n #define\tMC_CMD_AOE_OUT_FAN_FAILURES_COUNT_LEN 4\n@@ -2834,6 +2844,7 @@\n #define\tMC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_LENMAX 252\n #define\tMC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_LENMAX_MCDI2 1020\n #define\tMC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_LEN(num) (4+1*(num))\n+#define\tMC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_DATA_NUM(len) (((len)-4)/1)\n /* in bytes */\n #define\tMC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_DATALEN_OFST 0\n #define\tMC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_DATALEN_LEN 4\n@@ -2848,6 +2859,7 @@\n #define\tMC_CMD_AOE_OUT_JTAG_WRITE_LENMAX 252\n #define\tMC_CMD_AOE_OUT_JTAG_WRITE_LENMAX_MCDI2 1020\n #define\tMC_CMD_AOE_OUT_JTAG_WRITE_LEN(num) (8+4*(num))\n+#define\tMC_CMD_AOE_OUT_JTAG_WRITE_DATA_NUM(len) (((len)-8)/4)\n /* Used to align the in and out data blocks so the MC can re-use the cmd */\n #define\tMC_CMD_AOE_OUT_JTAG_WRITE_DATALEN_OFST 0\n #define\tMC_CMD_AOE_OUT_JTAG_WRITE_DATALEN_LEN 4\n@@ -2868,6 +2880,7 @@\n #define\tMC_CMD_AOE_OUT_DDR_LENMAX 252\n #define\tMC_CMD_AOE_OUT_DDR_LENMAX_MCDI2 1020\n #define\tMC_CMD_AOE_OUT_DDR_LEN(num) (16+1*(num))\n+#define\tMC_CMD_AOE_OUT_DDR_SPD_NUM(len) (((len)-16)/1)\n /* Information on the module. */\n #define\tMC_CMD_AOE_OUT_DDR_FLAGS_OFST 0\n #define\tMC_CMD_AOE_OUT_DDR_FLAGS_LEN 4\ndiff --git a/drivers/net/sfc/base/efx_regs_mcdi_strs.h b/drivers/net/sfc/base/efx_regs_mcdi_strs.h\nindex 73d633c..9f6d88c 100644\n--- a/drivers/net/sfc/base/efx_regs_mcdi_strs.h\n+++ b/drivers/net/sfc/base/efx_regs_mcdi_strs.h\n@@ -6,97 +6,97 @@\n \n /*\n  * This file is automatically generated. DO NOT EDIT IT.\n- * To make changes, edit the .yml files under firmwaresrc doc/mcdi/ and\n+ * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and\n  * rebuild this file with \"make -C doc mcdiheaders\".\n  *\n  * The version of this file has MCDI strings really used in the libefx.\n  */\n \n-#ifndef _MC_DRIVER_PCOL_STRS_H\n-#define _MC_DRIVER_PCOL_STRS_H\n+#ifndef _SIENA_MC_DRIVER_PCOL_STRS_H\n+#define\t_SIENA_MC_DRIVER_PCOL_STRS_H\n \n-#define MC_CMD_SENSOR_CONTROLLER_TEMP_ENUM_STR \"Controller temperature: degC\"\n-#define MC_CMD_SENSOR_PHY_COMMON_TEMP_ENUM_STR \"Phy common temperature: degC\"\n-#define MC_CMD_SENSOR_CONTROLLER_COOLING_ENUM_STR \"Controller cooling: bool\"\n-#define MC_CMD_SENSOR_PHY0_TEMP_ENUM_STR \"Phy 0 temperature: degC\"\n-#define MC_CMD_SENSOR_PHY0_COOLING_ENUM_STR \"Phy 0 cooling: bool\"\n-#define MC_CMD_SENSOR_PHY1_TEMP_ENUM_STR \"Phy 1 temperature: degC\"\n-#define MC_CMD_SENSOR_PHY1_COOLING_ENUM_STR \"Phy 1 cooling: bool\"\n-#define MC_CMD_SENSOR_IN_1V0_ENUM_STR \"1.0v power: mV\"\n-#define MC_CMD_SENSOR_IN_1V2_ENUM_STR \"1.2v power: mV\"\n-#define MC_CMD_SENSOR_IN_1V8_ENUM_STR \"1.8v power: mV\"\n-#define MC_CMD_SENSOR_IN_2V5_ENUM_STR \"2.5v power: mV\"\n-#define MC_CMD_SENSOR_IN_3V3_ENUM_STR \"3.3v power: mV\"\n-#define MC_CMD_SENSOR_IN_12V0_ENUM_STR \"12v power: mV\"\n-#define MC_CMD_SENSOR_IN_1V2A_ENUM_STR \"1.2v analogue power: mV\"\n-#define MC_CMD_SENSOR_IN_VREF_ENUM_STR \"reference voltage: mV\"\n-#define MC_CMD_SENSOR_OUT_VAOE_ENUM_STR \"AOE FPGA power: mV\"\n-#define MC_CMD_SENSOR_AOE_TEMP_ENUM_STR \"AOE FPGA temperature: degC\"\n-#define MC_CMD_SENSOR_PSU_AOE_TEMP_ENUM_STR \"AOE FPGA PSU temperature: degC\"\n-#define MC_CMD_SENSOR_PSU_TEMP_ENUM_STR \"AOE PSU temperature: degC\"\n-#define MC_CMD_SENSOR_FAN_0_ENUM_STR \"Fan 0 speed: RPM\"\n-#define MC_CMD_SENSOR_FAN_1_ENUM_STR \"Fan 1 speed: RPM\"\n-#define MC_CMD_SENSOR_FAN_2_ENUM_STR \"Fan 2 speed: RPM\"\n-#define MC_CMD_SENSOR_FAN_3_ENUM_STR \"Fan 3 speed: RPM\"\n-#define MC_CMD_SENSOR_FAN_4_ENUM_STR \"Fan 4 speed: RPM\"\n-#define MC_CMD_SENSOR_IN_VAOE_ENUM_STR \"AOE FPGA input power: mV\"\n-#define MC_CMD_SENSOR_OUT_IAOE_ENUM_STR \"AOE FPGA current: mA\"\n-#define MC_CMD_SENSOR_IN_IAOE_ENUM_STR \"AOE FPGA input current: mA\"\n-#define MC_CMD_SENSOR_NIC_POWER_ENUM_STR \"NIC power consumption: W\"\n-#define MC_CMD_SENSOR_IN_0V9_ENUM_STR \"0.9v power voltage: mV\"\n-#define MC_CMD_SENSOR_IN_I0V9_ENUM_STR \"0.9v power current: mA\"\n-#define MC_CMD_SENSOR_IN_I1V2_ENUM_STR \"1.2v power current: mA\"\n-#define MC_CMD_SENSOR_PAGE0_NEXT_ENUM_STR \"Not a sensor: reserved for the next page flag\"\n-#define MC_CMD_SENSOR_IN_0V9_ADC_ENUM_STR \"0.9v power voltage (at ADC): mV\"\n-#define MC_CMD_SENSOR_CONTROLLER_2_TEMP_ENUM_STR \"Controller temperature 2: degC\"\n-#define MC_CMD_SENSOR_VREG_INTERNAL_TEMP_ENUM_STR \"Voltage regulator internal temperature: degC\"\n-#define MC_CMD_SENSOR_VREG_0V9_TEMP_ENUM_STR \"0.9V voltage regulator temperature: degC\"\n-#define MC_CMD_SENSOR_VREG_1V2_TEMP_ENUM_STR \"1.2V voltage regulator temperature: degC\"\n-#define MC_CMD_SENSOR_CONTROLLER_VPTAT_ENUM_STR \"controller internal temperature sensor voltage (internal ADC): mV\"\n-#define MC_CMD_SENSOR_CONTROLLER_INTERNAL_TEMP_ENUM_STR \"controller internal temperature (internal ADC): degC\"\n-#define MC_CMD_SENSOR_CONTROLLER_VPTAT_EXTADC_ENUM_STR \"controller internal temperature sensor voltage (external ADC): mV\"\n-#define MC_CMD_SENSOR_CONTROLLER_INTERNAL_TEMP_EXTADC_ENUM_STR \"controller internal temperature (external ADC): degC\"\n-#define MC_CMD_SENSOR_AMBIENT_TEMP_ENUM_STR \"ambient temperature: degC\"\n-#define MC_CMD_SENSOR_AIRFLOW_ENUM_STR \"air flow: bool\"\n-#define MC_CMD_SENSOR_VDD08D_VSS08D_CSR_ENUM_STR \"voltage between VSS08D and VSS08D at CSR: mV\"\n-#define MC_CMD_SENSOR_VDD08D_VSS08D_CSR_EXTADC_ENUM_STR \"voltage between VSS08D and VSS08D at CSR (external ADC): mV\"\n-#define MC_CMD_SENSOR_HOTPOINT_TEMP_ENUM_STR \"Hotpoint temperature: degC\"\n-#define MC_CMD_SENSOR_PHY_POWER_PORT0_ENUM_STR \"Port 0 PHY power switch over-current: bool\"\n-#define MC_CMD_SENSOR_PHY_POWER_PORT1_ENUM_STR \"Port 1 PHY power switch over-current: bool\"\n-#define MC_CMD_SENSOR_MUM_VCC_ENUM_STR \"Mop-up microcontroller reference voltage: mV\"\n-#define MC_CMD_SENSOR_IN_0V9_A_ENUM_STR \"0.9v power phase A voltage: mV\"\n-#define MC_CMD_SENSOR_IN_I0V9_A_ENUM_STR \"0.9v power phase A current: mA\"\n-#define MC_CMD_SENSOR_VREG_0V9_A_TEMP_ENUM_STR \"0.9V voltage regulator phase A temperature: degC\"\n-#define MC_CMD_SENSOR_IN_0V9_B_ENUM_STR \"0.9v power phase B voltage: mV\"\n-#define MC_CMD_SENSOR_IN_I0V9_B_ENUM_STR \"0.9v power phase B current: mA\"\n-#define MC_CMD_SENSOR_VREG_0V9_B_TEMP_ENUM_STR \"0.9V voltage regulator phase B temperature: degC\"\n-#define MC_CMD_SENSOR_CCOM_AVREG_1V2_SUPPLY_ENUM_STR \"CCOM AVREG 1v2 supply (interval ADC): mV\"\n-#define MC_CMD_SENSOR_CCOM_AVREG_1V2_SUPPLY_EXTADC_ENUM_STR \"CCOM AVREG 1v2 supply (external ADC): mV\"\n-#define MC_CMD_SENSOR_CCOM_AVREG_1V8_SUPPLY_ENUM_STR \"CCOM AVREG 1v8 supply (interval ADC): mV\"\n-#define MC_CMD_SENSOR_CCOM_AVREG_1V8_SUPPLY_EXTADC_ENUM_STR \"CCOM AVREG 1v8 supply (external ADC): mV\"\n-#define MC_CMD_SENSOR_CONTROLLER_RTS_ENUM_STR \"CCOM RTS temperature: degC\"\n-#define MC_CMD_SENSOR_PAGE1_NEXT_ENUM_STR \"Not a sensor: reserved for the next page flag\"\n-#define MC_CMD_SENSOR_CONTROLLER_MASTER_VPTAT_ENUM_STR \"controller internal temperature sensor voltage on master core (internal ADC): mV\"\n-#define MC_CMD_SENSOR_CONTROLLER_MASTER_INTERNAL_TEMP_ENUM_STR \"controller internal temperature on master core (internal ADC): degC\"\n-#define MC_CMD_SENSOR_CONTROLLER_MASTER_VPTAT_EXTADC_ENUM_STR \"controller internal temperature sensor voltage on master core (external ADC): mV\"\n-#define MC_CMD_SENSOR_CONTROLLER_MASTER_INTERNAL_TEMP_EXTADC_ENUM_STR \"controller internal temperature on master core (external ADC): degC\"\n-#define MC_CMD_SENSOR_CONTROLLER_SLAVE_VPTAT_ENUM_STR \"controller internal temperature on slave core sensor voltage (internal ADC): mV\"\n-#define MC_CMD_SENSOR_CONTROLLER_SLAVE_INTERNAL_TEMP_ENUM_STR \"controller internal temperature on slave core (internal ADC): degC\"\n-#define MC_CMD_SENSOR_CONTROLLER_SLAVE_VPTAT_EXTADC_ENUM_STR \"controller internal temperature on slave core sensor voltage (external ADC): mV\"\n-#define MC_CMD_SENSOR_CONTROLLER_SLAVE_INTERNAL_TEMP_EXTADC_ENUM_STR \"controller internal temperature on slave core (external ADC): degC\"\n-#define MC_CMD_SENSOR_SODIMM_VOUT_ENUM_STR \"Voltage supplied to the SODIMMs from their power supply: mV\"\n-#define MC_CMD_SENSOR_SODIMM_0_TEMP_ENUM_STR \"Temperature of SODIMM 0 (if installed): degC\"\n-#define MC_CMD_SENSOR_SODIMM_1_TEMP_ENUM_STR \"Temperature of SODIMM 1 (if installed): degC\"\n-#define MC_CMD_SENSOR_PHY0_VCC_ENUM_STR \"Voltage supplied to the QSFP #0 from their power supply: mV\"\n-#define MC_CMD_SENSOR_PHY1_VCC_ENUM_STR \"Voltage supplied to the QSFP #1 from their power supply: mV\"\n-#define MC_CMD_SENSOR_CONTROLLER_TDIODE_TEMP_ENUM_STR \"Controller die temperature (TDIODE): degC\"\n-#define MC_CMD_SENSOR_BOARD_FRONT_TEMP_ENUM_STR \"Board temperature (front): degC\"\n-#define MC_CMD_SENSOR_BOARD_BACK_TEMP_ENUM_STR \"Board temperature (back): degC\"\n-#define MC_CMD_SENSOR_IN_I1V8_ENUM_STR \"1.8v power current: mA\"\n-#define MC_CMD_SENSOR_IN_I2V5_ENUM_STR \"2.5v power current: mA\"\n-#define MC_CMD_SENSOR_IN_I3V3_ENUM_STR \"3.3v power current: mA\"\n-#define MC_CMD_SENSOR_IN_I12V0_ENUM_STR \"12v power current: mA\"\n-#define MC_CMD_SENSOR_IN_1V3_ENUM_STR \"1.3v power: mV\"\n-#define MC_CMD_SENSOR_IN_I1V3_ENUM_STR \"1.3v power current: mA\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_TEMP_ENUM_STR \"Controller temperature: degC\"\n+#define\tMC_CMD_SENSOR_PHY_COMMON_TEMP_ENUM_STR \"Phy common temperature: degC\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_COOLING_ENUM_STR \"Controller cooling: bool\"\n+#define\tMC_CMD_SENSOR_PHY0_TEMP_ENUM_STR \"Phy 0 temperature: degC\"\n+#define\tMC_CMD_SENSOR_PHY0_COOLING_ENUM_STR \"Phy 0 cooling: bool\"\n+#define\tMC_CMD_SENSOR_PHY1_TEMP_ENUM_STR \"Phy 1 temperature: degC\"\n+#define\tMC_CMD_SENSOR_PHY1_COOLING_ENUM_STR \"Phy 1 cooling: bool\"\n+#define\tMC_CMD_SENSOR_IN_1V0_ENUM_STR \"1.0v power: mV\"\n+#define\tMC_CMD_SENSOR_IN_1V2_ENUM_STR \"1.2v power: mV\"\n+#define\tMC_CMD_SENSOR_IN_1V8_ENUM_STR \"1.8v power: mV\"\n+#define\tMC_CMD_SENSOR_IN_2V5_ENUM_STR \"2.5v power: mV\"\n+#define\tMC_CMD_SENSOR_IN_3V3_ENUM_STR \"3.3v power: mV\"\n+#define\tMC_CMD_SENSOR_IN_12V0_ENUM_STR \"12v power: mV\"\n+#define\tMC_CMD_SENSOR_IN_1V2A_ENUM_STR \"1.2v analogue power: mV\"\n+#define\tMC_CMD_SENSOR_IN_VREF_ENUM_STR \"reference voltage: mV\"\n+#define\tMC_CMD_SENSOR_OUT_VAOE_ENUM_STR \"AOE FPGA power: mV\"\n+#define\tMC_CMD_SENSOR_AOE_TEMP_ENUM_STR \"AOE FPGA temperature: degC\"\n+#define\tMC_CMD_SENSOR_PSU_AOE_TEMP_ENUM_STR \"AOE FPGA PSU temperature: degC\"\n+#define\tMC_CMD_SENSOR_PSU_TEMP_ENUM_STR \"AOE PSU temperature: degC\"\n+#define\tMC_CMD_SENSOR_FAN_0_ENUM_STR \"Fan 0 speed: RPM\"\n+#define\tMC_CMD_SENSOR_FAN_1_ENUM_STR \"Fan 1 speed: RPM\"\n+#define\tMC_CMD_SENSOR_FAN_2_ENUM_STR \"Fan 2 speed: RPM\"\n+#define\tMC_CMD_SENSOR_FAN_3_ENUM_STR \"Fan 3 speed: RPM\"\n+#define\tMC_CMD_SENSOR_FAN_4_ENUM_STR \"Fan 4 speed: RPM\"\n+#define\tMC_CMD_SENSOR_IN_VAOE_ENUM_STR \"AOE FPGA input power: mV\"\n+#define\tMC_CMD_SENSOR_OUT_IAOE_ENUM_STR \"AOE FPGA current: mA\"\n+#define\tMC_CMD_SENSOR_IN_IAOE_ENUM_STR \"AOE FPGA input current: mA\"\n+#define\tMC_CMD_SENSOR_NIC_POWER_ENUM_STR \"NIC power consumption: W\"\n+#define\tMC_CMD_SENSOR_IN_0V9_ENUM_STR \"0.9v power voltage: mV\"\n+#define\tMC_CMD_SENSOR_IN_I0V9_ENUM_STR \"0.9v power current: mA\"\n+#define\tMC_CMD_SENSOR_IN_I1V2_ENUM_STR \"1.2v power current: mA\"\n+#define\tMC_CMD_SENSOR_PAGE0_NEXT_ENUM_STR \"Not a sensor: reserved for the next page flag\"\n+#define\tMC_CMD_SENSOR_IN_0V9_ADC_ENUM_STR \"0.9v power voltage (at ADC): mV\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_2_TEMP_ENUM_STR \"Controller temperature 2: degC\"\n+#define\tMC_CMD_SENSOR_VREG_INTERNAL_TEMP_ENUM_STR \"Voltage regulator internal temperature: degC\"\n+#define\tMC_CMD_SENSOR_VREG_0V9_TEMP_ENUM_STR \"0.9V voltage regulator temperature: degC\"\n+#define\tMC_CMD_SENSOR_VREG_1V2_TEMP_ENUM_STR \"1.2V voltage regulator temperature: degC\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_VPTAT_ENUM_STR \"controller internal temperature sensor voltage (internal ADC): mV\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_INTERNAL_TEMP_ENUM_STR \"controller internal temperature (internal ADC): degC\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_VPTAT_EXTADC_ENUM_STR \"controller internal temperature sensor voltage (external ADC): mV\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_INTERNAL_TEMP_EXTADC_ENUM_STR \"controller internal temperature (external ADC): degC\"\n+#define\tMC_CMD_SENSOR_AMBIENT_TEMP_ENUM_STR \"ambient temperature: degC\"\n+#define\tMC_CMD_SENSOR_AIRFLOW_ENUM_STR \"air flow: bool\"\n+#define\tMC_CMD_SENSOR_VDD08D_VSS08D_CSR_ENUM_STR \"voltage between VSS08D and VSS08D at CSR: mV\"\n+#define\tMC_CMD_SENSOR_VDD08D_VSS08D_CSR_EXTADC_ENUM_STR \"voltage between VSS08D and VSS08D at CSR (external ADC): mV\"\n+#define\tMC_CMD_SENSOR_HOTPOINT_TEMP_ENUM_STR \"Hotpoint temperature: degC\"\n+#define\tMC_CMD_SENSOR_PHY_POWER_PORT0_ENUM_STR \"Port 0 PHY power switch over-current: bool\"\n+#define\tMC_CMD_SENSOR_PHY_POWER_PORT1_ENUM_STR \"Port 1 PHY power switch over-current: bool\"\n+#define\tMC_CMD_SENSOR_MUM_VCC_ENUM_STR \"Mop-up microcontroller reference voltage: mV\"\n+#define\tMC_CMD_SENSOR_IN_0V9_A_ENUM_STR \"0.9v power phase A voltage: mV\"\n+#define\tMC_CMD_SENSOR_IN_I0V9_A_ENUM_STR \"0.9v power phase A current: mA\"\n+#define\tMC_CMD_SENSOR_VREG_0V9_A_TEMP_ENUM_STR \"0.9V voltage regulator phase A temperature: degC\"\n+#define\tMC_CMD_SENSOR_IN_0V9_B_ENUM_STR \"0.9v power phase B voltage: mV\"\n+#define\tMC_CMD_SENSOR_IN_I0V9_B_ENUM_STR \"0.9v power phase B current: mA\"\n+#define\tMC_CMD_SENSOR_VREG_0V9_B_TEMP_ENUM_STR \"0.9V voltage regulator phase B temperature: degC\"\n+#define\tMC_CMD_SENSOR_CCOM_AVREG_1V2_SUPPLY_ENUM_STR \"CCOM AVREG 1v2 supply (interval ADC): mV\"\n+#define\tMC_CMD_SENSOR_CCOM_AVREG_1V2_SUPPLY_EXTADC_ENUM_STR \"CCOM AVREG 1v2 supply (external ADC): mV\"\n+#define\tMC_CMD_SENSOR_CCOM_AVREG_1V8_SUPPLY_ENUM_STR \"CCOM AVREG 1v8 supply (interval ADC): mV\"\n+#define\tMC_CMD_SENSOR_CCOM_AVREG_1V8_SUPPLY_EXTADC_ENUM_STR \"CCOM AVREG 1v8 supply (external ADC): mV\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_RTS_ENUM_STR \"CCOM RTS temperature: degC\"\n+#define\tMC_CMD_SENSOR_PAGE1_NEXT_ENUM_STR \"Not a sensor: reserved for the next page flag\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_MASTER_VPTAT_ENUM_STR \"controller internal temperature sensor voltage on master core (internal ADC): mV\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_MASTER_INTERNAL_TEMP_ENUM_STR \"controller internal temperature on master core (internal ADC): degC\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_MASTER_VPTAT_EXTADC_ENUM_STR \"controller internal temperature sensor voltage on master core (external ADC): mV\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_MASTER_INTERNAL_TEMP_EXTADC_ENUM_STR \"controller internal temperature on master core (external ADC): degC\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_SLAVE_VPTAT_ENUM_STR \"controller internal temperature on slave core sensor voltage (internal ADC): mV\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_SLAVE_INTERNAL_TEMP_ENUM_STR \"controller internal temperature on slave core (internal ADC): degC\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_SLAVE_VPTAT_EXTADC_ENUM_STR \"controller internal temperature on slave core sensor voltage (external ADC): mV\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_SLAVE_INTERNAL_TEMP_EXTADC_ENUM_STR \"controller internal temperature on slave core (external ADC): degC\"\n+#define\tMC_CMD_SENSOR_SODIMM_VOUT_ENUM_STR \"Voltage supplied to the SODIMMs from their power supply: mV\"\n+#define\tMC_CMD_SENSOR_SODIMM_0_TEMP_ENUM_STR \"Temperature of SODIMM 0 (if installed): degC\"\n+#define\tMC_CMD_SENSOR_SODIMM_1_TEMP_ENUM_STR \"Temperature of SODIMM 1 (if installed): degC\"\n+#define\tMC_CMD_SENSOR_PHY0_VCC_ENUM_STR \"Voltage supplied to the QSFP #0 from their power supply: mV\"\n+#define\tMC_CMD_SENSOR_PHY1_VCC_ENUM_STR \"Voltage supplied to the QSFP #1 from their power supply: mV\"\n+#define\tMC_CMD_SENSOR_CONTROLLER_TDIODE_TEMP_ENUM_STR \"Controller die temperature (TDIODE): degC\"\n+#define\tMC_CMD_SENSOR_BOARD_FRONT_TEMP_ENUM_STR \"Board temperature (front): degC\"\n+#define\tMC_CMD_SENSOR_BOARD_BACK_TEMP_ENUM_STR \"Board temperature (back): degC\"\n+#define\tMC_CMD_SENSOR_IN_I1V8_ENUM_STR \"1.8v power current: mA\"\n+#define\tMC_CMD_SENSOR_IN_I2V5_ENUM_STR \"2.5v power current: mA\"\n+#define\tMC_CMD_SENSOR_IN_I3V3_ENUM_STR \"3.3v power current: mA\"\n+#define\tMC_CMD_SENSOR_IN_I12V0_ENUM_STR \"12v power current: mA\"\n+#define\tMC_CMD_SENSOR_IN_1V3_ENUM_STR \"1.3v power: mV\"\n+#define\tMC_CMD_SENSOR_IN_I1V3_ENUM_STR \"1.3v power current: mA\"\n \n-#endif /* _MC_DRIVER_PCOL_STRS_H */\n+#endif /* _SIENA_MC_DRIVER_PCOL_STRS_H */\n",
    "prefixes": [
        "10/29"
    ]
}