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{
    "id": 54158,
    "url": "http://patches.dpdk.org/api/patches/54158/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190603103429.814-4-pbhagavatula@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190603103429.814-4-pbhagavatula@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190603103429.814-4-pbhagavatula@marvell.com",
    "date": "2019-06-03T10:34:25",
    "name": "[v2,3/6] event/octeontx2: add event eth Rx adapter fastpath ops",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "06b91b386bcdd74ff5f79b7d1c92753c5197160f",
    "submitter": {
        "id": 1183,
        "url": "http://patches.dpdk.org/api/people/1183/?format=api",
        "name": "Pavan Nikhilesh Bhagavatula",
        "email": "pbhagavatula@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190603103429.814-4-pbhagavatula@marvell.com/mbox/",
    "series": [
        {
            "id": 4861,
            "url": "http://patches.dpdk.org/api/series/4861/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4861",
            "date": "2019-06-03T10:34:22",
            "name": "event/octeontx2: add Rx/Tx adapter support",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/4861/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/54158/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/54158/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id BF6621B96E;\n\tMon,  3 Jun 2019 12:34:42 +0200 (CEST)",
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        ],
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        "From": "<pbhagavatula@marvell.com>",
        "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>",
        "CC": "<dev@dpdk.org>, Nithin Dabilpuram <ndabilpuram@marvell.com>",
        "Date": "Mon, 3 Jun 2019 16:04:25 +0530",
        "Message-ID": "<20190603103429.814-4-pbhagavatula@marvell.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20190603103429.814-1-pbhagavatula@marvell.com>",
        "References": "<20190603103429.814-1-pbhagavatula@marvell.com>",
        "MIME-Version": "1.0",
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        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-03_08:, , signatures=0",
        "Subject": "[dpdk-dev] [PATCH v2 3/6] event/octeontx2: add event eth Rx adapter\n\tfastpath ops",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nAdd support for event eth Rx adapter fastpath operations.\n\nSigned-off-by: Jerin Jacob <jerinj@marvell.com>\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n drivers/event/octeontx2/otx2_evdev.c       | 310 ++++++++++++++++++++-\n drivers/event/octeontx2/otx2_evdev.h       | 108 +++++--\n drivers/event/octeontx2/otx2_evdev_adptr.c |  23 ++\n drivers/event/octeontx2/otx2_worker.c      | 178 ++++++++----\n drivers/event/octeontx2/otx2_worker.h      |  37 ++-\n drivers/event/octeontx2/otx2_worker_dual.c | 220 ++++++++++-----\n drivers/event/octeontx2/otx2_worker_dual.h |  20 +-\n 7 files changed, 743 insertions(+), 153 deletions(-)",
    "diff": "diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c\nindex 2ddc007f3..2352895bb 100644\n--- a/drivers/event/octeontx2/otx2_evdev.c\n+++ b/drivers/event/octeontx2/otx2_evdev.c\n@@ -43,17 +43,199 @@ void\n sso_fastpath_fns_set(struct rte_eventdev *event_dev)\n {\n \tstruct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);\n+\t/* Single WS modes */\n+\tconst event_dequeue_t ssogws_deq[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t\t[f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_ ##name,\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n+\t};\n+\n+\tconst event_dequeue_burst_t ssogws_deq_burst[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t\t[f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_burst_ ##name,\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n+\t};\n+\n+\tconst event_dequeue_t ssogws_deq_timeout[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t\t[f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_timeout_ ##name,\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n+\t};\n+\n+\tconst event_dequeue_burst_t\n+\t\tssogws_deq_timeout_burst[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t\t[f5][f4][f3][f2][f1][f0] =\t\t\t\t\\\n+\t\t\totx2_ssogws_deq_timeout_burst_ ##name,\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n+\t};\n+\n+\tconst event_dequeue_t ssogws_deq_seg[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t\t[f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_seg_ ##name,\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n+\t};\n+\n+\tconst event_dequeue_burst_t ssogws_deq_seg_burst[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t\t[f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_seg_burst_ ##name,\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n+\t};\n+\n+\tconst event_dequeue_t ssogws_deq_seg_timeout[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t\t[f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_seg_timeout_ ##name,\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n+\t};\n+\n+\tconst event_dequeue_burst_t\n+\t\tssogws_deq_seg_timeout_burst[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t\t[f5][f4][f3][f2][f1][f0] =\t\t\t\t\\\n+\t\t\t\totx2_ssogws_deq_seg_timeout_burst_ ##name,\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n+\t};\n+\n+\n+\t/* Dual WS modes */\n+\tconst event_dequeue_t ssogws_dual_deq[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t\t[f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_ ##name,\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n+\t};\n+\n+\tconst event_dequeue_burst_t ssogws_dual_deq_burst[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t\t[f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_burst_ ##name,\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n+\t};\n+\n+\tconst event_dequeue_t ssogws_dual_deq_timeout[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t\t[f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_timeout_ ##name,\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n+\t};\n+\n+\tconst event_dequeue_burst_t\n+\t\tssogws_dual_deq_timeout_burst[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t[f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_timeout_burst_ ##name,\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n+\t};\n+\n+\tconst event_dequeue_t ssogws_dual_deq_seg[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t\t[f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_seg_ ##name,\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n+\t};\n+\n+\tconst event_dequeue_burst_t\n+\t\tssogws_dual_deq_seg_burst[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t\t[f5][f4][f3][f2][f1][f0] =\t\t\t\t\\\n+\t\t\t\totx2_ssogws_dual_deq_seg_burst_ ##name,\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n+\t};\n+\n+\tconst event_dequeue_t ssogws_dual_deq_seg_timeout[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t\t[f5][f4][f3][f2][f1][f0] =\t\t\t\t\\\n+\t\t\t\totx2_ssogws_dual_deq_seg_timeout_ ##name,\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n+\t};\n+\n+\tconst event_dequeue_burst_t\n+\t\tssogws_dual_deq_seg_timeout_burst[2][2][2][2][2][2] = {\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+\t[f5][f4][f3][f2][f1][f0] =\t\t\t\t\t\\\n+\t\totx2_ssogws_dual_deq_seg_timeout_burst_ ##name,\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n+\t};\n \n \tevent_dev->enqueue\t\t\t= otx2_ssogws_enq;\n \tevent_dev->enqueue_burst\t\t= otx2_ssogws_enq_burst;\n \tevent_dev->enqueue_new_burst\t\t= otx2_ssogws_enq_new_burst;\n \tevent_dev->enqueue_forward_burst\t= otx2_ssogws_enq_fwd_burst;\n-\n-\tevent_dev->dequeue\t\t\t= otx2_ssogws_deq;\n-\tevent_dev->dequeue_burst\t\t= otx2_ssogws_deq_burst;\n-\tif (dev->is_timeout_deq) {\n-\t\tevent_dev->dequeue\t\t= otx2_ssogws_deq_timeout;\n-\t\tevent_dev->dequeue_burst\t= otx2_ssogws_deq_timeout_burst;\n+\tif (dev->rx_offloads & NIX_RX_MULTI_SEG_F) {\n+\t\tevent_dev->dequeue\t\t= ssogws_deq_seg\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\tevent_dev->dequeue_burst\t= ssogws_deq_seg_burst\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\tif (dev->is_timeout_deq) {\n+\t\t\tevent_dev->dequeue\t= ssogws_deq_seg_timeout\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\t\tevent_dev->dequeue_burst\t=\n+\t\t\t\tssogws_deq_seg_timeout_burst\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\t}\n+\t} else {\n+\t\tevent_dev->dequeue\t\t\t= ssogws_deq\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\tevent_dev->dequeue_burst\t\t= ssogws_deq_burst\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\tif (dev->is_timeout_deq) {\n+\t\t\tevent_dev->dequeue\t\t= ssogws_deq_timeout\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\t\tevent_dev->dequeue_burst\t=\n+\t\t\t\tssogws_deq_timeout_burst\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n+\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\t}\n \t}\n \n \tif (dev->dual_ws) {\n@@ -63,12 +245,112 @@ sso_fastpath_fns_set(struct rte_eventdev *event_dev)\n \t\t\t\t\totx2_ssogws_dual_enq_new_burst;\n \t\tevent_dev->enqueue_forward_burst =\n \t\t\t\t\totx2_ssogws_dual_enq_fwd_burst;\n-\t\tevent_dev->dequeue\t\t= otx2_ssogws_dual_deq;\n-\t\tevent_dev->dequeue_burst\t= otx2_ssogws_dual_deq_burst;\n-\t\tif (dev->is_timeout_deq) {\n-\t\t\tevent_dev->dequeue\t= otx2_ssogws_dual_deq_timeout;\n-\t\t\tevent_dev->dequeue_burst =\n-\t\t\t\t\totx2_ssogws_dual_deq_timeout_burst;\n+\n+\t\tif (dev->rx_offloads & NIX_RX_MULTI_SEG_F) {\n+\t\t\tevent_dev->dequeue\t= ssogws_dual_deq_seg\n+\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_TSTAMP_F)]\n+\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_MARK_UPDATE_F)]\n+\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_VLAN_STRIP_F)]\n+\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_CHECKSUM_F)]\n+\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n+\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\t\tevent_dev->dequeue_burst = ssogws_dual_deq_seg_burst\n+\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]\n+\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_MARK_UPDATE_F)]\n+\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_VLAN_STRIP_F)]\n+\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_CHECKSUM_F)]\n+\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n+\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\t\tif (dev->is_timeout_deq) {\n+\t\t\t\tevent_dev->dequeue\t=\n+\t\t\t\t\tssogws_dual_deq_seg_timeout\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_TSTAMP_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_MARK_UPDATE_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_VLAN_STRIP_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_CHECKSUM_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\t\tNIX_RX_OFFLOAD_PTYPE_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\t\tNIX_RX_OFFLOAD_RSS_F)];\n+\t\t\t\tevent_dev->dequeue_burst =\n+\t\t\t\t\tssogws_dual_deq_seg_timeout_burst\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_TSTAMP_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_MARK_UPDATE_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_VLAN_STRIP_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_CHECKSUM_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\t\tNIX_RX_OFFLOAD_PTYPE_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\t\tNIX_RX_OFFLOAD_RSS_F)];\n+\t\t\t}\n+\t\t} else {\n+\t\t\tevent_dev->dequeue\t\t= ssogws_dual_deq\n+\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_TSTAMP_F)]\n+\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_MARK_UPDATE_F)]\n+\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_VLAN_STRIP_F)]\n+\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_CHECKSUM_F)]\n+\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n+\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\t\tevent_dev->dequeue_burst\t= ssogws_dual_deq_burst\n+\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_TSTAMP_F)]\n+\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_MARK_UPDATE_F)]\n+\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_VLAN_STRIP_F)]\n+\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_CHECKSUM_F)]\n+\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]\n+\t\t\t\t[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];\n+\t\t\tif (dev->is_timeout_deq) {\n+\t\t\t\tevent_dev->dequeue\t=\n+\t\t\t\t\tssogws_dual_deq_timeout\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_TSTAMP_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_MARK_UPDATE_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_VLAN_STRIP_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_CHECKSUM_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\t\tNIX_RX_OFFLOAD_PTYPE_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\t\tNIX_RX_OFFLOAD_RSS_F)];\n+\t\t\t\tevent_dev->dequeue_burst =\n+\t\t\t\t\tssogws_dual_deq_timeout_burst\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_TSTAMP_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_MARK_UPDATE_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_VLAN_STRIP_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\tNIX_RX_OFFLOAD_CHECKSUM_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\t\tNIX_RX_OFFLOAD_PTYPE_F)]\n+\t\t\t\t\t[!!(dev->rx_offloads &\n+\t\t\t\t\t\t\tNIX_RX_OFFLOAD_RSS_F)];\n+\t\t\t}\n \t\t}\n \t}\n \trte_mb();\n@@ -387,6 +669,7 @@ sso_configure_dual_ports(const struct rte_eventdev *event_dev)\n \t\tsso_set_port_ops((struct otx2_ssogws *)&ws->ws_state[1], base);\n \t\tvws++;\n \n+\t\tws->lookup_mem = otx2_nix_fastpath_lookup_mem_get();\n \t\tevent_dev->data->ports[i] = ws;\n \t}\n \n@@ -448,6 +731,7 @@ sso_configure_ports(const struct rte_eventdev *event_dev)\n \t\tbase = dev->bar2 + (RVU_BLOCK_ADDR_SSOW << 20 | i << 12);\n \t\tsso_set_port_ops(ws, base);\n \n+\t\tws->lookup_mem = otx2_nix_fastpath_lookup_mem_get();\n \t\tevent_dev->data->ports[i] = ws;\n \t}\n \n@@ -1121,6 +1405,8 @@ static struct rte_eventdev_ops otx2_sso_ops = {\n \t.eth_rx_adapter_caps_get  = otx2_sso_rx_adapter_caps_get,\n \t.eth_rx_adapter_queue_add = otx2_sso_rx_adapter_queue_add,\n \t.eth_rx_adapter_queue_del = otx2_sso_rx_adapter_queue_del,\n+\t.eth_rx_adapter_start = otx2_sso_rx_adapter_start,\n+\t.eth_rx_adapter_stop = otx2_sso_rx_adapter_stop,\n \n \t.timer_adapter_caps_get = otx2_tim_caps_get,\n \ndiff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h\nindex 223b811d4..8c8ba8bc3 100644\n--- a/drivers/event/octeontx2/otx2_evdev.h\n+++ b/drivers/event/octeontx2/otx2_evdev.h\n@@ -117,6 +117,7 @@ struct otx2_sso_evdev {\n \tuint64_t nb_xaq_cfg;\n \trte_iova_t fc_iova;\n \tstruct rte_mempool *xaq_pool;\n+\tuint64_t rx_offloads;\n \tuint16_t rx_adptr_pool_cnt;\n \tuint32_t adptr_xae_cnt;\n \tuint64_t *rx_adptr_pools;\n@@ -151,6 +152,7 @@ struct otx2_ssogws {\n \t/* Get Work Fastpath data */\n \tOTX2_SSOGWS_OPS;\n \tuint8_t swtag_req;\n+\tvoid *lookup_mem;\n \tuint8_t port;\n \t/* Add Work Fastpath data */\n \tuint64_t xaq_lmt __rte_cache_aligned;\n@@ -167,6 +169,7 @@ struct otx2_ssogws_dual {\n \tstruct otx2_ssogws_state ws_state[2]; /* Ping and Pong */\n \tuint8_t swtag_req;\n \tuint8_t vws; /* Ping pong bit */\n+\tvoid *lookup_mem;\n \tuint8_t port;\n \t/* Add Work Fastpath data */\n \tuint64_t xaq_lmt __rte_cache_aligned;\n@@ -180,6 +183,28 @@ sso_pmd_priv(const struct rte_eventdev *event_dev)\n \treturn event_dev->data->dev_private;\n }\n \n+static const union mbuf_initializer mbuf_init = {\n+\t.fields = {\n+\t\t.data_off = RTE_PKTMBUF_HEADROOM,\n+\t\t.refcnt = 1,\n+\t\t.nb_segs = 1,\n+\t\t.port = 0\n+\t}\n+};\n+\n+static __rte_always_inline uint64_t\n+otx2_wqe_to_mbuf(uint64_t get_work1, const uint64_t mbuf, uint16_t port_id,\n+\t\t const uint32_t flags, const void * const lookup_mem)\n+{\n+\tstruct nix_wqe_hdr_s *wqe = (struct nix_wqe_hdr_s *)get_work1;\n+\n+\totx2_nix_cqe_to_mbuf((struct nix_cqe_hdr_s *)wqe,\n+\t\t\t     (struct rte_mbuf *)mbuf, lookup_mem,\n+\t\t\t     mbuf_init.value | (uint64_t)port_id << 48, flags);\n+\n+\treturn mbuf;\n+}\n+\n static inline int\n parse_kvargs_flag(const char *key, const char *value, void *opaque)\n {\n@@ -198,6 +223,9 @@ parse_kvargs_value(const char *key, const char *value, void *opaque)\n \treturn 0;\n }\n \n+#define SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\tNIX_RX_FASTPATH_MODES\n+#define SSO_TX_ADPTR_ENQ_FASTPATH_FUNC\tNIX_TX_FASTPATH_MODES\n+\n /* Single WS API's */\n uint16_t otx2_ssogws_enq(void *port, const struct rte_event *ev);\n uint16_t otx2_ssogws_enq_burst(void *port, const struct rte_event ev[],\n@@ -207,15 +235,6 @@ uint16_t otx2_ssogws_enq_new_burst(void *port, const struct rte_event ev[],\n uint16_t otx2_ssogws_enq_fwd_burst(void *port, const struct rte_event ev[],\n \t\t\t\t   uint16_t nb_events);\n \n-uint16_t otx2_ssogws_deq(void *port, struct rte_event *ev,\n-\t\t\t uint64_t timeout_ticks);\n-uint16_t otx2_ssogws_deq_burst(void *port, struct rte_event ev[],\n-\t\t\t       uint16_t nb_events, uint64_t timeout_ticks);\n-uint16_t otx2_ssogws_deq_timeout(void *port, struct rte_event *ev,\n-\t\t\t\t uint64_t timeout_ticks);\n-uint16_t otx2_ssogws_deq_timeout_burst(void *port, struct rte_event ev[],\n-\t\t\t\t       uint16_t nb_events,\n-\t\t\t\t       uint64_t timeout_ticks);\n /* Dual WS API's */\n uint16_t otx2_ssogws_dual_enq(void *port, const struct rte_event *ev);\n uint16_t otx2_ssogws_dual_enq_burst(void *port, const struct rte_event ev[],\n@@ -225,15 +244,63 @@ uint16_t otx2_ssogws_dual_enq_new_burst(void *port, const struct rte_event ev[],\n uint16_t otx2_ssogws_dual_enq_fwd_burst(void *port, const struct rte_event ev[],\n \t\t\t\t\tuint16_t nb_events);\n \n-uint16_t otx2_ssogws_dual_deq(void *port, struct rte_event *ev,\n-\t\t\t      uint64_t timeout_ticks);\n-uint16_t otx2_ssogws_dual_deq_burst(void *port, struct rte_event ev[],\n-\t\t\t\t    uint16_t nb_events, uint64_t timeout_ticks);\n-uint16_t otx2_ssogws_dual_deq_timeout(void *port, struct rte_event *ev,\n-\t\t\t\t      uint64_t timeout_ticks);\n-uint16_t otx2_ssogws_dual_deq_timeout_burst(void *port, struct rte_event ev[],\n-\t\t\t\t\t    uint16_t nb_events,\n-\t\t\t\t\t    uint64_t timeout_ticks);\n+/* Auto generated API's */\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t       \\\n+uint16_t otx2_ssogws_deq_ ##name(void *port, struct rte_event *ev,\t       \\\n+\t\t\t\t uint64_t timeout_ticks);\t\t       \\\n+uint16_t otx2_ssogws_deq_burst_ ##name(void *port, struct rte_event ev[],      \\\n+\t\t\t\t       uint16_t nb_events,\t\t       \\\n+\t\t\t\t       uint64_t timeout_ticks);\t\t       \\\n+uint16_t otx2_ssogws_deq_timeout_ ##name(void *port,\t\t\t       \\\n+\t\t\t\t\t struct rte_event *ev,\t\t       \\\n+\t\t\t\t\t uint64_t timeout_ticks);\t       \\\n+uint16_t otx2_ssogws_deq_timeout_burst_ ##name(void *port,\t\t       \\\n+\t\t\t\t\t       struct rte_event ev[],\t       \\\n+\t\t\t\t\t       uint16_t nb_events,\t       \\\n+\t\t\t\t\t       uint64_t timeout_ticks);\t       \\\n+uint16_t otx2_ssogws_deq_seg_ ##name(void *port, struct rte_event *ev,\t       \\\n+\t\t\t\t     uint64_t timeout_ticks);\t\t       \\\n+uint16_t otx2_ssogws_deq_seg_burst_ ##name(void *port,\t\t\t       \\\n+\t\t\t\t\t   struct rte_event ev[],\t       \\\n+\t\t\t\t\t   uint16_t nb_events,\t\t       \\\n+\t\t\t\t\t   uint64_t timeout_ticks);\t       \\\n+uint16_t otx2_ssogws_deq_seg_timeout_ ##name(void *port,\t\t       \\\n+\t\t\t\t\t     struct rte_event *ev,\t       \\\n+\t\t\t\t\t     uint64_t timeout_ticks);\t       \\\n+uint16_t otx2_ssogws_deq_seg_timeout_burst_ ##name(void *port,\t\t       \\\n+\t\t\t\t\t\t   struct rte_event ev[],      \\\n+\t\t\t\t\t\t   uint16_t nb_events,\t       \\\n+\t\t\t\t\t\t   uint64_t timeout_ticks);    \\\n+\t\t\t\t\t\t\t\t\t       \\\n+uint16_t otx2_ssogws_dual_deq_ ##name(void *port, struct rte_event *ev,\t       \\\n+\t\t\t\t      uint64_t timeout_ticks);\t\t       \\\n+uint16_t otx2_ssogws_dual_deq_burst_ ##name(void *port,\t\t\t       \\\n+\t\t\t\t\t    struct rte_event ev[],\t       \\\n+\t\t\t\t\t    uint16_t nb_events,\t\t       \\\n+\t\t\t\t\t    uint64_t timeout_ticks);\t       \\\n+uint16_t otx2_ssogws_dual_deq_timeout_ ##name(void *port,\t\t       \\\n+\t\t\t\t\t      struct rte_event *ev,\t       \\\n+\t\t\t\t\t      uint64_t timeout_ticks);\t       \\\n+uint16_t otx2_ssogws_dual_deq_timeout_burst_ ##name(void *port,\t\t       \\\n+\t\t\t\t\t\t    struct rte_event ev[],     \\\n+\t\t\t\t\t\t    uint16_t nb_events,\t       \\\n+\t\t\t\t\t\t    uint64_t timeout_ticks);   \\\n+uint16_t otx2_ssogws_dual_deq_seg_ ##name(void *port, struct rte_event *ev,    \\\n+\t\t\t\t\t  uint64_t timeout_ticks);\t       \\\n+uint16_t otx2_ssogws_dual_deq_seg_burst_ ##name(void *port,\t\t       \\\n+\t\t\t\t\t\tstruct rte_event ev[],\t       \\\n+\t\t\t\t\t\tuint16_t nb_events,\t       \\\n+\t\t\t\t\t\tuint64_t timeout_ticks);       \\\n+uint16_t otx2_ssogws_dual_deq_seg_timeout_ ##name(void *port,\t\t       \\\n+\t\t\t\t\t\t  struct rte_event *ev,\t       \\\n+\t\t\t\t\t\t  uint64_t timeout_ticks);     \\\n+uint16_t otx2_ssogws_dual_deq_seg_timeout_burst_ ##name(void *port,\t       \\\n+\t\t\t\t\t\t\tstruct rte_event ev[], \\\n+\t\t\t\t\t\t\tuint16_t nb_events,    \\\n+\t\t\t\t\t\t       uint64_t timeout_ticks);\\\n+\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n \n void sso_updt_xae_cnt(struct otx2_sso_evdev *dev, void *data,\n \t\t      uint32_t event_type);\n@@ -250,7 +317,10 @@ int otx2_sso_rx_adapter_queue_add(const struct rte_eventdev *event_dev,\n int otx2_sso_rx_adapter_queue_del(const struct rte_eventdev *event_dev,\n \t\t\t\t  const struct rte_eth_dev *eth_dev,\n \t\t\t\t  int32_t rx_queue_id);\n-\n+int otx2_sso_rx_adapter_start(const struct rte_eventdev *event_dev,\n+\t\t\t      const struct rte_eth_dev *eth_dev);\n+int otx2_sso_rx_adapter_stop(const struct rte_eventdev *event_dev,\n+\t\t\t     const struct rte_eth_dev *eth_dev);\n /* Clean up API's */\n typedef void (*otx2_handle_event_t)(void *arg, struct rte_event ev);\n void ssogws_flush_events(struct otx2_ssogws *ws, uint8_t queue_id,\ndiff --git a/drivers/event/octeontx2/otx2_evdev_adptr.c b/drivers/event/octeontx2/otx2_evdev_adptr.c\nindex 762b0a04a..0656d1081 100644\n--- a/drivers/event/octeontx2/otx2_evdev_adptr.c\n+++ b/drivers/event/octeontx2/otx2_evdev_adptr.c\n@@ -274,6 +274,9 @@ otx2_sso_rx_adapter_queue_add(const struct rte_eventdev *event_dev,\n \t\treturn rc;\n \t}\n \n+\tdev->rx_offloads |= otx2_eth_dev->rx_offload_flags;\n+\tsso_fastpath_fns_set((struct rte_eventdev *)(uintptr_t)event_dev);\n+\n \treturn 0;\n }\n \n@@ -303,3 +306,23 @@ otx2_sso_rx_adapter_queue_del(const struct rte_eventdev *event_dev,\n \n \treturn rc;\n }\n+\n+int\n+otx2_sso_rx_adapter_start(const struct rte_eventdev *event_dev,\n+\t\t\t  const struct rte_eth_dev *eth_dev)\n+{\n+\tRTE_SET_USED(event_dev);\n+\tRTE_SET_USED(eth_dev);\n+\n+\treturn 0;\n+}\n+\n+int\n+otx2_sso_rx_adapter_stop(const struct rte_eventdev *event_dev,\n+\t\t\t const struct rte_eth_dev *eth_dev)\n+{\n+\tRTE_SET_USED(event_dev);\n+\tRTE_SET_USED(eth_dev);\n+\n+\treturn 0;\n+}\ndiff --git a/drivers/event/octeontx2/otx2_worker.c b/drivers/event/octeontx2/otx2_worker.c\nindex 7a6d4cad2..ea2d0b5a4 100644\n--- a/drivers/event/octeontx2/otx2_worker.c\n+++ b/drivers/event/octeontx2/otx2_worker.c\n@@ -81,60 +81,132 @@ otx2_ssogws_release_event(struct otx2_ssogws *ws)\n \totx2_ssogws_swtag_flush(ws);\n }\n \n-uint16_t __hot\n-otx2_ssogws_deq(void *port, struct rte_event *ev, uint64_t timeout_ticks)\n-{\n-\tstruct otx2_ssogws *ws = port;\n-\n-\tRTE_SET_USED(timeout_ticks);\n-\n-\tif (ws->swtag_req) {\n-\t\tws->swtag_req = 0;\n-\t\totx2_ssogws_swtag_wait(ws);\n-\t\treturn 1;\n-\t}\n-\n-\treturn otx2_ssogws_get_work(ws, ev);\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+uint16_t __hot\t\t\t\t\t\t\t\t\\\n+otx2_ssogws_deq_ ##name(void *port, struct rte_event *ev,\t\t\\\n+\t\t\tuint64_t timeout_ticks)\t\t\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tstruct otx2_ssogws *ws = port;\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tRTE_SET_USED(timeout_ticks);\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tif (ws->swtag_req) {\t\t\t\t\t\t\\\n+\t\tws->swtag_req = 0;\t\t\t\t\t\\\n+\t\totx2_ssogws_swtag_wait(ws);\t\t\t\t\\\n+\t\treturn 1;\t\t\t\t\t\t\\\n+\t}\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn otx2_ssogws_get_work(ws, ev, flags, ws->lookup_mem);\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+uint16_t __hot\t\t\t\t\t\t\t\t\\\n+otx2_ssogws_deq_burst_ ##name(void *port, struct rte_event ev[],\t\\\n+\t\t\t      uint16_t nb_events,\t\t\t\\\n+\t\t\t      uint64_t timeout_ticks)\t\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tRTE_SET_USED(nb_events);\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn otx2_ssogws_deq_ ##name(port, ev, timeout_ticks);\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+uint16_t __hot\t\t\t\t\t\t\t\t\\\n+otx2_ssogws_deq_timeout_ ##name(void *port, struct rte_event *ev,\t\\\n+\t\t\t\tuint64_t timeout_ticks)\t\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tstruct otx2_ssogws *ws = port;\t\t\t\t\t\\\n+\tuint16_t ret = 1;\t\t\t\t\t\t\\\n+\tuint64_t iter;\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tif (ws->swtag_req) {\t\t\t\t\t\t\\\n+\t\tws->swtag_req = 0;\t\t\t\t\t\\\n+\t\totx2_ssogws_swtag_wait(ws);\t\t\t\t\\\n+\t\treturn ret;\t\t\t\t\t\t\\\n+\t}\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tret = otx2_ssogws_get_work(ws, ev, flags, ws->lookup_mem);\t\\\n+\tfor (iter = 1; iter < timeout_ticks && (ret == 0); iter++)\t\\\n+\t\tret = otx2_ssogws_get_work(ws, ev, flags,\t\t\\\n+\t\t\t\t\t   ws->lookup_mem);\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn ret;\t\t\t\t\t\t\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+uint16_t __hot\t\t\t\t\t\t\t\t\\\n+otx2_ssogws_deq_timeout_burst_ ##name(void *port, struct rte_event ev[],\\\n+\t\t\t\t      uint16_t nb_events,\t\t\\\n+\t\t\t\t      uint64_t timeout_ticks)\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tRTE_SET_USED(nb_events);\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn otx2_ssogws_deq_timeout_ ##name(port, ev, timeout_ticks);\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+uint16_t __hot\t\t\t\t\t\t\t\t\\\n+otx2_ssogws_deq_seg_ ##name(void *port, struct rte_event *ev,\t\t\\\n+\t\t\t    uint64_t timeout_ticks)\t\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tstruct otx2_ssogws *ws = port;\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tRTE_SET_USED(timeout_ticks);\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tif (ws->swtag_req) {\t\t\t\t\t\t\\\n+\t\tws->swtag_req = 0;\t\t\t\t\t\\\n+\t\totx2_ssogws_swtag_wait(ws);\t\t\t\t\\\n+\t\treturn 1;\t\t\t\t\t\t\\\n+\t}\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn otx2_ssogws_get_work(ws, ev, flags | NIX_RX_MULTI_SEG_F,\t\\\n+\t\t\t\t    ws->lookup_mem);\t\t\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+uint16_t __hot\t\t\t\t\t\t\t\t\\\n+otx2_ssogws_deq_seg_burst_ ##name(void *port, struct rte_event ev[],\t\\\n+\t\t\t\t  uint16_t nb_events,\t\t\t\\\n+\t\t\t\t  uint64_t timeout_ticks)\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tRTE_SET_USED(nb_events);\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn otx2_ssogws_deq_seg_ ##name(port, ev, timeout_ticks);\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+uint16_t __hot\t\t\t\t\t\t\t\t\\\n+otx2_ssogws_deq_seg_timeout_ ##name(void *port, struct rte_event *ev,\t\\\n+\t\t\t\t    uint64_t timeout_ticks)\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tstruct otx2_ssogws *ws = port;\t\t\t\t\t\\\n+\tuint16_t ret = 1;\t\t\t\t\t\t\\\n+\tuint64_t iter;\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tif (ws->swtag_req) {\t\t\t\t\t\t\\\n+\t\tws->swtag_req = 0;\t\t\t\t\t\\\n+\t\totx2_ssogws_swtag_wait(ws);\t\t\t\t\\\n+\t\treturn ret;\t\t\t\t\t\t\\\n+\t}\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tret = otx2_ssogws_get_work(ws, ev, flags | NIX_RX_MULTI_SEG_F,\t\\\n+\t\t\t\t   ws->lookup_mem);\t\t\t\\\n+\tfor (iter = 1; iter < timeout_ticks && (ret == 0); iter++)\t\\\n+\t\tret = otx2_ssogws_get_work(ws, ev,\t\t\t\\\n+\t\t\t\t\t   flags | NIX_RX_MULTI_SEG_F,\t\\\n+\t\t\t\t\t   ws->lookup_mem);\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn ret;\t\t\t\t\t\t\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+uint16_t __hot\t\t\t\t\t\t\t\t\\\n+otx2_ssogws_deq_seg_timeout_burst_ ##name(void *port,\t\t\t\\\n+\t\t\t\t\t  struct rte_event ev[],\t\\\n+\t\t\t\t\t  uint16_t nb_events,\t\t\\\n+\t\t\t\t\t  uint64_t timeout_ticks)\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tRTE_SET_USED(nb_events);\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn otx2_ssogws_deq_seg_timeout_ ##name(port, ev,\t\t\\\n+\t\t\t\t\t\t   timeout_ticks);\t\\\n }\n \n-uint16_t __hot\n-otx2_ssogws_deq_burst(void *port, struct rte_event ev[], uint16_t nb_events,\n-\t\t      uint64_t timeout_ticks)\n-{\n-\tRTE_SET_USED(nb_events);\n-\n-\treturn otx2_ssogws_deq(port, ev, timeout_ticks);\n-}\n-\n-uint16_t __hot\n-otx2_ssogws_deq_timeout(void *port, struct rte_event *ev,\n-\t\t\tuint64_t timeout_ticks)\n-{\n-\tstruct otx2_ssogws *ws = port;\n-\tuint16_t ret = 1;\n-\tuint64_t iter;\n-\n-\tif (ws->swtag_req) {\n-\t\tws->swtag_req = 0;\n-\t\totx2_ssogws_swtag_wait(ws);\n-\t\treturn ret;\n-\t}\n-\n-\tret = otx2_ssogws_get_work(ws, ev);\n-\tfor (iter = 1; iter < timeout_ticks && (ret == 0); iter++)\n-\t\tret = otx2_ssogws_get_work(ws, ev);\n-\n-\treturn ret;\n-}\n-\n-uint16_t __hot\n-otx2_ssogws_deq_timeout_burst(void *port, struct rte_event ev[],\n-\t\t\t      uint16_t nb_events, uint64_t timeout_ticks)\n-{\n-\tRTE_SET_USED(nb_events);\n-\n-\treturn otx2_ssogws_deq_timeout(port, ev, timeout_ticks);\n-}\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\n \n uint16_t __hot\n otx2_ssogws_enq(void *port, const struct rte_event *ev)\n@@ -221,7 +293,7 @@ ssogws_flush_events(struct otx2_ssogws *ws, uint8_t queue_id, uintptr_t base,\n \n \twhile (aq_cnt || cq_ds_cnt || ds_cnt) {\n \t\totx2_write64(val, ws->getwrk_op);\n-\t\totx2_ssogws_get_work_empty(ws, &ev);\n+\t\totx2_ssogws_get_work_empty(ws, &ev, 0);\n \t\tif (fn != NULL && ev.u64 != 0)\n \t\t\tfn(arg, ev);\n \t\tif (ev.sched_type != SSO_TT_EMPTY)\ndiff --git a/drivers/event/octeontx2/otx2_worker.h b/drivers/event/octeontx2/otx2_worker.h\nindex e8705e53c..2146587aa 100644\n--- a/drivers/event/octeontx2/otx2_worker.h\n+++ b/drivers/event/octeontx2/otx2_worker.h\n@@ -14,15 +14,19 @@\n /* SSO Operations */\n \n static __rte_always_inline uint16_t\n-otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev)\n+otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev,\n+\t\t     const uint32_t flags, const void * const lookup_mem)\n {\n \tuint64_t get_work0;\n \tuint64_t get_work1;\n+\tuint64_t mbuf;\n \n \totx2_write64(BIT_ULL(16) | /* wait for work. */\n \t\t     1, /* Use Mask set 0. */\n \t\t     ws->getwrk_op);\n \n+\tif (flags & NIX_RX_OFFLOAD_PTYPE_F)\n+\t\trte_prefetch_non_temporal(lookup_mem);\n #ifdef RTE_ARCH_ARM64\n \tasm volatile(\n \t\t\t\"\t\tldr %[tag], [%[tag_loc]]\t\\n\"\n@@ -34,8 +38,11 @@ otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev)\n \t\t\t\"\t\tldr %[wqp], [%[wqp_loc]]\t\\n\"\n \t\t\t\"\t\ttbnz %[tag], 63, rty%=\t\t\\n\"\n \t\t\t\"done%=:\tprfm pldl1strm, [%[wqp]]\t\\n\"\n+\t\t\t\"\t\tsub %[mbuf], %[wqp], #0x80\t\\n\"\n+\t\t\t\"\t\tprfm pldl1strm, [%[mbuf]]\t\\n\"\n \t\t\t\"\t\tdmb ld\t\t\t\t\\n\"\n-\t\t\t: [tag] \"=&r\" (get_work0), [wqp] \"=&r\" (get_work1)\n+\t\t\t: [tag] \"=&r\" (get_work0), [wqp] \"=&r\" (get_work1),\n+\t\t\t  [mbuf] \"=&r\" (mbuf)\n \t\t\t: [tag_loc] \"r\" (ws->tag_op),\n \t\t\t  [wqp_loc] \"r\" (ws->wqp_op)\n \t\t\t);\n@@ -46,6 +53,8 @@ otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev)\n \n \tget_work1 = otx2_read64(ws->wqp_op);\n \trte_prefetch_non_temporal((const void *)get_work1);\n+\tmbuf = (uint64_t)((char *)get_work1 - sizeof(struct rte_mbuf));\n+\trte_prefetch_non_temporal((const void *)mbuf);\n #endif\n \n \tws->cur_tt = (get_work0 >> 32) & 0x3;\n@@ -55,6 +64,13 @@ otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev)\n \t\t(get_work0 & (0x3FFull << 36)) << 4 |\n \t\t(get_work0 & 0xffffffff);\n \n+\tif (((get_work0 >> 38) & 0x3) != SSO_TT_EMPTY &&\n+\t    ((get_work0 >> 28) & 0xF) == RTE_EVENT_TYPE_ETHDEV) {\n+\t\tget_work1 = otx2_wqe_to_mbuf(get_work1, mbuf,\n+\t\t\t\t\t     (get_work0 >> 20) & 0xFF, flags,\n+\t\t\t\t\t     lookup_mem);\n+\t}\n+\n \tev->event = get_work0;\n \tev->u64 = get_work1;\n \n@@ -63,10 +79,12 @@ otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev)\n \n /* Used in cleaning up workslot. */\n static __rte_always_inline uint16_t\n-otx2_ssogws_get_work_empty(struct otx2_ssogws *ws, struct rte_event *ev)\n+otx2_ssogws_get_work_empty(struct otx2_ssogws *ws, struct rte_event *ev,\n+\t\t\t   const uint32_t flags)\n {\n \tuint64_t get_work0;\n \tuint64_t get_work1;\n+\tuint64_t mbuf;\n \n #ifdef RTE_ARCH_ARM64\n \tasm volatile(\n@@ -79,8 +97,11 @@ otx2_ssogws_get_work_empty(struct otx2_ssogws *ws, struct rte_event *ev)\n \t\t\t\"\t\tldr %[wqp], [%[wqp_loc]]\t\\n\"\n \t\t\t\"\t\ttbnz %[tag], 63, rty%=\t\t\\n\"\n \t\t\t\"done%=:\tprfm pldl1strm, [%[wqp]]\t\\n\"\n+\t\t\t\"\t\tsub %[mbuf], %[wqp], #0x80\t\\n\"\n+\t\t\t\"\t\tprfm pldl1strm, [%[mbuf]]\t\\n\"\n \t\t\t\"\t\tdmb ld\t\t\t\t\\n\"\n-\t\t\t: [tag] \"=&r\" (get_work0), [wqp] \"=&r\" (get_work1)\n+\t\t\t: [tag] \"=&r\" (get_work0), [wqp] \"=&r\" (get_work1),\n+\t\t\t  [mbuf] \"=&r\" (mbuf)\n \t\t\t: [tag_loc] \"r\" (ws->tag_op),\n \t\t\t  [wqp_loc] \"r\" (ws->wqp_op)\n \t\t\t);\n@@ -91,6 +112,8 @@ otx2_ssogws_get_work_empty(struct otx2_ssogws *ws, struct rte_event *ev)\n \n \tget_work1 = otx2_read64(ws->wqp_op);\n \trte_prefetch_non_temporal((const void *)get_work1);\n+\tmbuf = (uint64_t)((char *)get_work1 - sizeof(struct rte_mbuf));\n+\trte_prefetch_non_temporal((const void *)mbuf);\n #endif\n \n \tws->cur_tt = (get_work0 >> 32) & 0x3;\n@@ -100,6 +123,12 @@ otx2_ssogws_get_work_empty(struct otx2_ssogws *ws, struct rte_event *ev)\n \t\t(get_work0 & (0x3FFull << 36)) << 4 |\n \t\t(get_work0 & 0xffffffff);\n \n+\tif (get_work1 && ((get_work0 >> 28) & 0xF) == RTE_EVENT_TYPE_ETHDEV) {\n+\t\tget_work1 = otx2_wqe_to_mbuf(get_work1, mbuf,\n+\t\t\t\t\t     (get_work0 >> 20) & 0xFF, flags,\n+\t\t\t\t\t     ws->lookup_mem);\n+\t}\n+\n \tev->event = get_work0;\n \tev->u64 = get_work1;\n \ndiff --git a/drivers/event/octeontx2/otx2_worker_dual.c b/drivers/event/octeontx2/otx2_worker_dual.c\nindex 58fd588f6..b5cf9ac12 100644\n--- a/drivers/event/octeontx2/otx2_worker_dual.c\n+++ b/drivers/event/octeontx2/otx2_worker_dual.c\n@@ -140,68 +140,162 @@ otx2_ssogws_dual_enq_fwd_burst(void *port, const struct rte_event ev[],\n \treturn 1;\n }\n \n-uint16_t __hot\n-otx2_ssogws_dual_deq(void *port, struct rte_event *ev, uint64_t timeout_ticks)\n-{\n-\tstruct otx2_ssogws_dual *ws = port;\n-\tuint8_t gw;\n-\n-\tRTE_SET_USED(timeout_ticks);\n-\tif (ws->swtag_req) {\n-\t\totx2_ssogws_swtag_wait((struct otx2_ssogws *)\n-\t\t\t\t       &ws->ws_state[!ws->vws]);\n-\t\tws->swtag_req = 0;\n-\t\treturn 1;\n-\t}\n-\n-\tgw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws],\n-\t\t\t\t       &ws->ws_state[!ws->vws], ev);\n-\tws->vws = !ws->vws;\n-\n-\treturn gw;\n-}\n-\n-uint16_t __hot\n-otx2_ssogws_dual_deq_burst(void *port, struct rte_event ev[],\n-\t\t\t   uint16_t nb_events, uint64_t timeout_ticks)\n-{\n-\tRTE_SET_USED(nb_events);\n-\n-\treturn otx2_ssogws_dual_deq(port, ev, timeout_ticks);\n-}\n-\n-uint16_t __hot\n-otx2_ssogws_dual_deq_timeout(void *port, struct rte_event *ev,\n-\t\t\t     uint64_t timeout_ticks)\n-{\n-\tstruct otx2_ssogws_dual *ws = port;\n-\tuint64_t iter;\n-\tuint8_t gw;\n-\n-\tif (ws->swtag_req) {\n-\t\totx2_ssogws_swtag_wait((struct otx2_ssogws *)\n-\t\t\t\t       &ws->ws_state[!ws->vws]);\n-\t\tws->swtag_req = 0;\n-\t\treturn 1;\n-\t}\n-\n-\tgw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws],\n-\t\t\t\t       &ws->ws_state[!ws->vws], ev);\n-\tws->vws = !ws->vws;\n-\tfor (iter = 1; iter < timeout_ticks && (gw == 0); iter++) {\n-\t\tgw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws],\n-\t\t\t\t\t       &ws->ws_state[!ws->vws], ev);\n-\t\tws->vws = !ws->vws;\n-\t}\n-\n-\treturn gw;\n+#define R(name, f5, f4, f3, f2, f1, f0, flags)\t\t\t\t\\\n+uint16_t __hot\t\t\t\t\t\t\t\t\\\n+otx2_ssogws_dual_deq_ ##name(void *port, struct rte_event *ev,\t\t\\\n+\t\t\t     uint64_t timeout_ticks)\t\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tstruct otx2_ssogws_dual *ws = port;\t\t\t\t\\\n+\tuint8_t gw;\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tRTE_SET_USED(timeout_ticks);\t\t\t\t\t\\\n+\tif (ws->swtag_req) {\t\t\t\t\t\t\\\n+\t\totx2_ssogws_swtag_wait((struct otx2_ssogws *)\t\t\\\n+\t\t\t\t       &ws->ws_state[!ws->vws]);\t\\\n+\t\tws->swtag_req = 0;\t\t\t\t\t\\\n+\t\treturn 1;\t\t\t\t\t\t\\\n+\t}\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tgw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws],\t\t\\\n+\t\t\t\t       &ws->ws_state[!ws->vws], ev,\t\\\n+\t\t\t\t       flags, ws->lookup_mem);\t\t\\\n+\tws->vws = !ws->vws;\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn gw;\t\t\t\t\t\t\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+uint16_t __hot\t\t\t\t\t\t\t\t\\\n+otx2_ssogws_dual_deq_burst_ ##name(void *port, struct rte_event ev[],\t\\\n+\t\t\t\t   uint16_t nb_events,\t\t\t\\\n+\t\t\t\t   uint64_t timeout_ticks)\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tRTE_SET_USED(nb_events);\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn otx2_ssogws_dual_deq_ ##name(port, ev, timeout_ticks);\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+uint16_t __hot\t\t\t\t\t\t\t\t\\\n+otx2_ssogws_dual_deq_timeout_ ##name(void *port, struct rte_event *ev,\t\\\n+\t\t\t\t     uint64_t timeout_ticks)\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tstruct otx2_ssogws_dual *ws = port;\t\t\t\t\\\n+\tuint64_t iter;\t\t\t\t\t\t\t\\\n+\tuint8_t gw;\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tif (ws->swtag_req) {\t\t\t\t\t\t\\\n+\t\totx2_ssogws_swtag_wait((struct otx2_ssogws *)\t\t\\\n+\t\t\t\t       &ws->ws_state[!ws->vws]);\t\\\n+\t\tws->swtag_req = 0;\t\t\t\t\t\\\n+\t\treturn 1;\t\t\t\t\t\t\\\n+\t}\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tgw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws],\t\t\\\n+\t\t\t\t       &ws->ws_state[!ws->vws], ev,\t\\\n+\t\t\t\t       flags, ws->lookup_mem);\t\t\\\n+\tws->vws = !ws->vws;\t\t\t\t\t\t\\\n+\tfor (iter = 1; iter < timeout_ticks && (gw == 0); iter++) {\t\\\n+\t\tgw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws],\t\\\n+\t\t\t\t\t       &ws->ws_state[!ws->vws],\t\\\n+\t\t\t\t\t       ev, flags,\t\t\\\n+\t\t\t\t\t       ws->lookup_mem);\t\t\\\n+\t\tws->vws = !ws->vws;\t\t\t\t\t\\\n+\t}\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn gw;\t\t\t\t\t\t\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+uint16_t __hot\t\t\t\t\t\t\t\t\\\n+otx2_ssogws_dual_deq_timeout_burst_ ##name(void *port,\t\t\t\\\n+\t\t\t\t\t   struct rte_event ev[],\t\\\n+\t\t\t\t\t   uint16_t nb_events,\t\t\\\n+\t\t\t\t\t   uint64_t timeout_ticks)\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tRTE_SET_USED(nb_events);\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn otx2_ssogws_dual_deq_timeout_ ##name(port, ev,\t\t\\\n+\t\t\t\t\t\t    timeout_ticks);\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+uint16_t __hot\t\t\t\t\t\t\t\t\\\n+otx2_ssogws_dual_deq_seg_ ##name(void *port, struct rte_event *ev,\t\\\n+\t\t\t\t uint64_t timeout_ticks)\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tstruct otx2_ssogws_dual *ws = port;\t\t\t\t\\\n+\tuint8_t gw;\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tRTE_SET_USED(timeout_ticks);\t\t\t\t\t\\\n+\tif (ws->swtag_req) {\t\t\t\t\t\t\\\n+\t\totx2_ssogws_swtag_wait((struct otx2_ssogws *)\t\t\\\n+\t\t\t\t       &ws->ws_state[!ws->vws]);\t\\\n+\t\tws->swtag_req = 0;\t\t\t\t\t\\\n+\t\treturn 1;\t\t\t\t\t\t\\\n+\t}\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tgw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws],\t\t\\\n+\t\t\t\t       &ws->ws_state[!ws->vws], ev,\t\\\n+\t\t\t\t       flags | NIX_RX_MULTI_SEG_F,\t\\\n+\t\t\t\t       ws->lookup_mem);\t\t\t\\\n+\tws->vws = !ws->vws;\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn gw;\t\t\t\t\t\t\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+uint16_t __hot\t\t\t\t\t\t\t\t\\\n+otx2_ssogws_dual_deq_seg_burst_ ##name(void *port,\t\t\t\\\n+\t\t\t\t       struct rte_event ev[],\t\t\\\n+\t\t\t\t       uint16_t nb_events,\t\t\\\n+\t\t\t\t       uint64_t timeout_ticks)\t\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tRTE_SET_USED(nb_events);\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn otx2_ssogws_dual_deq_seg_ ##name(port, ev,\t\t\\\n+\t\t\t\t\t\ttimeout_ticks);\t\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+uint16_t __hot\t\t\t\t\t\t\t\t\\\n+otx2_ssogws_dual_deq_seg_timeout_ ##name(void *port,\t\t\t\\\n+\t\t\t\t\t struct rte_event *ev,\t\t\\\n+\t\t\t\t\t uint64_t timeout_ticks)\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tstruct otx2_ssogws_dual *ws = port;\t\t\t\t\\\n+\tuint64_t iter;\t\t\t\t\t\t\t\\\n+\tuint8_t gw;\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tif (ws->swtag_req) {\t\t\t\t\t\t\\\n+\t\totx2_ssogws_swtag_wait((struct otx2_ssogws *)\t\t\\\n+\t\t\t\t       &ws->ws_state[!ws->vws]);\t\\\n+\t\tws->swtag_req = 0;\t\t\t\t\t\\\n+\t\treturn 1;\t\t\t\t\t\t\\\n+\t}\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\tgw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws],\t\t\\\n+\t\t\t\t       &ws->ws_state[!ws->vws], ev,\t\\\n+\t\t\t\t       flags | NIX_RX_MULTI_SEG_F,\t\\\n+\t\t\t\t       ws->lookup_mem);\t\t\t\\\n+\tws->vws = !ws->vws;\t\t\t\t\t\t\\\n+\tfor (iter = 1; iter < timeout_ticks && (gw == 0); iter++) {\t\\\n+\t\tgw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws],\t\\\n+\t\t\t\t\t       &ws->ws_state[!ws->vws],\t\\\n+\t\t\t\t\t       ev, flags |\t\t\\\n+\t\t\t\t\t       NIX_RX_MULTI_SEG_F,\t\\\n+\t\t\t\t\t       ws->lookup_mem);\t\t\\\n+\t\tws->vws = !ws->vws;\t\t\t\t\t\\\n+\t}\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn gw;\t\t\t\t\t\t\t\\\n+}\t\t\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+uint16_t __hot\t\t\t\t\t\t\t\t\\\n+otx2_ssogws_dual_deq_seg_timeout_burst_ ##name(void *port,\t\t\\\n+\t\t\t\t\t       struct rte_event ev[],\t\\\n+\t\t\t\t\t       uint16_t nb_events,\t\\\n+\t\t\t\t\t       uint64_t timeout_ticks)\t\\\n+{\t\t\t\t\t\t\t\t\t\\\n+\tRTE_SET_USED(nb_events);\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\treturn otx2_ssogws_dual_deq_seg_timeout_ ##name(port, ev,\t\\\n+\t\t\t\t\t\t\ttimeout_ticks);\t\\\n }\n \n-uint16_t __hot\n-otx2_ssogws_dual_deq_timeout_burst(void *port, struct rte_event ev[],\n-\t\t\t\t   uint16_t nb_events, uint64_t timeout_ticks)\n-{\n-\tRTE_SET_USED(nb_events);\n-\n-\treturn otx2_ssogws_dual_deq_timeout(port, ev, timeout_ticks);\n-}\n+SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n+#undef R\ndiff --git a/drivers/event/octeontx2/otx2_worker_dual.h b/drivers/event/octeontx2/otx2_worker_dual.h\nindex fe8813897..b6e4dd738 100644\n--- a/drivers/event/octeontx2/otx2_worker_dual.h\n+++ b/drivers/event/octeontx2/otx2_worker_dual.h\n@@ -15,12 +15,16 @@\n static __rte_always_inline uint16_t\n otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,\n \t\t\t  struct otx2_ssogws_state *ws_pair,\n-\t\t\t  struct rte_event *ev)\n+\t\t\t  struct rte_event *ev, const uint32_t flags,\n+\t\t\t  const void * const lookup_mem)\n {\n \tconst uint64_t set_gw = BIT_ULL(16) | 1;\n \tuint64_t get_work0;\n \tuint64_t get_work1;\n+\tuint64_t mbuf;\n \n+\tif (flags & NIX_RX_OFFLOAD_PTYPE_F)\n+\t\trte_prefetch_non_temporal(lookup_mem);\n #ifdef RTE_ARCH_ARM64\n \tasm volatile(\n \t\t\t\"        ldr %[tag], [%[tag_loc]]    \\n\"\n@@ -33,8 +37,11 @@ otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,\n \t\t\t\"        tbnz %[tag], 63, rty%=      \\n\"\n \t\t\t\"done%=: str %[gw], [%[pong]]        \\n\"\n \t\t\t\"        prfm pldl1strm, [%[wqp]]    \\n\"\n+\t\t\t\"        sub %[mbuf], %[wqp], #0x80  \\n\"\n+\t\t\t\"        prfm pldl1strm, [%[mbuf]]   \\n\"\n \t\t\t\"        dmb ld                      \\n\"\n-\t\t\t: [tag] \"=&r\" (get_work0), [wqp] \"=&r\" (get_work1)\n+\t\t\t: [tag] \"=&r\" (get_work0), [wqp] \"=&r\" (get_work1),\n+\t\t\t  [mbuf] \"=&r\" (mbuf)\n \t\t\t: [tag_loc] \"r\" (ws->tag_op),\n \t\t\t  [wqp_loc] \"r\" (ws->wqp_op),\n \t\t\t  [gw] \"r\" (set_gw),\n@@ -48,6 +55,8 @@ otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,\n \totx2_write64(set_gw, ws_pair->getwrk_op);\n \n \trte_prefetch_non_temporal((const void *)get_work1);\n+\tmbuf = (uint64_t)((char *)get_work1 - sizeof(struct rte_mbuf));\n+\trte_prefetch_non_temporal((const void *)mbuf);\n #endif\n \n \tws->cur_tt = (get_work0 >> 32) & 0x3;\n@@ -56,6 +65,13 @@ otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,\n \t\t(get_work0 & (0x3FFull << 36)) << 4 |\n \t\t(get_work0 & 0xffffffff);\n \n+\tif (((get_work0 >> 38) & 0x3) != SSO_TT_EMPTY &&\n+\t    ((get_work0 >> 28) & 0xF) == RTE_EVENT_TYPE_ETHDEV) {\n+\t\tget_work1 = otx2_wqe_to_mbuf(get_work1, mbuf,\n+\t\t\t\t\t     (get_work0 >> 20) & 0xFF,\n+\t\t\t\t\t     flags, lookup_mem);\n+\t}\n+\n \tev->event = get_work0;\n \tev->u64 = get_work1;\n \n",
    "prefixes": [
        "v2",
        "3/6"
    ]
}