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GET /api/patches/54098/?format=api
{ "id": 54098, "url": "http://patches.dpdk.org/api/patches/54098/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190602152434.23996-59-jerinj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190602152434.23996-59-jerinj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190602152434.23996-59-jerinj@marvell.com", "date": "2019-06-02T15:24:34", "name": "[v1,58/58] doc: add Marvell OCTEON TX2 ethdev documentation", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "6fb25e214a64fb5b5e081979a4c6126126b511c6", "submitter": { "id": 1188, "url": "http://patches.dpdk.org/api/people/1188/?format=api", "name": "Jerin Jacob Kollanukkaran", "email": "jerinj@marvell.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190602152434.23996-59-jerinj@marvell.com/mbox/", "series": [ { "id": 4848, "url": "http://patches.dpdk.org/api/series/4848/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4848", "date": "2019-06-02T15:23:36", "name": "OCTEON TX2 Ethdev driver", "version": 1, "mbox": "http://patches.dpdk.org/series/4848/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/54098/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/54098/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 185851BB7A;\n\tSun, 2 Jun 2019 17:27:38 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 123FA1B9FE\n\tfor <dev@dpdk.org>; Sun, 2 Jun 2019 17:27:36 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx52FK7HJ020263; Sun, 2 Jun 2019 08:27:36 -0700", "from sc-exch02.marvell.com ([199.233.58.182])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2survk49b3-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tSun, 02 Jun 2019 08:27:36 -0700", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH02.marvell.com\n\t(10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSun, 2 Jun 2019 08:27:34 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sun, 2 Jun 2019 08:27:34 -0700", "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id 808463F703F;\n\tSun, 2 Jun 2019 08:27:32 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=uP1tn4vCqkDEAvdALAgJEkMotbx6hhPjFE/lS/C/XWs=;\n\tb=ADdUU/WQ/GyhZ+Q28emyekbkCSMJaPZK/ZKNZH+PIzvZU/FQ45/NYIB4/Jz8Is6tb6M9\n\tdjq1T8jnM2PnvDH8jFjpQOWcPSz6Oy73JJWbZrvAmwbWyTE0+Nre1f5VHyJvEcLD05oQ\n\tj3PhsfJ6tD9ZsqfeiuHIr6oVSyeyz8XLl37D9Eys4Nn/BzHDatN+xxjnZpLeuMxrX1fr\n\tHytgnTQtsr/pNfv9t09D1rlm3QpZdxVcCsXPgD6JPVkCQgVRUTAZgDLumENevwgtnO0R\n\terGS6hnuB2k70JxkIVsQO+tN9SdjtFRihQXQ+2XCDc7Tu51lhRRey2oR1+SA61UqaWxC\n\txg== ", "From": "<jerinj@marvell.com>", "To": "<dev@dpdk.org>, Thomas Monjalon <thomas@monjalon.net>, John McNamara\n\t<john.mcnamara@intel.com>, Marko Kovacevic <marko.kovacevic@intel.com>,\n\t\"Jerin Jacob\" <jerinj@marvell.com>, Nithin Dabilpuram\n\t<ndabilpuram@marvell.com>, Kiran Kumar K <kirankumark@marvell.com>, Vamsi\n\tAttunuru <vattunuru@marvell.com>", "CC": "<ferruh.yigit@intel.com>", "Date": "Sun, 2 Jun 2019 20:54:34 +0530", "Message-ID": "<20190602152434.23996-59-jerinj@marvell.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190602152434.23996-1-jerinj@marvell.com>", "References": "<20190602152434.23996-1-jerinj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-02_09:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v1 58/58] doc: add Marvell OCTEON TX2 ethdev\n\tdocumentation", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Jerin Jacob <jerinj@marvell.com>\n\nAdd Marvell OCTEON TX2 ethdev documentation.\n\nThis patch also updates the MAINTAINERS file and\nshared library versions in release_19_08.rst.\n\nCc: John McNamara <john.mcnamara@intel.com>\nCc: Thomas Monjalon <thomas@monjalon.net>\n\nSigned-off-by: Jerin Jacob <jerinj@marvell.com>\nSigned-off-by: Vamsi Attunuru <vattunuru@marvell.com>\nSigned-off-by: Kiran Kumar K <kirankumark@marvell.com>\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n MAINTAINERS | 8 +\n doc/guides/nics/features/octeontx2.ini | 1 +\n doc/guides/nics/features/octeontx2_vec.ini | 1 +\n doc/guides/nics/features/octeontx2_vf.ini | 1 +\n doc/guides/nics/index.rst | 1 +\n doc/guides/nics/octeontx2.rst | 289 +++++++++++++++++++++\n doc/guides/platform/octeontx2.rst | 3 +\n doc/guides/rel_notes/release_19_05.rst | 1 +\n 8 files changed, 305 insertions(+)\n create mode 100644 doc/guides/nics/octeontx2.rst", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex 74ac6d41f..fe509c1f9 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -668,6 +668,14 @@ F: drivers/net/mvneta/\n F: doc/guides/nics/mvneta.rst\n F: doc/guides/nics/features/mvneta.ini\n \n+Marvell OCTEON TX2\n+M: Jerin Jacob <jerinj@marvell.com>\n+M: Nithin Dabilpuram <ndabilpuram@marvell.com>\n+M: Kiran Kumar K <kirankumark@marvell.com>\n+F: drivers/net/octeontx2/\n+F: doc/guides/nics/features/octeontx2*.rst\n+F: doc/guides/nics/octeontx2.rst\n+\n Mellanox mlx4\n M: Matan Azrad <matan@mellanox.com>\n M: Shahaf Shuler <shahafs@mellanox.com>\ndiff --git a/doc/guides/nics/features/octeontx2.ini b/doc/guides/nics/features/octeontx2.ini\nindex e96c588fa..ef1a638e9 100644\n--- a/doc/guides/nics/features/octeontx2.ini\n+++ b/doc/guides/nics/features/octeontx2.ini\n@@ -44,3 +44,4 @@ Extended stats = Y\n FW version = Y\n Module EEPROM dump = Y\n Registers dump = Y\n+Usage doc = Y\ndiff --git a/doc/guides/nics/features/octeontx2_vec.ini b/doc/guides/nics/features/octeontx2_vec.ini\nindex 7ad097df4..8f95727f7 100644\n--- a/doc/guides/nics/features/octeontx2_vec.ini\n+++ b/doc/guides/nics/features/octeontx2_vec.ini\n@@ -41,3 +41,4 @@ Stats per queue = Y\n FW version = Y\n Module EEPROM dump = Y\n Registers dump = Y\n+Usage doc = Y\ndiff --git a/doc/guides/nics/features/octeontx2_vf.ini b/doc/guides/nics/features/octeontx2_vf.ini\nindex 0d5137316..e78385bb2 100644\n--- a/doc/guides/nics/features/octeontx2_vf.ini\n+++ b/doc/guides/nics/features/octeontx2_vf.ini\n@@ -36,3 +36,4 @@ Stats per queue = Y\n FW version = Y\n Module EEPROM dump = Y\n Registers dump = Y\n+Usage doc = Y\ndiff --git a/doc/guides/nics/index.rst b/doc/guides/nics/index.rst\nindex 2221c35f2..6fa075594 100644\n--- a/doc/guides/nics/index.rst\n+++ b/doc/guides/nics/index.rst\n@@ -44,6 +44,7 @@ Network Interface Controller Drivers\n nfb\n nfp\n octeontx\n+ octeontx2\n qede\n sfc_efx\n softnic\ndiff --git a/doc/guides/nics/octeontx2.rst b/doc/guides/nics/octeontx2.rst\nnew file mode 100644\nindex 000000000..2f14a4a1c\n--- /dev/null\n+++ b/doc/guides/nics/octeontx2.rst\n@@ -0,0 +1,289 @@\n+.. SPDX-License-Identifier: BSD-3-Clause\n+ Copyright(C) 2019 Marvell International Ltd.\n+\n+OCTEON TX2 Poll Mode driver\n+===========================\n+\n+The OCTEON TX2 ETHDEV PMD (**librte_pmd_octeontx2**) provides poll mode ethdev\n+driver support for the inbuilt network device found in **Marvell OCTEON TX2**\n+SoC family as well as for their virtual functions (VF) in SR-IOV context.\n+\n+More information can be found at `Marvell Official Website\n+<https://www.marvell.com/embedded-processors/infrastructure-processors>`_.\n+\n+Features\n+--------\n+\n+Features of the OCTEON TX2 Ethdev PMD are:\n+\n+- Packet type information\n+- Promiscuous mode\n+- Port hardware statistics\n+- Jumbo frames\n+- SR-IOV VF\n+- Lock-free Tx queue\n+- Multiple queues for TX and RX\n+- Receiver Side Scaling (RSS)\n+- MAC/VLAN filtering\n+- Generic flow API\n+- Inner and Outer Checksum offload\n+- VLAN/QinQ stripping and insertion\n+- Port hardware statistics\n+- Link state information\n+- Link flow control\n+- MTU update\n+- Scatter-Gather IO support\n+- Vector Poll mode driver\n+- Debug utilities - Context dump and error interrupt support\n+- IEEE1588 timestamping\n+- HW offloaded `ethdev Rx queue` to `eventdev event queue` packet injection\n+\n+Prerequisites\n+-------------\n+\n+See :doc:`../platform/octeontx2` for setup information.\n+\n+Compile time Config Options\n+---------------------------\n+\n+The following options may be modified in the ``config`` file.\n+\n+- ``CONFIG_RTE_LIBRTE_OCTEONTX2_PMD`` (default ``y``)\n+\n+ Toggle compilation of the ``librte_pmd_octeontx2`` driver.\n+\n+Driver compilation and testing\n+------------------------------\n+\n+Refer to the document :ref:`compiling and testing a PMD for a NIC <pmd_build_and_test>`\n+for details.\n+\n+To compile the OCTEON TX2 PMD for Linux arm64 gcc,\n+use arm64-octeontx2-linux-gcc as target.\n+\n+#. Running testpmd:\n+\n+ Follow instructions available in the document\n+ :ref:`compiling and testing a PMD for a NIC <pmd_build_and_test>`\n+ to run testpmd.\n+\n+ Example output:\n+\n+ .. code-block:: console\n+\n+ ./build/app/testpmd -c 0x300 -w 0002:02:00.0 -- --portmask=0x1 --nb-cores=1 --port-topology=loop --rxq=1 --txq=1\n+ EAL: Detected 24 lcore(s)\n+ EAL: Detected 1 NUMA nodes\n+ EAL: Multi-process socket /var/run/dpdk/rte/mp_socket\n+ EAL: No available hugepages reported in hugepages-2048kB\n+ EAL: Probing VFIO support...\n+ EAL: VFIO support initialized\n+ EAL: PCI device 0002:02:00.0 on NUMA socket 0\n+ EAL: probe driver: 177d:a063 net_octeontx2\n+ EAL: using IOMMU type 1 (Type 1)\n+ testpmd: create a new mbuf pool <mbuf_pool_socket_0>: n=267456, size=2176, socket=0\n+ testpmd: preferred mempool ops selected: octeontx2_npa\n+ Configuring Port 0 (socket 0)\n+ PMD: Port 0: Link Up - speed 40000 Mbps - full-duplex\n+\n+ Port 0: link state change event\n+ Port 0: 36:10:66:88:7A:57\n+ Checking link statuses...\n+ Done\n+ No commandline core given, start packet forwarding\n+ io packet forwarding - ports=1 - cores=1 - streams=1 - NUMA support enabled, MP allocation mode: native\n+ Logical Core 9 (socket 0) forwards packets on 1 streams:\n+ RX P=0/Q=0 (socket 0) -> TX P=0/Q=0 (socket 0) peer=02:00:00:00:00:00\n+\n+ io packet forwarding packets/burst=32\n+ nb forwarding cores=1 - nb forwarding ports=1\n+ port 0: RX queue number: 1 Tx queue number: 1\n+ Rx offloads=0x0 Tx offloads=0x10000\n+ RX queue: 0\n+ RX desc=512 - RX free threshold=0\n+ RX threshold registers: pthresh=0 hthresh=0 wthresh=0\n+ RX Offloads=0x0\n+ TX queue: 0\n+ TX desc=512 - TX free threshold=0\n+ TX threshold registers: pthresh=0 hthresh=0 wthresh=0\n+ TX offloads=0x10000 - TX RS bit threshold=0\n+ Press enter to exit\n+\n+Runtime Config Options\n+----------------------\n+\n+- ``HW offload ptype parsing disable`` (default ``0``)\n+\n+ Packet type parsing is HW offloaded by default and this feature may be toggled\n+ using ``ptype_disable`` ``devargs`` parameter.\n+\n+- ``Rx scalar mode enable`` (default ``0``)\n+\n+ Ethdev rx supports both scalar and vector mode, it may be selected at runtime\n+ using ``scalar_enable`` ``devargs`` parameter.\n+\n+- ``RSS reta size`` (default ``64``)\n+\n+ RSS redirection table size may be configured during runtime using ``reta_size``\n+ ``devargs`` parameter.\n+\n+ For example::\n+\n+ -w 0002:02:00.0,reta_size=256\n+\n+ With the above configuration, reta table of size 256 is populated.\n+\n+- ``Flow priority levels`` (default ``3``)\n+\n+ RTE Flow priority levels can be configured during runtime using\n+ ``flow_max_priority`` ``devargs`` parameter.\n+\n+ For example::\n+\n+ -w 0002:02:00.0,flow_max_priority=10\n+\n+ With the above configuration, priority level was set to 10 (0-9). Max\n+ priority level supported is 32.\n+\n+- ``Reserve Flow entries`` (default ``8``)\n+\n+ RTE flow entries can be pre allocated and the size of pre allocation can be\n+ selected runtime using ``flow_prealloc_size`` ``devargs`` parameter.\n+\n+ For example::\n+\n+ -w 0002:02:00.0,flow_prealloc_size=4\n+\n+ With the above configuration, pre alloc size was set to 4. Max pre alloc\n+ size supported is 32.\n+\n+.. note::\n+\n+ Above devarg parameters are configurable per device, user needs to pass the\n+ parameters to all the PCIe devices if application requires to configure on\n+ all the ethdev ports.\n+\n+Limitations\n+-----------\n+\n+``mempool_octeontx2`` external mempool handler dependency\n+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n+\n+The OCTEON TX2 SoC family NIC has inbuilt HW assisted external mempool manager.\n+``net_octeontx2`` pmd only works with ``mempool_octeontx2`` mempool handler\n+as it is performance wise most effective way for packet allocation and Tx buffer\n+recycling on OCTEON TX2 SoC platform.\n+\n+CRC striping\n+~~~~~~~~~~~~\n+\n+The OCTEON TX2 SoC family NICs strip the CRC for every packet being received by\n+the host interface irrespective of the offload configuration.\n+\n+\n+Debugging Options\n+-----------------\n+\n+.. _table_octeontx2_ethdev_debug_options:\n+\n+.. table:: OCTEON TX2 ethdev debug options\n+\n+ +---+------------+-------------------------------------------------------+\n+ | # | Component | EAL log command |\n+ +===+============+=======================================================+\n+ | 1 | NIX | --log-level='pmd\\.net.octeontx2,8' |\n+ +---+------------+-------------------------------------------------------+\n+ | 2 | NPC | --log-level='pmd\\.net.octeontx2\\.flow,8' |\n+ +---+------------+-------------------------------------------------------+\n+\n+RTE Flow Support\n+----------------\n+\n+The OCTEON TX2 SoC family NIC has support for the following patterns and\n+actions.\n+\n+Patterns:\n+\n+.. _table_octeontx2_supported_flow_item_types:\n+\n+.. table:: Item types\n+\n+ +----+--------------------------------+\n+ | # | Pattern Type |\n+ +====+================================+\n+ | 1 | RTE_FLOW_ITEM_TYPE_ETH |\n+ +----+--------------------------------+\n+ | 2 | RTE_FLOW_ITEM_TYPE_VLAN |\n+ +----+--------------------------------+\n+ | 3 | RTE_FLOW_ITEM_TYPE_E_TAG |\n+ +----+--------------------------------+\n+ | 4 | RTE_FLOW_ITEM_TYPE_IPV4 |\n+ +----+--------------------------------+\n+ | 5 | RTE_FLOW_ITEM_TYPE_IPV6 |\n+ +----+--------------------------------+\n+ | 6 | RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4|\n+ +----+--------------------------------+\n+ | 7 | RTE_FLOW_ITEM_TYPE_MPLS |\n+ +----+--------------------------------+\n+ | 8 | RTE_FLOW_ITEM_TYPE_ICMP |\n+ +----+--------------------------------+\n+ | 9 | RTE_FLOW_ITEM_TYPE_UDP |\n+ +----+--------------------------------+\n+ | 10 | RTE_FLOW_ITEM_TYPE_TCP |\n+ +----+--------------------------------+\n+ | 11 | RTE_FLOW_ITEM_TYPE_SCTP |\n+ +----+--------------------------------+\n+ | 12 | RTE_FLOW_ITEM_TYPE_ESP |\n+ +----+--------------------------------+\n+ | 13 | RTE_FLOW_ITEM_TYPE_GRE |\n+ +----+--------------------------------+\n+ | 14 | RTE_FLOW_ITEM_TYPE_NVGRE |\n+ +----+--------------------------------+\n+ | 15 | RTE_FLOW_ITEM_TYPE_VXLAN |\n+ +----+--------------------------------+\n+ | 16 | RTE_FLOW_ITEM_TYPE_GTPC |\n+ +----+--------------------------------+\n+ | 17 | RTE_FLOW_ITEM_TYPE_GTPU |\n+ +----+--------------------------------+\n+ | 18 | RTE_FLOW_ITEM_TYPE_VOID |\n+ +----+--------------------------------+\n+ | 19 | RTE_FLOW_ITEM_TYPE_ANY |\n+ +----+--------------------------------+\n+\n+Actions:\n+\n+.. _table_octeontx2_supported_ingress_action_types:\n+\n+.. table:: Ingress action types\n+\n+ +----+--------------------------------+\n+ | # | Action Type |\n+ +====+================================+\n+ | 1 | RTE_FLOW_ACTION_TYPE_VOID |\n+ +----+--------------------------------+\n+ | 2 | RTE_FLOW_ACTION_TYPE_MARK |\n+ +----+--------------------------------+\n+ | 3 | RTE_FLOW_ACTION_TYPE_FLAG |\n+ +----+--------------------------------+\n+ | 4 | RTE_FLOW_ACTION_TYPE_COUNT |\n+ +----+--------------------------------+\n+ | 5 | RTE_FLOW_ACTION_TYPE_DROP |\n+ +----+--------------------------------+\n+ | 6 | RTE_FLOW_ACTION_TYPE_QUEUE |\n+ +----+--------------------------------+\n+ | 7 | RTE_FLOW_ACTION_TYPE_RSS |\n+ +----+--------------------------------+\n+ | 8 | RTE_FLOW_ACTION_TYPE_SECURITY |\n+ +----+--------------------------------+\n+\n+.. _table_octeontx2_supported_egress_action_types:\n+\n+.. table:: Egress action types\n+\n+ +----+--------------------------------+\n+ | # | Action Type |\n+ +====+================================+\n+ | 1 | RTE_FLOW_ACTION_TYPE_COUNT |\n+ +----+--------------------------------+\n+ | 2 | RTE_FLOW_ACTION_TYPE_DROP |\n+ +----+--------------------------------+\ndiff --git a/doc/guides/platform/octeontx2.rst b/doc/guides/platform/octeontx2.rst\nindex c9ea45647..d2592f119 100644\n--- a/doc/guides/platform/octeontx2.rst\n+++ b/doc/guides/platform/octeontx2.rst\n@@ -98,6 +98,9 @@ HW Offload Drivers\n \n This section lists dataplane H/W block(s) available in OCTEON TX2 SoC.\n \n+#. **Ethdev Driver**\n+ See :doc:`../nics/octeontx2` for NIX Ethdev driver information.\n+\n #. **Mempool Driver**\n See :doc:`../mempool/octeontx2` for NPA mempool driver information.\n \ndiff --git a/doc/guides/rel_notes/release_19_05.rst b/doc/guides/rel_notes/release_19_05.rst\nindex b4c6972e3..e925ccf0e 100644\n--- a/doc/guides/rel_notes/release_19_05.rst\n+++ b/doc/guides/rel_notes/release_19_05.rst\n@@ -386,6 +386,7 @@ The libraries prepended with a plus sign were incremented in this version.\n librte_pmd_i40e.so.2\n librte_pmd_ixgbe.so.2\n librte_pmd_dpaa2_qdma.so.1\n+ + librte_pmd_octeontx2.so.1\n librte_pmd_ring.so.2\n librte_pmd_softnic.so.1\n librte_pmd_vhost.so.2\n", "prefixes": [ "v1", "58/58" ] }