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GET /api/patches/54087/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 54087,
    "url": "http://patches.dpdk.org/api/patches/54087/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190602152434.23996-45-jerinj@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190602152434.23996-45-jerinj@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190602152434.23996-45-jerinj@marvell.com",
    "date": "2019-06-02T15:24:20",
    "name": "[v1,44/58] net/octeontx2: implement VLAN utility functions",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "ccd1cfc0a4a7252b858a74b052beaab102d282d6",
    "submitter": {
        "id": 1188,
        "url": "http://patches.dpdk.org/api/people/1188/?format=api",
        "name": "Jerin Jacob Kollanukkaran",
        "email": "jerinj@marvell.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190602152434.23996-45-jerinj@marvell.com/mbox/",
    "series": [
        {
            "id": 4848,
            "url": "http://patches.dpdk.org/api/series/4848/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4848",
            "date": "2019-06-02T15:23:36",
            "name": "OCTEON TX2 Ethdev driver",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/4848/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/54087/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/54087/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B6D321BB47;\n\tSun,  2 Jun 2019 17:26:54 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id EEA651BBEE\n\tfor <dev@dpdk.org>; Sun,  2 Jun 2019 17:26:52 +0200 (CEST)",
            "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx52FLOCk021032; Sun, 2 Jun 2019 08:26:52 -0700",
            "from sc-exch01.marvell.com ([199.233.58.181])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2survk4997-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tSun, 02 Jun 2019 08:26:52 -0700",
            "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSun, 2 Jun 2019 08:26:50 -0700",
            "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sun, 2 Jun 2019 08:26:50 -0700",
            "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id 2305C3F703F;\n\tSun,  2 Jun 2019 08:26:48 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=xodww+tvfl7gKh1+d9KO9LYdPMLvKIq+XkxkVEOby3c=;\n\tb=vLXB/zMnWQG1nY3Rk23mGr2wi93WaMPW9ChwurWDmB3n2hwf/R1WfU0HhlFl4ODsQaeF\n\trwCiHGzq3dCttcddr4QYGB4N4gjIH1v3GbXq3v+bvYnRAlyWuNWwx2SMwKjGL60gRYCa\n\ttOdlUTYmJA+kNx5sR4hUGopYanq0x14GWBUANVwcJPGgBdMr1+kUym3zWYomtDXGDE8T\n\t81556ZmepHL8XnXlLjAIVqEu0/eg2DYr8zon1JXfprAxdvpPDLASdx6oqNXKhVAVr+8x\n\tchAkWjQGnq/FWFmgNEKAOjwX3KMeHa3chzRsGFeqKPDhguw4mMLC9lAQ/+yfUBYb0SUe\n\tVQ== ",
        "From": "<jerinj@marvell.com>",
        "To": "<dev@dpdk.org>, Jerin Jacob <jerinj@marvell.com>, Nithin Dabilpuram\n\t<ndabilpuram@marvell.com>, Kiran Kumar K <kirankumark@marvell.com>",
        "CC": "<ferruh.yigit@intel.com>, Vivek Sharma <viveksharma@marvell.com>",
        "Date": "Sun, 2 Jun 2019 20:54:20 +0530",
        "Message-ID": "<20190602152434.23996-45-jerinj@marvell.com>",
        "X-Mailer": "git-send-email 2.21.0",
        "In-Reply-To": "<20190602152434.23996-1-jerinj@marvell.com>",
        "References": "<20190602152434.23996-1-jerinj@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-02_09:, , signatures=0",
        "Subject": "[dpdk-dev] [PATCH v1 44/58] net/octeontx2: implement VLAN utility\n\tfunctions",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Vivek Sharma <viveksharma@marvell.com>\n\nImplement accessory functions needed for VLAN functionality.\nIntroduce VLAN related structures as well.\n\nMaximum Vtag insertion size is controlled by SMQ configuration.\nThis patch also configure SMQ for supporting upto double vtag insertion.\n\nSigned-off-by: Vivek Sharma <viveksharma@marvell.com>\n---\n drivers/net/octeontx2/Makefile      |   1 +\n drivers/net/octeontx2/meson.build   |   1 +\n drivers/net/octeontx2/otx2_ethdev.c |  10 ++\n drivers/net/octeontx2/otx2_ethdev.h |  48 +++++++\n drivers/net/octeontx2/otx2_tm.c     |   5 +-\n drivers/net/octeontx2/otx2_vlan.c   | 190 ++++++++++++++++++++++++++++\n 6 files changed, 253 insertions(+), 2 deletions(-)\n create mode 100644 drivers/net/octeontx2/otx2_vlan.c",
    "diff": "diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile\nindex d651c8c50..b1cc6d83b 100644\n--- a/drivers/net/octeontx2/Makefile\n+++ b/drivers/net/octeontx2/Makefile\n@@ -36,6 +36,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \\\n \totx2_ptp.c\t\\\n \totx2_flow.c\t\\\n \totx2_link.c\t\\\n+\totx2_vlan.c\t\\\n \totx2_stats.c\t\\\n \totx2_lookup.c\t\\\n \totx2_ethdev.c\t\\\ndiff --git a/drivers/net/octeontx2/meson.build b/drivers/net/octeontx2/meson.build\nindex a2c494bb4..d5f272c8b 100644\n--- a/drivers/net/octeontx2/meson.build\n+++ b/drivers/net/octeontx2/meson.build\n@@ -9,6 +9,7 @@ sources = files(\n \t\t'otx2_ptp.c',\n \t\t'otx2_flow.c',\n \t\t'otx2_link.c',\n+\t\t'otx2_vlan.c',\n \t\t'otx2_stats.c',\n \t\t'otx2_lookup.c',\n \t\t'otx2_ethdev.c',\ndiff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c\nindex bda5b4aa4..cfc22a2da 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.c\n+++ b/drivers/net/octeontx2/otx2_ethdev.c\n@@ -1079,6 +1079,7 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)\n \t/* Free the resources allocated from the previous configure */\n \tif (dev->configured == 1) {\n \t\totx2_nix_rxchan_bpid_cfg(eth_dev, false);\n+\t\totx2_nix_vlan_fini(eth_dev);\n \t\totx2_flow_fini(dev);\n \t\toxt2_nix_unregister_queue_irqs(eth_dev);\n \t\tnix_set_nop_rxtx_function(eth_dev);\n@@ -1126,6 +1127,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)\n \t\tgoto free_nix_lf;\n \t}\n \n+\trc = otx2_nix_vlan_offload_init(eth_dev);\n+\tif (rc) {\n+\t\totx2_err(\"Failed to init vlan offload rc=%d\", rc);\n+\t\tgoto free_nix_lf;\n+\t}\n+\n \t/* Register queue IRQs */\n \trc = oxt2_nix_register_queue_irqs(eth_dev);\n \tif (rc) {\n@@ -1546,6 +1553,9 @@ otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool mbox_close)\n \t/* Disable nix bpid config */\n \totx2_nix_rxchan_bpid_cfg(eth_dev, false);\n \n+\t/* Disable vlan offloads */\n+\totx2_nix_vlan_fini(eth_dev);\n+\n \t/* Disable other rte_flow entries */\n \totx2_flow_fini(dev);\n \ndiff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h\nindex e9123641c..b54018ae0 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.h\n+++ b/drivers/net/octeontx2/otx2_ethdev.h\n@@ -40,6 +40,7 @@\n /* Used for struct otx2_eth_dev::flags */\n #define OTX2_LINK_CFG_IN_PROGRESS_F\tBIT_ULL(0)\n \n+#define NIX_MAX_VTAG_INS\t\t2\n #define VLAN_TAG_SIZE\t\t\t4\n #define NIX_HW_L2_OVERHEAD\t\t22\n /* ETH_HLEN+2*VLAN_HLEN */\n@@ -163,6 +164,47 @@ struct otx2_fc_info {\n \tuint16_t bpid[NIX_MAX_CHAN];\n };\n \n+struct vlan_mkex_info {\n+\tstruct npc_xtract_info la_xtract;\n+\tstruct npc_xtract_info lb_xtract;\n+\tuint64_t lb_lt_offset;\n+};\n+\n+struct vlan_entry {\n+\tuint32_t mcam_idx;\n+\tuint16_t vlan_id;\n+\tTAILQ_ENTRY(vlan_entry) next;\n+};\n+\n+TAILQ_HEAD(otx2_vlan_filter_tbl, vlan_entry);\n+\n+struct otx2_vlan_info {\n+\tstruct otx2_vlan_filter_tbl fltr_tbl;\n+\t/* MKEX layer info */\n+\tstruct mcam_entry def_tx_mcam_ent;\n+\tstruct mcam_entry def_rx_mcam_ent;\n+\tstruct vlan_mkex_info mkex;\n+\t/* Default mcam entry that matches vlan packets */\n+\tuint32_t def_rx_mcam_idx;\n+\tuint32_t def_tx_mcam_idx;\n+\t/* MCAM entry that matches double vlan packets */\n+\tuint32_t qinq_mcam_idx;\n+\t/* Indices of tx_vtag def registers */\n+\tuint32_t outer_vlan_idx;\n+\tuint32_t inner_vlan_idx;\n+\tuint16_t outer_vlan_tpid;\n+\tuint16_t inner_vlan_tpid;\n+\tuint16_t pvid;\n+\t/* QinQ entry allocated before default one */\n+\tuint8_t qinq_before_def;\n+\tuint8_t pvid_insert_on;\n+\t/* Rx vtag action type */\n+\tuint8_t vtag_type_idx;\n+\tuint8_t filter_on;\n+\tuint8_t strip_on;\n+\tuint8_t qinq_on;\n+};\n+\n struct otx2_eth_dev {\n \tOTX2_DEV; /* Base class */\n \tMARKER otx2_eth_dev_data_start;\n@@ -222,6 +264,7 @@ struct otx2_eth_dev {\n \tstruct rte_timecounter  systime_tc;\n \tstruct rte_timecounter  rx_tstamp_tc;\n \tstruct rte_timecounter  tx_tstamp_tc;\n+\tstruct otx2_vlan_info vlan_info;\n } __rte_cache_aligned;\n \n struct otx2_eth_txq {\n@@ -422,4 +465,9 @@ int otx2_nix_timesync_read_time(struct rte_eth_dev *eth_dev,\n \t\t\t\tstruct timespec *ts);\n int otx2_eth_dev_ptp_info_update(struct otx2_dev *dev, bool ptp_en);\n \n+/* VLAN */\n+int otx2_nix_vlan_offload_init(struct rte_eth_dev *eth_dev);\n+int otx2_nix_vlan_fini(struct rte_eth_dev *eth_dev);\n+\n+\n #endif /* __OTX2_ETHDEV_H__ */\ndiff --git a/drivers/net/octeontx2/otx2_tm.c b/drivers/net/octeontx2/otx2_tm.c\nindex 4439389b8..246920695 100644\n--- a/drivers/net/octeontx2/otx2_tm.c\n+++ b/drivers/net/octeontx2/otx2_tm.c\n@@ -359,7 +359,7 @@ populate_tm_registers(struct otx2_eth_dev *dev,\n \n \t\t/* Set xoff which will be cleared later */\n \t\t*reg++ = NIX_AF_SMQX_CFG(schq);\n-\t\t*regval++ = BIT_ULL(50) |\n+\t\t*regval++ = BIT_ULL(50) | ((uint64_t)NIX_MAX_VTAG_INS << 36) |\n \t\t\t\t(NIX_MAX_HW_FRS << 8) | NIX_MIN_HW_FRS;\n \t\treq->num_regs++;\n \t\t*reg++ = NIX_AF_MDQX_PARENT(schq);\n@@ -688,7 +688,8 @@ nix_smq_xoff(struct otx2_eth_dev *dev, uint16_t smq, bool enable)\n \n \treq->reg[0] = NIX_AF_SMQX_CFG(smq);\n \t/* Unmodified fields */\n-\treq->regval[0] = (NIX_MAX_HW_FRS << 8) | NIX_MIN_HW_FRS;\n+\treq->regval[0] = ((uint64_t)NIX_MAX_VTAG_INS << 36) |\n+\t\t\t\t(NIX_MAX_HW_FRS << 8) | NIX_MIN_HW_FRS;\n \n \tif (enable)\n \t\treq->regval[0] |= BIT_ULL(50) | BIT_ULL(49);\ndiff --git a/drivers/net/octeontx2/otx2_vlan.c b/drivers/net/octeontx2/otx2_vlan.c\nnew file mode 100644\nindex 000000000..b3136d2cf\n--- /dev/null\n+++ b/drivers/net/octeontx2/otx2_vlan.c\n@@ -0,0 +1,190 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2019 Marvell International Ltd.\n+ */\n+\n+#include <rte_malloc.h>\n+#include <rte_tailq.h>\n+\n+#include \"otx2_ethdev.h\"\n+#include \"otx2_flow.h\"\n+\n+\n+#define VLAN_ID_MATCH\t0x1\n+#define VTAG_F_MATCH\t0x2\n+#define MAC_ADDR_MATCH\t0x4\n+#define QINQ_F_MATCH\t0x8\n+#define VLAN_DROP\t0x10\n+\n+enum vtag_cfg_dir {\n+\tVTAG_TX,\n+\tVTAG_RX\n+};\n+\n+static int\n+__rte_unused nix_vlan_mcam_enb_dis(struct otx2_eth_dev *dev,\n+\t\t\t\t   uint32_t entry, const int enable)\n+{\n+\tstruct npc_mcam_ena_dis_entry_req *req;\n+\tstruct otx2_mbox *mbox = dev->mbox;\n+\tint rc = -EINVAL;\n+\n+\tif (enable)\n+\t\treq = otx2_mbox_alloc_msg_npc_mcam_ena_entry(mbox);\n+\telse\n+\t\treq = otx2_mbox_alloc_msg_npc_mcam_dis_entry(mbox);\n+\n+\treq->entry = entry;\n+\n+\trc = otx2_mbox_process_msg(mbox, NULL);\n+\treturn rc;\n+}\n+\n+static int\n+__rte_unused nix_vlan_mcam_free(struct otx2_eth_dev *dev, uint32_t entry)\n+{\n+\tstruct npc_mcam_free_entry_req *req;\n+\tstruct otx2_mbox *mbox = dev->mbox;\n+\tint rc = -EINVAL;\n+\n+\treq = otx2_mbox_alloc_msg_npc_mcam_free_entry(mbox);\n+\treq->entry = entry;\n+\n+\trc = otx2_mbox_process_msg(mbox, NULL);\n+\treturn rc;\n+}\n+\n+static int\n+__rte_unused nix_vlan_mcam_write(struct rte_eth_dev *eth_dev, uint16_t ent_idx,\n+\t\t\t\t struct mcam_entry *entry, uint8_t intf)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct npc_mcam_write_entry_req *req;\n+\tstruct otx2_mbox *mbox = dev->mbox;\n+\tstruct msghdr *rsp;\n+\tint rc = -EINVAL;\n+\n+\treq = otx2_mbox_alloc_msg_npc_mcam_write_entry(mbox);\n+\n+\treq->entry = ent_idx;\n+\treq->intf = intf;\n+\treq->enable_entry = 1;\n+\tmemcpy(&req->entry_data, entry, sizeof(struct mcam_entry));\n+\n+\trc = otx2_mbox_process_msg(mbox, (void *)&rsp);\n+\treturn rc;\n+}\n+\n+static int\n+__rte_unused nix_vlan_mcam_alloc_and_write(struct rte_eth_dev *eth_dev,\n+\t\t\t\t\t   struct mcam_entry *entry,\n+\t\t\t\t\t   uint8_t intf, bool drop)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct npc_mcam_alloc_and_write_entry_req *req;\n+\tstruct npc_mcam_alloc_and_write_entry_rsp *rsp;\n+\tstruct otx2_mbox *mbox = dev->mbox;\n+\tint rc = -EINVAL;\n+\n+\treq = otx2_mbox_alloc_msg_npc_mcam_alloc_and_write_entry(mbox);\n+\n+\tif (intf == NPC_MCAM_RX) {\n+\t\tif (!drop && dev->vlan_info.def_rx_mcam_idx) {\n+\t\t\treq->priority = NPC_MCAM_HIGHER_PRIO;\n+\t\t\treq->ref_entry = dev->vlan_info.def_rx_mcam_idx;\n+\t\t} else if (drop && dev->vlan_info.qinq_mcam_idx) {\n+\t\t\treq->priority = NPC_MCAM_LOWER_PRIO;\n+\t\t\treq->ref_entry = dev->vlan_info.qinq_mcam_idx;\n+\t\t} else {\n+\t\t\treq->priority = NPC_MCAM_ANY_PRIO;\n+\t\t\treq->ref_entry = 0;\n+\t\t}\n+\t} else {\n+\t\treq->priority = NPC_MCAM_ANY_PRIO;\n+\t\treq->ref_entry = 0;\n+\t}\n+\n+\treq->intf = intf;\n+\treq->enable_entry = 1;\n+\tmemcpy(&req->entry_data, entry, sizeof(struct mcam_entry));\n+\n+\trc = otx2_mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\treturn rsp->entry;\n+}\n+\n+static int\n+nix_vlan_rx_mkex_offset(uint64_t mask)\n+{\n+\tint nib_count = 0;\n+\n+\twhile (mask) {\n+\t\tnib_count += mask & 1;\n+\t\tmask >>= 1;\n+\t}\n+\n+\treturn nib_count * 4;\n+}\n+\n+static int\n+nix_vlan_get_mkex_info(struct otx2_eth_dev *dev)\n+{\n+\tstruct vlan_mkex_info *mkex = &dev->vlan_info.mkex;\n+\tstruct otx2_npc_flow_info *npc = &dev->npc_flow;\n+\tstruct npc_xtract_info *x_info = NULL;\n+\tuint64_t rx_keyx;\n+\totx2_dxcfg_t *p;\n+\tint rc = -EINVAL;\n+\n+\tif (npc == NULL) {\n+\t\totx2_err(\"Missing npc mkex configuration\");\n+\t\treturn rc;\n+\t}\n+\n+#define NPC_KEX_CHAN_NIBBLE_ENA\t\t\t0x7ULL\n+#define NPC_KEX_LB_LTYPE_NIBBLE_ENA\t\t0x1000ULL\n+#define NPC_KEX_LB_LTYPE_NIBBLE_MASK\t\t0xFFFULL\n+\n+\trx_keyx = npc->keyx_supp_nmask[NPC_MCAM_RX];\n+\tif ((rx_keyx & NPC_KEX_CHAN_NIBBLE_ENA) != NPC_KEX_CHAN_NIBBLE_ENA)\n+\t\treturn rc;\n+\n+\tif ((rx_keyx & NPC_KEX_LB_LTYPE_NIBBLE_ENA) !=\n+\t    NPC_KEX_LB_LTYPE_NIBBLE_ENA)\n+\t\treturn rc;\n+\n+\tmkex->lb_lt_offset =\n+\t    nix_vlan_rx_mkex_offset(rx_keyx & NPC_KEX_LB_LTYPE_NIBBLE_MASK);\n+\n+\tp = &npc->prx_dxcfg;\n+\tx_info = &(*p)[NPC_MCAM_RX][NPC_LID_LA][NPC_LT_LA_ETHER].xtract[0];\n+\tmemcpy(&mkex->la_xtract, x_info, sizeof(struct npc_xtract_info));\n+\tx_info = &(*p)[NPC_MCAM_RX][NPC_LID_LB][NPC_LT_LB_CTAG].xtract[0];\n+\tmemcpy(&mkex->lb_xtract, x_info, sizeof(struct npc_xtract_info));\n+\n+\treturn 0;\n+}\n+\n+int\n+otx2_nix_vlan_offload_init(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tint rc;\n+\n+\t/* Port initialized for first time or restarted */\n+\tif (!dev->configured) {\n+\t\trc = nix_vlan_get_mkex_info(dev);\n+\t\tif (rc) {\n+\t\t\totx2_err(\"Failed to get vlan mkex info rc=%d\", rc);\n+\t\t\treturn rc;\n+\t\t}\n+\t}\n+\treturn 0;\n+}\n+\n+int\n+otx2_nix_vlan_fini(__rte_unused struct rte_eth_dev *eth_dev)\n+{\n+\treturn 0;\n+}\n",
    "prefixes": [
        "v1",
        "44/58"
    ]
}