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GET /api/patches/54008/?format=api
{ "id": 54008, "url": "http://patches.dpdk.org/api/patches/54008/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190601182030.8282-8-jerinj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190601182030.8282-8-jerinj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190601182030.8282-8-jerinj@marvell.com", "date": "2019-06-01T18:20:28", "name": "[v1,7/9] raw/octeontx2_dma: add driver self test", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "f41a10d23b1df6d5419d172c6cfd070dbc68bab0", "submitter": { "id": 1188, "url": "http://patches.dpdk.org/api/people/1188/?format=api", "name": "Jerin Jacob Kollanukkaran", "email": "jerinj@marvell.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190601182030.8282-8-jerinj@marvell.com/mbox/", "series": [ { "id": 4846, "url": "http://patches.dpdk.org/api/series/4846/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4846", "date": "2019-06-01T18:20:21", "name": "OCTEON TX2 DMA driver", "version": 1, "mbox": "http://patches.dpdk.org/series/4846/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/54008/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/54008/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 83E221B99F;\n\tSat, 1 Jun 2019 20:20:41 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id B5CE71B998\n\tfor <dev@dpdk.org>; Sat, 1 Jun 2019 20:20:39 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx51IKQia003606 for <dev@dpdk.org>; Sat, 1 Jun 2019 11:20:39 -0700", "from sc-exch04.marvell.com ([199.233.58.184])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2survk101h-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Sat, 01 Jun 2019 11:20:39 -0700", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH04.marvell.com\n\t(10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSat, 1 Jun 2019 11:20:37 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sat, 1 Jun 2019 11:20:37 -0700", "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id D45083F703F;\n\tSat, 1 Jun 2019 11:20:36 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=2t1p7/R5b1lTHBst8PmKcwiXp6z9l5abDdWz+5nhvVo=;\n\tb=bSqqj8+z4ZEZz8PsNBnD26M5xuQ7Cuk8y9mU/XUHudCUFaO0ub7716Qt+cDr1BKq/WLc\n\t0fTy5m2Pu7szfB5wrSkE4u9GjP3OCMNt2R3/cDSuRyxoxrRQ9A+mE2PpM6nSLzeZEb6g\n\tBvpdI+OP0Y/8hDV2ARSzhyggAgmPo6XE1lmfZaRy5ywN1sEF/mye2YBCkw4zS1qaornY\n\tYFrRIOqEfxWW+PbVNPwAGVIZq3NbatqWfSRXbyt4JyZklF4u1j/+C87wNUVmnO9wlBxQ\n\tQfJtS481iIvkX2yd2HKPcu7oXWqEM42NsKjX0SyKbzjTZ4Ft95nvSxYFbNF8Lg2Qpm1e\n\tGw== ", "From": "<jerinj@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<skoteshwar@marvell.com>, Vamsi Attunuru <vattunuru@marvell.com>", "Date": "Sat, 1 Jun 2019 23:50:28 +0530", "Message-ID": "<20190601182030.8282-8-jerinj@marvell.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190601182030.8282-1-jerinj@marvell.com>", "References": "<20190601182030.8282-1-jerinj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-01_13:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v1 7/9] raw/octeontx2_dma: add driver self test", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Satha Rao <skoteshwar@marvell.com>\n\nSample test to verify DMA functionality, this test covers\ninternal transfer mode.\n\nSigned-off-by: Satha Rao <skoteshwar@marvell.com>\nSigned-off-by: Vamsi Attunuru <vattunuru@marvell.com>\n---\n drivers/raw/octeontx2_dma/Makefile | 2 +-\n drivers/raw/octeontx2_dma/meson.build | 2 +-\n drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 2 +\n drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 1 +\n drivers/raw/octeontx2_dma/otx2_dpi_test.c | 216 ++++++++++++++++++++\n 5 files changed, 221 insertions(+), 2 deletions(-)\n create mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_test.c", "diff": "diff --git a/drivers/raw/octeontx2_dma/Makefile b/drivers/raw/octeontx2_dma/Makefile\nindex 6a9a380b1..8135fba6a 100644\n--- a/drivers/raw/octeontx2_dma/Makefile\n+++ b/drivers/raw/octeontx2_dma/Makefile\n@@ -25,6 +25,6 @@ LIBABIVER := 1\n #\n # all source are stored in SRCS-y\n #\n-SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV) += otx2_dpi_rawdev.c otx2_dpi_msg.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV) += otx2_dpi_rawdev.c otx2_dpi_msg.c otx2_dpi_test.c\n \n include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/raw/octeontx2_dma/meson.build b/drivers/raw/octeontx2_dma/meson.build\nindex 751d099d2..f1afff2a9 100644\n--- a/drivers/raw/octeontx2_dma/meson.build\n+++ b/drivers/raw/octeontx2_dma/meson.build\n@@ -3,7 +3,7 @@\n #\n \n deps += ['rawdev', 'ring', 'kvargs', 'bus_pci', 'common_octeontx2', 'mempool_octeontx2']\n-sources = files('otx2_dpi_rawdev.c', 'otx2_dpi_msg.c')\n+sources = files('otx2_dpi_rawdev.c', 'otx2_dpi_msg.c', 'otx2_dpi_test.c')\n \n extra_flags = []\n # This integrated controller runs only on a arm64 machine, remove 32bit warnings\ndiff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c\nindex f8f0c4af6..0922555bc 100644\n--- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c\n+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c\n@@ -338,6 +338,8 @@ static const struct rte_rawdev_ops dpi_rawdev_ops = {\n \t.dev_reset = otx2_dpi_rawdev_reset,\n \t.enqueue_bufs = otx2_dpi_rawdev_enqueue_bufs,\n \t.dequeue_bufs = otx2_dpi_rawdev_dequeue_bufs,\n+\n+\t.dev_selftest = test_otx2_dma_rawdev,\n };\n \n static int\ndiff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h\nindex f59bab97f..ff03431d0 100644\n--- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h\n+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h\n@@ -191,5 +191,6 @@ union dpi_dma_instr_hdr_u {\n \n int otx2_dpi_queue_open(uint16_t vf_id, uint32_t size, uint32_t gaura);\n int otx2_dpi_queue_close(uint16_t vf_id);\n+int test_otx2_dma_rawdev(void);\n \n #endif /* _DPI_RAWDEV_H_ */\ndiff --git a/drivers/raw/octeontx2_dma/otx2_dpi_test.c b/drivers/raw/octeontx2_dma/otx2_dpi_test.c\nnew file mode 100644\nindex 000000000..571136bf5\n--- /dev/null\n+++ b/drivers/raw/octeontx2_dma/otx2_dpi_test.c\n@@ -0,0 +1,216 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2019 Marvell International Ltd.\n+ */\n+\n+#include <stdio.h>\n+#include <stdlib.h>\n+#include <string.h>\n+#include <unistd.h>\n+\n+#include <rte_common.h>\n+#include <rte_debug.h>\n+#include <rte_eal.h>\n+#include <rte_log.h>\n+#include <rte_malloc.h>\n+#include <rte_mbuf.h>\n+#include <rte_mbuf_pool_ops.h>\n+#include <rte_memcpy.h>\n+#include <rte_memory.h>\n+#include <rte_mempool.h>\n+#include <rte_per_lcore.h>\n+#include <rte_rawdev.h>\n+\n+#include \"otx2_dpi_rawdev.h\"\n+\n+static struct dpi_cring_data_s cring;\n+\n+static uint8_t\n+buffer_fill(uint8_t *addr, int len, uint8_t val)\n+{\n+\tint j = 0;\n+\n+\tmemset(addr, 0, len);\n+\tfor (j = 0; j < len; j++)\n+\t\t*(addr + j) = val++;\n+\n+\treturn val;\n+}\n+\n+static int\n+validate_buffer(uint8_t *saddr, uint8_t *daddr, int len)\n+{\n+\tint j = 0, ret = 0;\n+\n+\tfor (j = 0; j < len; j++) {\n+\t\tif (*(saddr + j) != *(daddr + j)) {\n+\t\t\totx2_dpi_dbg(\"FAIL: Data Integrity failed\");\n+\t\t\totx2_dpi_dbg(\"index: %d, Expected: 0x%x, Actual: 0x%x\",\n+\t\t\t\t j, *(saddr + j), *(daddr + j));\n+\t\t\tret = -1;\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\n+\treturn ret;\n+}\n+\n+static inline int\n+dma_test_internal(int dma_port, int buf_size)\n+{\n+\tstruct dpi_dma_req_compl_s *comp_data;\n+\tstruct dpi_dma_queue_ctx_s ctx = {0};\n+\tstruct rte_rawdev_buf buf = {0};\n+\tstruct rte_rawdev_buf *d_buf[1];\n+\tstruct rte_rawdev_buf *bufp[1];\n+\tstruct dpi_dma_buf_ptr_s cmd;\n+\tunion dpi_dma_ptr_u rptr = { {0} };\n+\tunion dpi_dma_ptr_u wptr = { {0} };\n+\tuint8_t *fptr, *lptr;\n+\tint ret;\n+\n+\tfptr = (uint8_t *)rte_malloc(\"dummy\", buf_size, 128);\n+\tlptr = (uint8_t *)rte_malloc(\"dummy\", buf_size, 128);\n+\tcomp_data = rte_malloc(\"dummy\", buf_size, 128);\n+\tif (fptr == NULL || lptr == NULL || comp_data == NULL) {\n+\t\totx2_dpi_dbg(\"Unable to allocate internal memory\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tbuffer_fill(fptr, buf_size, 0);\n+\tmemset(&cmd, 0, sizeof(struct dpi_dma_buf_ptr_s));\n+\tmemset(lptr, 0, buf_size);\n+\tmemset(comp_data, 0, buf_size);\n+\trptr.s.ptr = (uint64_t)fptr;\n+\trptr.s.length = buf_size;\n+\twptr.s.ptr = (uint64_t)lptr;\n+\twptr.s.length = buf_size;\n+\tcmd.rptr[0] = &rptr;\n+\tcmd.wptr[0] = &wptr;\n+\tcmd.rptr_cnt = 1;\n+\tcmd.wptr_cnt = 1;\n+\tcmd.comp_ptr = comp_data;\n+\tbuf.buf_addr = (void *)&cmd;\n+\tbufp[0] = &buf;\n+\n+\tctx.xtype = DPI_XTYPE_INTERNAL_ONLY;\n+\tctx.pt = 0;\n+\tctx.c_ring = &cring;\n+\n+\tret = rte_rawdev_enqueue_buffers(dma_port,\n+\t\t\t\t\t (struct rte_rawdev_buf **)bufp, 1,\n+\t\t\t\t\t &ctx);\n+\tif (ret < 0) {\n+\t\totx2_dpi_dbg(\"Enqueue request failed\");\n+\t\treturn 0;\n+\t}\n+\n+\t/* Wait and dequeue completion */\n+\tdo {\n+\t\tsleep(1);\n+\t\tret = rte_rawdev_dequeue_buffers(dma_port, &d_buf[0], 1, &ctx);\n+\t\tif (ret)\n+\t\t\tbreak;\n+\n+\t\totx2_dpi_dbg(\"Dequeue request not completed\");\n+\t} while (1);\n+\n+\tif (validate_buffer(fptr, lptr, buf_size)) {\n+\t\totx2_dpi_dbg(\"DMA transfer failed\\n\");\n+\t\treturn -EAGAIN;\n+\t}\n+\totx2_dpi_dbg(\"Internal Only DMA transfer successfully completed\");\n+\n+\tif (lptr)\n+\t\trte_free(lptr);\n+\tif (fptr)\n+\t\trte_free(fptr);\n+\tif (comp_data)\n+\t\trte_free(comp_data);\n+\n+\treturn 0;\n+}\n+\n+static void *\n+dpi_create_mempool(void)\n+{\n+\tvoid *chunk_pool = NULL;\n+\tchar pool_name[25];\n+\tint ret;\n+\n+\tsnprintf(pool_name, sizeof(pool_name), \"dpi_chunk_pool\");\n+\n+\tchunk_pool = (void *)rte_mempool_create_empty(pool_name, 1024, 1024,\n+\t\t\t\t\t\t 0, 0, rte_socket_id(), 0);\n+\tif (chunk_pool == NULL) {\n+\t\totx2_dpi_dbg(\"Unable to create memory pool.\");\n+\t\treturn NULL;\n+\t}\n+\n+\tret = rte_mempool_set_ops_byname(chunk_pool,\n+\t\t\t\t\t rte_mbuf_platform_mempool_ops(), NULL);\n+\tif (ret < 0) {\n+\t\totx2_dpi_dbg(\"Unable to set pool ops\");\n+\t\trte_mempool_free(chunk_pool);\n+\t\treturn NULL;\n+\t}\n+\n+\tret = rte_mempool_populate_default(chunk_pool);\n+\tif (ret < 0) {\n+\t\totx2_dpi_dbg(\"Unable to populate pool\");\n+\t\treturn NULL;\n+\t}\n+\n+\treturn chunk_pool;\n+}\n+\n+int\n+test_otx2_dma_rawdev(void)\n+{\n+\tstruct rte_rawdev_info rdev_info = {0};\n+\tstruct dpi_rawdev_conf_s conf = {0};\n+\tint ret, i, size = 1024;\n+\tint nb_ports;\n+\n+\tnb_ports = rte_rawdev_count();\n+\tif (nb_ports == 0) {\n+\t\totx2_dpi_dbg(\"No Rawdev ports - bye\");\n+\t\treturn -ENODEV;\n+\t}\n+\n+\ti = rte_rawdev_get_dev_id(\"DPI:5:00.1\");\n+\t/* Configure rawdev ports */\n+\tconf.chunk_pool = dpi_create_mempool();\n+\trdev_info.dev_private = &conf;\n+\tret = rte_rawdev_configure(i, (rte_rawdev_obj_t)&rdev_info);\n+\tif (ret) {\n+\t\totx2_dpi_dbg(\"Unable to configure DPIVF %d\", i);\n+\t\treturn -ENODEV;\n+\t}\n+\totx2_dpi_dbg(\"rawdev %d configured successfully\", i);\n+\n+\t/* Each stream allocate its own completion ring data, store it in\n+\t * application context. Each stream needs to use same application\n+\t * context for enqueue/dequeue.\n+\t */\n+\tcring.compl_data = rte_malloc(\"dummy\", sizeof(void *) * 1024, 128);\n+\tif (!cring.compl_data) {\n+\t\totx2_dpi_dbg(\"Completion allocation failed\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tcring.max_cnt = 1024;\n+\tcring.head = 0;\n+\tcring.tail = 0;\n+\n+\tret = dma_test_internal(i, size);\n+\tif (ret)\n+\t\totx2_dpi_dbg(\"DMA transfer failed for queue %d\", i);\n+\n+\tif (rte_rawdev_close(i))\n+\t\totx2_dpi_dbg(\"Dev close failed for port %d\", i);\n+\n+\tif (conf.chunk_pool)\n+\t\trte_mempool_free(conf.chunk_pool);\n+\n+\treturn ret;\n+}\n", "prefixes": [ "v1", "7/9" ] }