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{
    "id": 54004,
    "url": "http://patches.dpdk.org/api/patches/54004/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190601182030.8282-4-jerinj@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190601182030.8282-4-jerinj@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190601182030.8282-4-jerinj@marvell.com",
    "date": "2019-06-01T18:20:24",
    "name": "[v1,3/9] raw/octeontx2_dma: add device configuration",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "d763ea499162619ad138cd692aba2ae91c376d7d",
    "submitter": {
        "id": 1188,
        "url": "http://patches.dpdk.org/api/people/1188/?format=api",
        "name": "Jerin Jacob Kollanukkaran",
        "email": "jerinj@marvell.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190601182030.8282-4-jerinj@marvell.com/mbox/",
    "series": [
        {
            "id": 4846,
            "url": "http://patches.dpdk.org/api/series/4846/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4846",
            "date": "2019-06-01T18:20:21",
            "name": "OCTEON TX2 DMA driver",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/4846/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/54004/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/54004/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
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            "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id C28103F7041;\n\tSat,  1 Jun 2019 11:20:26 -0700 (PDT)"
        ],
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        "From": "<jerinj@marvell.com>",
        "To": "<dev@dpdk.org>",
        "CC": "<skoteshwar@marvell.com>, Vamsi Attunuru <vattunuru@marvell.com>",
        "Date": "Sat, 1 Jun 2019 23:50:24 +0530",
        "Message-ID": "<20190601182030.8282-4-jerinj@marvell.com>",
        "X-Mailer": "git-send-email 2.21.0",
        "In-Reply-To": "<20190601182030.8282-1-jerinj@marvell.com>",
        "References": "<20190601182030.8282-1-jerinj@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
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        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-01_13:, , signatures=0",
        "Subject": "[dpdk-dev] [PATCH v1 3/9] raw/octeontx2_dma: add device\n\tconfiguration",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
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        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Satha Rao <skoteshwar@marvell.com>\n\nRegister dev_configure API to configure DPI PCI devices.\nAfter successful initialisation send message to PF to open\ncorresponding DPI DMA queue. At present hardware doesn't\nsupport mail box for DPI, so PMD to PF communication uses\nprebuild kernel devfs.\n\nSigned-off-by: Satha Rao <skoteshwar@marvell.com>\nSigned-off-by: Vamsi Attunuru <vattunuru@marvell.com>\n---\n drivers/raw/octeontx2_dma/Makefile          |   5 +-\n drivers/raw/octeontx2_dma/meson.build       |   2 +-\n drivers/raw/octeontx2_dma/otx2_dpi_msg.c    | 105 ++++++++++++++++++++\n drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c |  54 ++++++++++\n drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h |   3 +\n 5 files changed, 165 insertions(+), 4 deletions(-)\n create mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_msg.c",
    "diff": "diff --git a/drivers/raw/octeontx2_dma/Makefile b/drivers/raw/octeontx2_dma/Makefile\nindex 7335d0ffa..6a9a380b1 100644\n--- a/drivers/raw/octeontx2_dma/Makefile\n+++ b/drivers/raw/octeontx2_dma/Makefile\n@@ -7,10 +7,9 @@ include $(RTE_SDK)/mk/rte.vars.mk\n # library name\n LIB = librte_pmd_octeontx2_dma.a\n \n-CFLAGS += -DALLOW_EXPERIMENTAL_API -O3 $(WERROR_FLAGS)\n+CFLAGS += -O3 $(WERROR_FLAGS)\n CFLAGS += -I$(RTE_SDK)/drivers/common/octeontx2/\n CFLAGS += -I$(RTE_SDK)/drivers/mempool/octeontx2/\n-CFLAGS += -I$(RTE_SDK)/drivers/raw/octeontx2_dma/\n LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring -lrte_rawdev\n LDLIBS += -lrte_common_octeontx2 -lrte_kvargs -lrte_bus_pci\n \n@@ -26,6 +25,6 @@ LIBABIVER := 1\n #\n # all source are stored in SRCS-y\n #\n-SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV) += otx2_dpi_rawdev.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV) += otx2_dpi_rawdev.c otx2_dpi_msg.c\n \n include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/raw/octeontx2_dma/meson.build b/drivers/raw/octeontx2_dma/meson.build\nindex 1281268aa..751d099d2 100644\n--- a/drivers/raw/octeontx2_dma/meson.build\n+++ b/drivers/raw/octeontx2_dma/meson.build\n@@ -3,7 +3,7 @@\n #\n \n deps += ['rawdev', 'ring', 'kvargs', 'bus_pci', 'common_octeontx2', 'mempool_octeontx2']\n-sources = files('otx2_dpi_rawdev.c')\n+sources = files('otx2_dpi_rawdev.c', 'otx2_dpi_msg.c')\n \n extra_flags = []\n # This integrated controller runs only on a arm64 machine, remove 32bit warnings\ndiff --git a/drivers/raw/octeontx2_dma/otx2_dpi_msg.c b/drivers/raw/octeontx2_dma/otx2_dpi_msg.c\nnew file mode 100644\nindex 000000000..aa361cb8a\n--- /dev/null\n+++ b/drivers/raw/octeontx2_dma/otx2_dpi_msg.c\n@@ -0,0 +1,105 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2019 Marvell International Ltd.\n+ */\n+\n+#ifndef _DPI_MSG_H_\n+#define _DPI_MSG_H_\n+\n+#include <dirent.h>\n+#include <fcntl.h>\n+#include <string.h>\n+#include <unistd.h>\n+\n+#include \"otx2_dpi_rawdev.h\"\n+\n+/* DPI PF DBDF information macro's */\n+#define DPI_PF_DBDF_DOMAIN      0\n+#define DPI_PF_DBDF_BUS         5\n+#define DPI_PF_DBDF_DEVICE      0\n+#define DPI_PF_DBDF_FUNCTION    0\n+\n+#define DPI_PF_MBOX_SYSFS_ENTRY \"dpi_device_config\"\n+\n+union dpi_mbox_message_u {\n+\tuint64_t u[2];\n+\tstruct dpi_mbox_message_s {\n+\t\t/* VF ID to configure */\n+\t\tuint64_t vfid           :4;\n+\t\t/* Command code */\n+\t\tuint64_t cmd            :4;\n+\t\t/* Command buffer size in 8-byte words */\n+\t\tuint64_t csize          :14;\n+\t\t/* aura of the command buffer */\n+\t\tuint64_t aura           :20;\n+\t\t/* SSO PF function */\n+\t\tuint64_t sso_pf_func    :16;\n+\t\t/* NPA PF function */\n+\t\tuint64_t npa_pf_func    :16;\n+\t} s;\n+};\n+\n+static inline int\n+send_msg_to_pf(const char *value, int size)\n+{\n+\tchar buff[255] = { 0 };\n+\tint res, fd;\n+\n+\tres = snprintf(buff, sizeof(buff), \"%s/\" PCI_PRI_FMT \"/%s\",\n+\t\t       rte_pci_get_sysfs_path(), DPI_PF_DBDF_DOMAIN,\n+\t\t       DPI_PF_DBDF_BUS, DPI_PF_DBDF_DEVICE & 0x7,\n+\t\t       DPI_PF_DBDF_FUNCTION & 0x7, DPI_PF_MBOX_SYSFS_ENTRY);\n+\tif ((res < 0) || ((size_t)res > sizeof(buff)))\n+\t\treturn -ERANGE;\n+\n+\tfd = open(buff, O_WRONLY);\n+\tif (fd < 0)\n+\t\treturn -EACCES;\n+\tres = write(fd, value, size);\n+\tclose(fd);\n+\tif (res < 0)\n+\t\treturn -EACCES;\n+\n+\treturn 0;\n+}\n+\n+int\n+otx2_dpi_queue_open(uint16_t vf_id, uint32_t size, uint32_t gaura)\n+{\n+\tunion dpi_mbox_message_u mbox_msg;\n+\tint ret = 0;\n+\n+\t/* DPI PF driver expects vfid starts from index 0 */\n+\tmbox_msg.s.vfid = vf_id;\n+\tmbox_msg.s.cmd = DPI_QUEUE_OPEN;\n+\tmbox_msg.s.csize = size;\n+\tmbox_msg.s.aura = gaura;\n+\tmbox_msg.s.sso_pf_func = otx2_sso_pf_func_get();\n+\tmbox_msg.s.npa_pf_func = otx2_npa_pf_func_get();\n+\n+\tret = send_msg_to_pf((const char *)&mbox_msg,\n+\t\t\t\tsizeof(mbox_msg));\n+\tif (ret < 0)\n+\t\totx2_dpi_dbg(\"Failed to send mbox message to dpi pf\");\n+\n+\treturn ret;\n+}\n+\n+int\n+otx2_dpi_queue_close(uint16_t vf_id)\n+{\n+\tunion dpi_mbox_message_u mbox_msg;\n+\tint ret = 0;\n+\n+\t/* DPI PF driver expects vfid starts from index 0 */\n+\tmbox_msg.s.vfid = vf_id;\n+\tmbox_msg.s.cmd = DPI_QUEUE_CLOSE;\n+\n+\tret = send_msg_to_pf((const char *)&mbox_msg,\n+\t\t\t\tsizeof(mbox_msg));\n+\tif (ret < 0)\n+\t\totx2_dpi_dbg(\"Failed to send mbox message to dpi pf\");\n+\n+\treturn ret;\n+}\n+\n+#endif /* _DPI_MSG_H_ */\ndiff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c\nindex f9560abcc..b418dc5bb 100644\n--- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c\n+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c\n@@ -29,6 +29,59 @@ static const struct rte_pci_id pci_dma_map[] = {\n \t},\n };\n \n+/* Enable/Disable DMA queue */\n+static inline int\n+dma_engine_enb_dis(struct dpi_vf_s *dpivf, const bool enb)\n+{\n+\tif (enb)\n+\t\totx2_write64(0x1, dpivf->vf_bar0 + DPI_VDMA_EN);\n+\telse\n+\t\totx2_write64(0x0, dpivf->vf_bar0 + DPI_VDMA_EN);\n+\n+\treturn DPI_DMA_QUEUE_SUCCESS;\n+}\n+\n+static int\n+otx2_dpi_rawdev_configure(const struct rte_rawdev *dev, rte_rawdev_obj_t config)\n+{\n+\tstruct dpi_rawdev_conf_s *conf = config;\n+\tstruct dpi_vf_s *dpivf = NULL;\n+\tvoid *buf = NULL;\n+\tuintptr_t pool;\n+\tuint32_t gaura;\n+\n+\tif (conf == NULL) {\n+\t\totx2_dpi_dbg(\"NULL configuration\");\n+\t\treturn -EINVAL;\n+\t}\n+\tdpivf = (struct dpi_vf_s *)dev->dev_private;\n+\tdpivf->chunk_pool = conf->chunk_pool;\n+\tif (rte_mempool_get(conf->chunk_pool, &buf) || (buf == NULL)) {\n+\t\totx2_err(\"Unable allocate buffer\");\n+\t\treturn -ENODEV;\n+\t}\n+\tdpivf->base_ptr = buf;\n+\totx2_write64(0x0, dpivf->vf_bar0 + DPI_VDMA_EN);\n+\tdpivf->pool_size_m1 = (DPI_CHUNK_SIZE >> 3) - 2;\n+\tpool = (uintptr_t)((struct rte_mempool *)conf->chunk_pool)->pool_id;\n+\tgaura = npa_lf_aura_handle_to_aura(pool);\n+\totx2_write64(0, dpivf->vf_bar0 + DPI_VDMA_REQQ_CTL);\n+\totx2_write64(((uint64_t)buf >> 7) << 7,\n+\t\t     dpivf->vf_bar0 + DPI_VDMA_SADDR);\n+\tif (otx2_dpi_queue_open(dpivf->vf_id, DPI_CHUNK_SIZE, gaura) < 0) {\n+\t\totx2_err(\"Unable to open DPI VF %d\", dpivf->vf_id);\n+\t\trte_mempool_put(conf->chunk_pool, buf);\n+\t\treturn -EACCES;\n+\t}\n+\tdma_engine_enb_dis(dpivf, true);\n+\n+\treturn DPI_DMA_QUEUE_SUCCESS;\n+}\n+\n+static const struct rte_rawdev_ops dpi_rawdev_ops = {\n+\t.dev_configure = otx2_dpi_rawdev_configure,\n+};\n+\n static int\n otx2_dpi_rawdev_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \t\t      struct rte_pci_device *pci_dev)\n@@ -61,6 +114,7 @@ otx2_dpi_rawdev_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \t\treturn -EINVAL;\n \t}\n \n+\trawdev->dev_ops = &dpi_rawdev_ops;\n \trawdev->device = &pci_dev->device;\n \trawdev->driver_name = pci_dev->driver->driver.name;\n \ndiff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h\nindex 33fd95c33..918ae725a 100644\n--- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h\n+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h\n@@ -56,4 +56,7 @@ enum dpi_dma_queue_result_e {\n \tDPI_DMA_QUEUE_INVALID_PARAM = -2,\n };\n \n+int otx2_dpi_queue_open(uint16_t vf_id, uint32_t size, uint32_t gaura);\n+int otx2_dpi_queue_close(uint16_t vf_id);\n+\n #endif /* _DPI_RAWDEV_H_ */\n",
    "prefixes": [
        "v1",
        "3/9"
    ]
}