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put:
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GET /api/patches/53271/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 53271,
    "url": "http://patches.dpdk.org/api/patches/53271/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190504092939.25326-3-qi.z.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190504092939.25326-3-qi.z.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190504092939.25326-3-qi.z.zhang@intel.com",
    "date": "2019-05-04T09:29:38",
    "name": "[2/3] net/ice: fix invalid Tx threshold setup",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "5e657e31fe6b0f895c5337d98ded6392a16f9672",
    "submitter": {
        "id": 504,
        "url": "http://patches.dpdk.org/api/people/504/?format=api",
        "name": "Qi Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "http://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190504092939.25326-3-qi.z.zhang@intel.com/mbox/",
    "series": [
        {
            "id": 4562,
            "url": "http://patches.dpdk.org/api/series/4562/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4562",
            "date": "2019-05-04T09:29:36",
            "name": "fix invalid Tx threshhold setup",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/4562/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/53271/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/53271/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B094C2BF2;\n\tSat,  4 May 2019 11:27:41 +0200 (CEST)",
            "from mga06.intel.com (mga06.intel.com [134.134.136.31])\n\tby dpdk.org (Postfix) with ESMTP id 287FD1041;\n\tSat,  4 May 2019 11:27:37 +0200 (CEST)",
            "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t04 May 2019 02:27:36 -0700",
            "from dpdk51.sh.intel.com ([10.67.110.245])\n\tby orsmga001.jf.intel.com with ESMTP; 04 May 2019 02:27:35 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.60,429,1549958400\"; d=\"scan'208\";a=\"229226664\"",
        "From": "Qi Zhang <qi.z.zhang@intel.com>",
        "To": "beilei.xing@intel.com, wenzhuo.lu@intel.com, qiming.yang@intel.com,\n\tkonstantin.ananyev@intel.com",
        "Cc": "dev@dpdk.org,\n\tQi Zhang <qi.z.zhang@intel.com>,\n\tstable@dpdk.org",
        "Date": "Sat,  4 May 2019 17:29:38 +0800",
        "Message-Id": "<20190504092939.25326-3-qi.z.zhang@intel.com>",
        "X-Mailer": "git-send-email 2.13.6",
        "In-Reply-To": "<20190504092939.25326-1-qi.z.zhang@intel.com>",
        "References": "<20190504092939.25326-1-qi.z.zhang@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 2/3] net/ice: fix invalid Tx threshold setup",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Tx desc's DD status is not cleaned by NIC automatically after packets\nhave been transmitted until software refill a new packet during next\nloop. So when tx_free_thresh + tx_rs_thresh > nb_desc, it is possible\nthat an outdated DD status be checked as tx_next_dd, then segment fault\nhappen due to free a NULL mbuf pointer.\n\nThen patch fixes this issue by\n1. try to adapt tx_rs_thresh to an aggresive tx_free_thresh.\n2. queue setup fail when tx_free_thresh + tx_rs_thresh > nb_desc\n\nFixes: 50370662b727 (\"net/ice: support device and queue ops\")\nCc: stable@dpdk.org\n\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/ice_rxtx.c | 21 ++++++++++++++++++---\n 1 file changed, 18 insertions(+), 3 deletions(-)",
    "diff": "diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c\nindex ace766b1d..620a5ea2b 100644\n--- a/drivers/net/ice/ice_rxtx.c\n+++ b/drivers/net/ice/ice_rxtx.c\n@@ -764,17 +764,32 @@ ice_tx_queue_setup(struct rte_eth_dev *dev,\n \t *  - tx_rs_thresh must be a divisor of the ring size.\n \t *  - tx_free_thresh must be greater than 0.\n \t *  - tx_free_thresh must be less than the size of the ring minus 3.\n+\t *  - tx_free_thresh + tx_rs_thresh must not exceed nb_desc.\n \t *\n \t * One descriptor in the TX ring is used as a sentinel to avoid a H/W\n \t * race condition, hence the maximum threshold constraints. When set\n \t * to zero use default values.\n \t */\n-\ttx_rs_thresh = (uint16_t)(tx_conf->tx_rs_thresh ?\n-\t\t\t\t  tx_conf->tx_rs_thresh :\n-\t\t\t\t  ICE_DEFAULT_TX_RSBIT_THRESH);\n \ttx_free_thresh = (uint16_t)(tx_conf->tx_free_thresh ?\n \t\t\t\t    tx_conf->tx_free_thresh :\n \t\t\t\t    ICE_DEFAULT_TX_FREE_THRESH);\n+\t/* force tx_rs_thresh to adapt an aggresive tx_free_thresh */\n+\ttx_rs_thresh =\n+\t\t(ICE_DEFAULT_TX_RSBIT_THRESH + tx_free_thresh > nb_desc) ?\n+\t\t\tnb_desc - tx_free_thresh : ICE_DEFAULT_TX_RSBIT_THRESH;\n+\tif (tx_conf->tx_rs_thresh)\n+\t\ttx_rs_thresh = tx_conf->tx_rs_thresh;\n+\tif (tx_rs_thresh + tx_free_thresh > nb_desc) {\n+\t\tPMD_INIT_LOG(ERR, \"tx_rs_thresh + tx_free_thresh must not \"\n+\t\t\t\t\"exceed nb_desc. (tx_rs_thresh=%u \"\n+\t\t\t\t\"tx_free_thresh=%u nb_desc=%u port = %d queue=%d)\",\n+\t\t\t\t(unsigned int)tx_rs_thresh,\n+\t\t\t\t(unsigned int)tx_free_thresh,\n+\t\t\t\t(unsigned int)nb_desc,\n+\t\t\t\t(int)dev->data->port_id,\n+\t\t\t\t(int)queue_idx);\n+\t\treturn -EINVAL;\n+\t}\n \tif (tx_rs_thresh >= (nb_desc - 2)) {\n \t\tPMD_INIT_LOG(ERR, \"tx_rs_thresh must be less than the \"\n \t\t\t     \"number of TX descriptors minus 2. \"\n",
    "prefixes": [
        "2/3"
    ]
}