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GET /api/patches/51923/?format=api
{ "id": 51923, "url": "http://patches.dpdk.org/api/patches/51923/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1553875099-166351-13-git-send-email-rosen.xu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1553875099-166351-13-git-send-email-rosen.xu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1553875099-166351-13-git-send-email-rosen.xu@intel.com", "date": "2019-03-29T15:58:16", "name": "[v2,12/15] raw/ifpga/base: add device tree support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e3c090cdd1c28ea3b044914203ee3ea8b7fe9a97", "submitter": { "id": 946, "url": "http://patches.dpdk.org/api/people/946/?format=api", "name": "Xu, Rosen", "email": "rosen.xu@intel.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1553875099-166351-13-git-send-email-rosen.xu@intel.com/mbox/", "series": [ { "id": 4000, "url": "http://patches.dpdk.org/api/series/4000/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=4000", "date": "2019-03-29T15:58:04", "name": "Add patch set for IPN3KE", "version": 2, "mbox": "http://patches.dpdk.org/series/4000/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/51923/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/51923/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D215B5A6E;\n\tFri, 29 Mar 2019 17:00:49 +0100 (CET)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n\tby dpdk.org (Postfix) with ESMTP id E2EE15398\n\tfor <dev@dpdk.org>; Fri, 29 Mar 2019 17:00:34 +0100 (CET)", "from fmsmga004.fm.intel.com ([10.253.24.48])\n\tby orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t29 Mar 2019 09:00:34 -0700", "from dpdkx8602.sh.intel.com ([10.67.110.200])\n\tby fmsmga004.fm.intel.com with ESMTP; 29 Mar 2019 09:00:32 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.60,284,1549958400\"; d=\"scan'208\";a=\"156993188\"", "From": "Rosen Xu <rosen.xu@intel.com>", "To": "dev@dpdk.org", "Cc": "ferruh.yigit@intel.com, tianfei.zhang@intel.com, dan.wei@intel.com,\n\trosen.xu@intel.com, andy.pei@intel.com, qiming.yang@intel.com,\n\thaiyue.wang@intel.com, santos.chen@intel.com, zhang.zhang@intel.com", "Date": "Fri, 29 Mar 2019 23:58:16 +0800", "Message-Id": "<1553875099-166351-13-git-send-email-rosen.xu@intel.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1553875099-166351-1-git-send-email-rosen.xu@intel.com>", "References": "<1551338000-120348-1-git-send-email-rosen.xu@intel.com>\n\t<1553875099-166351-1-git-send-email-rosen.xu@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 12/15] raw/ifpga/base: add device tree support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: \"Zhang, Tianfei\" <tianfei.zhang@intel.com>\n\nIn PAC N3000 card, there is using device tree to descript the\nboard info and sensor device info.\n\nAdd device tree support by using libfdt library in Linux distribution.\n\nThe end-user should pre-install the libfdt and libfdt-devel package.\n\nSigned-off-by: Zhang, Tianfei <tianfei.zhang@intel.com>\n---\n drivers/raw/ifpga_rawdev/base/Makefile | 2 +\n drivers/raw/ifpga_rawdev/base/opae_intel_max10.c | 183 +++++++++++++++++++++++\n drivers/raw/ifpga_rawdev/base/opae_intel_max10.h | 10 ++\n 3 files changed, 195 insertions(+)", "diff": "diff --git a/drivers/raw/ifpga_rawdev/base/Makefile b/drivers/raw/ifpga_rawdev/base/Makefile\nindex c5bbcbd..86815b4 100644\n--- a/drivers/raw/ifpga_rawdev/base/Makefile\n+++ b/drivers/raw/ifpga_rawdev/base/Makefile\n@@ -8,6 +8,7 @@ OSDEP := osdep_raw\n endif\n \n CFLAGS += -I$(RTE_SDK)/drivers/raw/ifpga_rawdev/base/$(OSDEP)\n+CFLAGS += -I libfdt\n \n SRCS-y += ifpga_api.c\n SRCS-y += ifpga_enumerate.c\n@@ -30,3 +31,4 @@ SRCS-y += opae_at24_eeprom.c\n SRCS-y += opae_eth_group.c\n \n SRCS-y += $(wildcard $(SRCDIR)/base/$(OSDEP)/*.c)\n+LDLIBS += -lfdt\ndiff --git a/drivers/raw/ifpga_rawdev/base/opae_intel_max10.c b/drivers/raw/ifpga_rawdev/base/opae_intel_max10.c\nindex f354ee4..6b624aa 100644\n--- a/drivers/raw/ifpga_rawdev/base/opae_intel_max10.c\n+++ b/drivers/raw/ifpga_rawdev/base/opae_intel_max10.c\n@@ -3,6 +3,7 @@\n */\n \n #include \"opae_intel_max10.h\"\n+#include <libfdt.h>\n \n static struct intel_max10_device *g_max10;\n \n@@ -24,6 +25,174 @@ int max10_reg_write(unsigned int reg, unsigned int val)\n \t\t\treg, 4, (unsigned char *)&val);\n }\n \n+static struct max10_compatible_id max10_id_table[] = {\n+\t{.compatible = MAX10_PAC,},\n+\t{.compatible = MAX10_PAC_N3000,},\n+\t{.compatible = MAX10_PAC_END,}\n+};\n+\n+static struct max10_compatible_id *max10_match_compatible(const char *fdt_root)\n+{\n+\tstruct max10_compatible_id *id = max10_id_table;\n+\n+\tfor (; strcmp(id->compatible, MAX10_PAC_END); id++) {\n+\t\tif (fdt_node_check_compatible(fdt_root, 0, id->compatible))\n+\t\t\tcontinue;\n+\n+\t\treturn id;\n+\t}\n+\n+\treturn NULL;\n+}\n+\n+static inline bool\n+is_max10_pac_n3000(struct intel_max10_device *max10)\n+{\n+\treturn max10->id && !strcmp(max10->id->compatible,\n+\t\t\tMAX10_PAC_N3000);\n+}\n+\n+static void max10_check_capability(struct intel_max10_device *max10)\n+{\n+\tif (!max10->fdt_root)\n+\t\treturn;\n+\n+\tif (is_max10_pac_n3000(max10)) {\n+\t\tmax10->flags |= MAX10_FLAGS_NO_I2C2 |\n+\t\t\t\tMAX10_FLAGS_NO_BMCIMG_FLASH;\n+\t\tdev_info(max10, \"found %s card\\n\", max10->id->compatible);\n+\t}\n+}\n+\n+static int altera_nor_flash_read(u32 offset,\n+\t\tvoid *buffer, u32 len)\n+{\n+\tint word_len;\n+\tint i;\n+\tunsigned int *buf = (unsigned int *)buffer;\n+\tunsigned int value;\n+\tint ret;\n+\n+\tif (!buffer || len <= 0)\n+\t\treturn -ENODEV;\n+\n+\tword_len = len/4;\n+\n+\tfor (i = 0; i < word_len; i++) {\n+\t\tret = max10_reg_read(FLASH_BASE + offset + i*4,\n+\t\t\t\t&value);\n+\t\tif (ret)\n+\t\t\treturn -EBUSY;\n+\n+\t\t*buf++ = value;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int enable_nor_flash(bool on)\n+{\n+\tunsigned int val = 0;\n+\tint ret;\n+\n+\tret = max10_reg_read(RSU_REG_OFF, &val);\n+\tif (ret) {\n+\t\tdev_err(NULL \"enabling flash error\\n\");\n+\t\treturn ret;\n+\t}\n+\n+\tif (on)\n+\t\tval |= RSU_ENABLE;\n+\telse\n+\t\tval &= ~RSU_ENABLE;\n+\n+\treturn max10_reg_write(RSU_REG_OFF, val);\n+}\n+\n+static int init_max10_device_table(struct intel_max10_device *max10)\n+{\n+\tstruct max10_compatible_id *id;\n+\tstruct fdt_header hdr;\n+\tchar *fdt_root = NULL;\n+\n+\tu32 dt_size, dt_addr, val;\n+\tint ret;\n+\n+\tret = max10_reg_read(DT_AVAIL_REG_OFF, &val);\n+\tif (ret) {\n+\t\tdev_err(max10 \"cannot read DT_AVAIL_REG\\n\");\n+\t\treturn ret;\n+\t}\n+\n+\tif (!(val & DT_AVAIL)) {\n+\t\tdev_err(max10 \"DT not available\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tret = max10_reg_read(DT_BASE_ADDR_REG_OFF, &dt_addr);\n+\tif (ret) {\n+\t\tdev_info(max10 \"cannot get base addr of device table\\n\");\n+\t\treturn ret;\n+\t}\n+\n+\tret = enable_nor_flash(true);\n+\tif (ret) {\n+\t\tdev_err(max10 \"fail to enable flash\\n\");\n+\t\treturn ret;\n+\t}\n+\n+\tret = altera_nor_flash_read(dt_addr, &hdr, sizeof(hdr));\n+\tif (ret) {\n+\t\tdev_err(max10 \"read fdt header fail\\n\");\n+\t\tgoto done;\n+\t}\n+\n+\tret = fdt_check_header(&hdr);\n+\tif (ret) {\n+\t\tdev_err(max10 \"check fdt header fail\\n\");\n+\t\tgoto done;\n+\t}\n+\n+\tdt_size = fdt_totalsize(&hdr);\n+\tif (dt_size > DFT_MAX_SIZE) {\n+\t\tdev_err(max10 \"invalid device table size\\n\");\n+\t\tret = -EINVAL;\n+\t\tgoto done;\n+\t}\n+\n+\tfdt_root = opae_malloc(dt_size);\n+\tif (!fdt_root) {\n+\t\tret = -ENOMEM;\n+\t\tgoto done;\n+\t}\n+\n+\tret = altera_nor_flash_read(dt_addr, fdt_root, dt_size);\n+\tif (ret) {\n+\t\tdev_err(max10 \"cannot read device table\\n\");\n+\t\tgoto done;\n+\t}\n+\n+\tid = max10_match_compatible(fdt_root);\n+\tif (!id) {\n+\t\tdev_err(max10 \"max10 compatible not found\\n\");\n+\t\tret = -ENODEV;\n+\t\tgoto done;\n+\t}\n+\n+\tmax10->flags |= MAX10_FLAGS_DEVICE_TABLE;\n+\n+\tmax10->id = id;\n+\tmax10->fdt_root = fdt_root;\n+\n+done:\n+\tret = enable_nor_flash(false);\n+\n+\tif (ret && fdt_root)\n+\t\topae_free(fdt_root);\n+\n+\treturn ret;\n+}\n+\n struct intel_max10_device *\n intel_max10_device_probe(struct altera_spi_device *spi,\n \t\tint chipselect)\n@@ -47,6 +216,15 @@ struct intel_max10_device *\n \t/* set the max10 device firstly */\n \tg_max10 = dev;\n \n+\t/* init the MAX10 device table */\n+\tret = init_max10_device_table(dev);\n+\tif (ret) {\n+\t\tdev_err(dev, \"init max10 device table fail\\n\");\n+\t\tgoto free_dev;\n+\t}\n+\n+\tmax10_check_capability(dev);\n+\n \t/* read FPGA loading information */\n \tret = max10_reg_read(FPGA_PAGE_INFO_OFF, &val);\n \tif (ret) {\n@@ -65,6 +243,8 @@ struct intel_max10_device *\n \treturn dev;\n \n spi_tran_fail:\n+\tif (dev->fdt_root)\n+\t\topae_free(dev->fdt_root);\n \tspi_transaction_remove(dev->spi_tran_dev);\n free_dev:\n \tg_max10 = NULL;\n@@ -81,6 +261,9 @@ int intel_max10_device_remove(struct intel_max10_device *dev)\n \tif (dev->spi_tran_dev)\n \t\tspi_transaction_remove(dev->spi_tran_dev);\n \n+\tif (dev->fdt_root)\n+\t\topae_free(dev->fdt_root);\n+\n \tg_max10 = NULL;\n \topae_free(dev);\n \ndiff --git a/drivers/raw/ifpga_rawdev/base/opae_intel_max10.h b/drivers/raw/ifpga_rawdev/base/opae_intel_max10.h\nindex 08b387e..a52b63e 100644\n--- a/drivers/raw/ifpga_rawdev/base/opae_intel_max10.h\n+++ b/drivers/raw/ifpga_rawdev/base/opae_intel_max10.h\n@@ -8,6 +8,14 @@\n #include \"opae_osdep.h\"\n #include \"opae_spi.h\"\n \n+struct max10_compatible_id {\n+\tchar compatible[128];\n+};\n+\n+#define MAX10_PAC\t\"intel,max10\"\n+#define MAX10_PAC_N3000\t\"intel,max10-pac-n3000\"\n+#define MAX10_PAC_END \"intel,end\"\n+\n /* max10 capability flags */\n #define MAX10_FLAGS_NO_I2C2\t\tBIT(0)\n #define MAX10_FLAGS_NO_BMCIMG_FLASH\tBIT(1)\n@@ -20,6 +28,8 @@ struct intel_max10_device {\n \tunsigned int flags; /*max10 hardware capability*/\n \tstruct altera_spi_device *spi_master;\n \tstruct spi_transaction_dev *spi_tran_dev;\n+\tstruct max10_compatible_id *id; /*max10 compatible*/\n+\tchar *fdt_root;\n };\n \n /* retimer speed */\n", "prefixes": [ "v2", "12/15" ] }