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GET /api/patches/51783/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 51783,
    "url": "http://patches.dpdk.org/api/patches/51783/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190327111720.13732-2-arkadiuszx.kusztal@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190327111720.13732-2-arkadiuszx.kusztal@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190327111720.13732-2-arkadiuszx.kusztal@intel.com",
    "date": "2019-03-27T11:17:17",
    "name": "[v4,1/4] common/qat: add headers for asymmetric crypto",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "6657dede25ff3794aed344769b0ba867db50c5fd",
    "submitter": {
        "id": 452,
        "url": "http://patches.dpdk.org/api/people/452/?format=api",
        "name": "Arkadiusz Kusztal",
        "email": "arkadiuszx.kusztal@intel.com"
    },
    "delegate": {
        "id": 6690,
        "url": "http://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190327111720.13732-2-arkadiuszx.kusztal@intel.com/mbox/",
    "series": [
        {
            "id": 3944,
            "url": "http://patches.dpdk.org/api/series/3944/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=3944",
            "date": "2019-03-27T11:17:16",
            "name": "Add PMD for asymmetric cryptography operations using Intel QuickAssist Technology devices",
            "version": 4,
            "mbox": "http://patches.dpdk.org/series/3944/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/51783/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/51783/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 473B45F21;\n\tWed, 27 Mar 2019 12:21:08 +0100 (CET)",
            "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby dpdk.org (Postfix) with ESMTP id B945D5B26\n\tfor <dev@dpdk.org>; Wed, 27 Mar 2019 12:21:05 +0100 (CET)",
            "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t27 Mar 2019 04:21:04 -0700",
            "from akusztax-mobl.ger.corp.intel.com ([10.104.116.172])\n\tby fmsmga002.fm.intel.com with ESMTP; 27 Mar 2019 04:21:01 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.60,276,1549958400\"; d=\"scan'208\";a=\"155639827\"",
        "From": "Arek Kusztal <arkadiuszx.kusztal@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "akhil.goyal@nxp.com, fiona.trahe@intel.com,\n\tArek Kusztal <arkadiuszx.kusztal@intel.com>",
        "Date": "Wed, 27 Mar 2019 12:17:17 +0100",
        "Message-Id": "<20190327111720.13732-2-arkadiuszx.kusztal@intel.com>",
        "X-Mailer": "git-send-email 2.19.1.windows.1",
        "In-Reply-To": "<20190327111720.13732-1-arkadiuszx.kusztal@intel.com>",
        "References": "<20190327111720.13732-1-arkadiuszx.kusztal@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH v4 1/4] common/qat: add headers for asymmetric\n\tcrypto",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "This commit adds headers to be used in conjunction with asymmetric\ncryptography operations using Intel QuickAssist Technology driver\n\nSigned-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>\n---\n drivers/common/qat/qat_adf/icp_qat_fw_mmp_ids.h    | 1538 ++++++++++++++++++++\n drivers/common/qat/qat_adf/icp_qat_fw_pke.h        |  426 ++++++\n .../qat/qat_adf/qat_pke_functionality_arrays.h     |   52 +\n 3 files changed, 2016 insertions(+)\n create mode 100644 drivers/common/qat/qat_adf/icp_qat_fw_mmp_ids.h\n create mode 100644 drivers/common/qat/qat_adf/icp_qat_fw_pke.h\n create mode 100644 drivers/common/qat/qat_adf/qat_pke_functionality_arrays.h",
    "diff": "diff --git a/drivers/common/qat/qat_adf/icp_qat_fw_mmp_ids.h b/drivers/common/qat/qat_adf/icp_qat_fw_mmp_ids.h\nnew file mode 100644\nindex 0000000..d9a42dd\n--- /dev/null\n+++ b/drivers/common/qat/qat_adf/icp_qat_fw_mmp_ids.h\n@@ -0,0 +1,1538 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019 Intel Corporation\n+ */\n+\n+/**\n+ * @file icp_qat_fw_mmp_ids.h\n+ * @ingroup icp_qat_fw_mmp\n+ * @brief\n+ *      This file documents the external interfaces that the QAT FW running\n+ *      on the QAT Acceleration Engine provides to clients wanting to\n+ *      accelerate crypto assymetric applications\n+ */\n+\n+#ifndef _ICP_QAT_FW_MMP_IDS_\n+#define _ICP_QAT_FW_MMP_IDS_\n+\n+#define PKE_INIT 0x09061a09\n+/**< Functionality ID for Initialisation sequence\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_init_input::z z @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_init_output::zz zz @endlink\n+ */\n+#define PKE_DH_G2_768 0x1c0b1a10\n+/**< Functionality ID for Diffie-Hellman Modular exponentiation base 2 for\n+ *768-bit numbers\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_dh_g2_768_input::e e\n+ * @endlink @link icp_qat_fw_mmp_dh_g2_768_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dh_g2_768_output::r r\n+ * @endlink\n+ */\n+#define PKE_DH_768 0x210c1a1b\n+/**< Functionality ID for Diffie-Hellman Modular exponentiation for 768-bit\n+ *numbers\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_dh_768_input::g g @endlink\n+ * @link icp_qat_fw_mmp_dh_768_input::e e @endlink @link\n+ * icp_qat_fw_mmp_dh_768_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dh_768_output::r r @endlink\n+ */\n+#define PKE_DH_G2_1024 0x220b1a27\n+/**< Functionality ID for Diffie-Hellman Modular exponentiation base 2 for\n+ * 1024-bit numbers\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_dh_g2_1024_input::e e\n+ * @endlink @link icp_qat_fw_mmp_dh_g2_1024_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dh_g2_1024_output::r r\n+ * @endlink\n+ */\n+#define PKE_DH_1024 0x290c1a32\n+/**< Functionality ID for Diffie-Hellman Modular exponentiation for 1024-bit\n+ * numbers\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_dh_1024_input::g g @endlink\n+ * @link icp_qat_fw_mmp_dh_1024_input::e e @endlink @link\n+ * icp_qat_fw_mmp_dh_1024_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dh_1024_output::r r @endlink\n+ */\n+#define PKE_DH_G2_1536 0x2e0b1a3e\n+/**< Functionality ID for Diffie-Hellman Modular exponentiation base 2 for\n+ * 1536-bit numbers\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_dh_g2_1536_input::e e\n+ * @endlink @link icp_qat_fw_mmp_dh_g2_1536_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dh_g2_1536_output::r r\n+ * @endlink\n+ */\n+#define PKE_DH_1536 0x390c1a49\n+/**< Functionality ID for Diffie-Hellman Modular exponentiation for 1536-bit\n+ * numbers\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_dh_1536_input::g g @endlink\n+ * @link icp_qat_fw_mmp_dh_1536_input::e e @endlink @link\n+ * icp_qat_fw_mmp_dh_1536_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dh_1536_output::r r @endlink\n+ */\n+#define PKE_DH_G2_2048 0x3e0b1a55\n+/**< Functionality ID for Diffie-Hellman Modular exponentiation base 2 for\n+ * 2048-bit numbers\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_dh_g2_2048_input::e e\n+ * @endlink @link icp_qat_fw_mmp_dh_g2_2048_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dh_g2_2048_output::r r\n+ * @endlink\n+ */\n+#define PKE_DH_2048 0x4d0c1a60\n+/**< Functionality ID for Diffie-Hellman Modular exponentiation for 2048-bit\n+ * numbers\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_dh_2048_input::g g @endlink\n+ * @link icp_qat_fw_mmp_dh_2048_input::e e @endlink @link\n+ * icp_qat_fw_mmp_dh_2048_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dh_2048_output::r r @endlink\n+ */\n+#define PKE_DH_G2_3072 0x3a0b1a6c\n+/**< Functionality ID for Diffie-Hellman Modular exponentiation base 2 for\n+ * 3072-bit numbers\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_dh_g2_3072_input::e e\n+ * @endlink @link icp_qat_fw_mmp_dh_g2_3072_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dh_g2_3072_output::r r\n+ * @endlink\n+ */\n+#define PKE_DH_3072 0x510c1a77\n+/**< Functionality ID for Diffie-Hellman Modular exponentiation for 3072-bit\n+ * numbers\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_dh_3072_input::g g @endlink\n+ * @link icp_qat_fw_mmp_dh_3072_input::e e @endlink @link\n+ * icp_qat_fw_mmp_dh_3072_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dh_3072_output::r r @endlink\n+ */\n+#define PKE_DH_G2_4096 0x4a0b1a83\n+/**< Functionality ID for Diffie-Hellman Modular exponentiation base 2 for\n+ * 4096-bit numbers\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_dh_g2_4096_input::e e\n+ * @endlink @link icp_qat_fw_mmp_dh_g2_4096_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dh_g2_4096_output::r r\n+ * @endlink\n+ */\n+#define PKE_DH_4096 0x690c1a8e\n+/**< Functionality ID for Diffie-Hellman Modular exponentiation for 4096-bit\n+ * numbers\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_dh_4096_input::g g @endlink\n+ * @link icp_qat_fw_mmp_dh_4096_input::e e @endlink @link\n+ * icp_qat_fw_mmp_dh_4096_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dh_4096_output::r r @endlink\n+ */\n+#define PKE_RSA_KP1_512 0x191d1a9a\n+/**< Functionality ID for RSA 512 key generation first form\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp1_512_input::p p\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp1_512_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp1_512_input::e e @endlink\n+ * @li 2 output parameters : @link icp_qat_fw_mmp_rsa_kp1_512_output::n n\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp1_512_output::d d @endlink\n+ */\n+#define PKE_RSA_KP2_512 0x19401acc\n+/**< Functionality ID for RSA 512 key generation second form\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp2_512_input::p p\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp2_512_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_512_input::e e @endlink\n+ * @li 5 output parameters : @link icp_qat_fw_mmp_rsa_kp2_512_output::n n\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp2_512_output::d d @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_512_output::dp dp @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_512_output::dq dq @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_512_output::qinv qinv @endlink\n+ */\n+#define PKE_RSA_EP_512 0x1c161b21\n+/**< Functionality ID for RSA 512 Encryption\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_ep_512_input::m m\n+ * @endlink @link icp_qat_fw_mmp_rsa_ep_512_input::e e @endlink @link\n+ * icp_qat_fw_mmp_rsa_ep_512_input::n n @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_ep_512_output::c c\n+ * @endlink\n+ */\n+#define PKE_RSA_DP1_512 0x1c161b3c\n+/**< Functionality ID for RSA 512 Decryption\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_dp1_512_input::c c\n+ * @endlink @link icp_qat_fw_mmp_rsa_dp1_512_input::d d @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp1_512_input::n n @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp1_512_output::m m\n+ * @endlink\n+ */\n+#define PKE_RSA_DP2_512 0x1c131b57\n+/**< Functionality ID for RSA 1024 Decryption with CRT\n+ * @li 6 input parameters : @link icp_qat_fw_mmp_rsa_dp2_512_input::c c\n+ * @endlink @link icp_qat_fw_mmp_rsa_dp2_512_input::p p @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_512_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_512_input::dp dp @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_512_input::dq dq @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_512_input::qinv qinv @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp2_512_output::m m\n+ * @endlink\n+ */\n+#define PKE_RSA_KP1_1024 0x36181b71\n+/**< Functionality ID for RSA 1024 key generation first form\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp1_1024_input::p p\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp1_1024_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp1_1024_input::e e @endlink\n+ * @li 2 output parameters : @link icp_qat_fw_mmp_rsa_kp1_1024_output::n n\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp1_1024_output::d d @endlink\n+ */\n+#define PKE_RSA_KP2_1024 0x40451b9e\n+/**< Functionality ID for RSA 1024 key generation second form\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp2_1024_input::p p\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp2_1024_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_1024_input::e e @endlink\n+ * @li 5 output parameters : @link icp_qat_fw_mmp_rsa_kp2_1024_output::n n\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp2_1024_output::d d @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_1024_output::dp dp @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_1024_output::dq dq @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_1024_output::qinv qinv @endlink\n+ */\n+#define PKE_RSA_EP_1024 0x35111bf7\n+/**< Functionality ID for RSA 1024 Encryption\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_ep_1024_input::m m\n+ * @endlink @link icp_qat_fw_mmp_rsa_ep_1024_input::e e @endlink @link\n+ * icp_qat_fw_mmp_rsa_ep_1024_input::n n @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_ep_1024_output::c c\n+ * @endlink\n+ */\n+#define PKE_RSA_DP1_1024 0x35111c12\n+/**< Functionality ID for RSA 1024 Decryption\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_dp1_1024_input::c c\n+ * @endlink @link icp_qat_fw_mmp_rsa_dp1_1024_input::d d @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp1_1024_input::n n @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp1_1024_output::m m\n+ * @endlink\n+ */\n+#define PKE_RSA_DP2_1024 0x26131c2d\n+/**< Functionality ID for RSA 1024 Decryption with CRT\n+ * @li 6 input parameters : @link icp_qat_fw_mmp_rsa_dp2_1024_input::c c\n+ * @endlink @link icp_qat_fw_mmp_rsa_dp2_1024_input::p p @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_1024_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_1024_input::dp dp @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_1024_input::dq dq @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_1024_input::qinv qinv @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp2_1024_output::m m\n+ * @endlink\n+ */\n+#define PKE_RSA_KP1_1536 0x531d1c46\n+/**< Functionality ID for RSA 1536 key generation first form\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp1_1536_input::p p\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp1_1536_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp1_1536_input::e e @endlink\n+ * @li 2 output parameters : @link icp_qat_fw_mmp_rsa_kp1_1536_output::n n\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp1_1536_output::d d @endlink\n+ */\n+#define PKE_RSA_KP2_1536 0x32391c78\n+/**< Functionality ID for RSA 1536 key generation second form\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp2_1536_input::p p\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp2_1536_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_1536_input::e e @endlink\n+ * @li 5 output parameters : @link icp_qat_fw_mmp_rsa_kp2_1536_output::n n\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp2_1536_output::d d @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_1536_output::dp dp @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_1536_output::dq dq @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_1536_output::qinv qinv @endlink\n+ */\n+#define PKE_RSA_EP_1536 0x4d111cdc\n+/**< Functionality ID for RSA 1536 Encryption\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_ep_1536_input::m m\n+ * @endlink @link icp_qat_fw_mmp_rsa_ep_1536_input::e e @endlink @link\n+ * icp_qat_fw_mmp_rsa_ep_1536_input::n n @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_ep_1536_output::c c\n+ * @endlink\n+ */\n+#define PKE_RSA_DP1_1536 0x4d111cf7\n+/**< Functionality ID for RSA 1536 Decryption\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_dp1_1536_input::c c\n+ * @endlink @link icp_qat_fw_mmp_rsa_dp1_1536_input::d d @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp1_1536_input::n n @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp1_1536_output::m m\n+ *@endlink\n+ */\n+#define PKE_RSA_DP2_1536 0x45111d12\n+/**< Functionality ID for RSA 1536 Decryption with CRT\n+ * @li 6 input parameters : @link icp_qat_fw_mmp_rsa_dp2_1536_input::c c\n+ * @endlink @link icp_qat_fw_mmp_rsa_dp2_1536_input::p p @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_1536_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_1536_input::dp dp @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_1536_input::dq dq @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_1536_input::qinv qinv @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp2_1536_output::m m\n+ * @endlink\n+ */\n+#define PKE_RSA_KP1_2048 0x72181d2e\n+/**< Functionality ID for RSA 2048 key generation first form\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp1_2048_input::p p\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp1_2048_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp1_2048_input::e e @endlink\n+ * @li 2 output parameters : @link icp_qat_fw_mmp_rsa_kp1_2048_output::n n\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp1_2048_output::d d @endlink\n+ */\n+#define PKE_RSA_KP2_2048 0x42341d5b\n+/**< Functionality ID for RSA 2048 key generation second form\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp2_2048_input::p p\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp2_2048_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_2048_input::e e @endlink\n+ * @li 5 output parameters : @link icp_qat_fw_mmp_rsa_kp2_2048_output::n n\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp2_2048_output::d d @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_2048_output::dp dp @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_2048_output::dq dq @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_2048_output::qinv qinv @endlink\n+ */\n+#define PKE_RSA_EP_2048 0x6e111dba\n+/**< Functionality ID for RSA 2048 Encryption\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_ep_2048_input::m m\n+ * @endlink @link icp_qat_fw_mmp_rsa_ep_2048_input::e e @endlink @link\n+ * icp_qat_fw_mmp_rsa_ep_2048_input::n n @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_ep_2048_output::c c\n+ * @endlink\n+ */\n+#define PKE_RSA_DP1_2048 0x6e111dda\n+/**< Functionality ID for RSA 2048 Decryption\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_dp1_2048_input::c c\n+ * @endlink @link icp_qat_fw_mmp_rsa_dp1_2048_input::d d @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp1_2048_input::n n @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp1_2048_output::m m\n+ * @endlink\n+ */\n+#define PKE_RSA_DP2_2048 0x59121dfa\n+/**< Functionality ID for RSA 2048 Decryption with CRT\n+ * @li 6 input parameters : @link icp_qat_fw_mmp_rsa_dp2_2048_input::c c\n+ * @endlink @link icp_qat_fw_mmp_rsa_dp2_2048_input::p p @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_2048_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_2048_input::dp dp @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_2048_input::dq dq @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_2048_input::qinv qinv @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp2_2048_output::m m\n+ * @endlink\n+ */\n+#define PKE_RSA_KP1_3072 0x60191e16\n+/**< Functionality ID for RSA 3072 key generation first form\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp1_3072_input::p p\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp1_3072_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp1_3072_input::e e @endlink\n+ * @li 2 output parameters : @link icp_qat_fw_mmp_rsa_kp1_3072_output::n n\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp1_3072_output::d d @endlink\n+ */\n+#define PKE_RSA_KP2_3072 0x68331e45\n+/**< Functionality ID for RSA 3072 key generation second form\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp2_3072_input::p p\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp2_3072_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_3072_input::e e @endlink\n+ * @li 5 output parameters : @link icp_qat_fw_mmp_rsa_kp2_3072_output::n n\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp2_3072_output::d d @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_3072_output::dp dp @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_3072_output::dq dq @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_3072_output::qinv qinv @endlink\n+ */\n+#define PKE_RSA_EP_3072 0x7d111ea3\n+/**< Functionality ID for RSA 3072 Encryption\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_ep_3072_input::m m\n+ * @endlink @link icp_qat_fw_mmp_rsa_ep_3072_input::e e @endlink @link\n+ * icp_qat_fw_mmp_rsa_ep_3072_input::n n @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_ep_3072_output::c c\n+ * @endlink\n+ */\n+#define PKE_RSA_DP1_3072 0x7d111ebe\n+/**< Functionality ID for RSA 3072 Decryption\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_dp1_3072_input::c c\n+ * @endlink @link icp_qat_fw_mmp_rsa_dp1_3072_input::d d @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp1_3072_input::n n @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp1_3072_output::m m\n+ * @endlink\n+ */\n+#define PKE_RSA_DP2_3072 0x81121ed9\n+/**< Functionality ID for RSA 3072 Decryption with CRT\n+ * @li 6 input parameters : @link icp_qat_fw_mmp_rsa_dp2_3072_input::c c\n+ * @endlink @link icp_qat_fw_mmp_rsa_dp2_3072_input::p p @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_3072_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_3072_input::dp dp @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_3072_input::dq dq @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_3072_input::qinv qinv @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp2_3072_output::m m\n+ * @endlink\n+ */\n+#define PKE_RSA_KP1_4096 0x7d1f1ef6\n+/**< Functionality ID for RSA 4096 key generation first form\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp1_4096_input::p p\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp1_4096_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp1_4096_input::e e @endlink\n+ * @li 2 output parameters : @link icp_qat_fw_mmp_rsa_kp1_4096_output::n n\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp1_4096_output::d d @endlink\n+ */\n+#define PKE_RSA_KP2_4096 0x91251f27\n+/**< Functionality ID for RSA 4096 key generation second form\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_kp2_4096_input::p p\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp2_4096_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_4096_input::e e @endlink\n+ * @li 5 output parameters : @link icp_qat_fw_mmp_rsa_kp2_4096_output::n n\n+ * @endlink @link icp_qat_fw_mmp_rsa_kp2_4096_output::d d @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_4096_output::dp dp @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_4096_output::dq dq @endlink @link\n+ * icp_qat_fw_mmp_rsa_kp2_4096_output::qinv qinv @endlink\n+ */\n+#define PKE_RSA_EP_4096 0xa5101f7e\n+/**< Functionality ID for RSA 4096 Encryption\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_ep_4096_input::m m\n+ * @endlink @link icp_qat_fw_mmp_rsa_ep_4096_input::e e @endlink @link\n+ * icp_qat_fw_mmp_rsa_ep_4096_input::n n @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_ep_4096_output::c c\n+ * @endlink\n+ */\n+#define PKE_RSA_DP1_4096 0xa5101f98\n+/**< Functionality ID for RSA 4096 Decryption\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_rsa_dp1_4096_input::c c\n+ * @endlink @link icp_qat_fw_mmp_rsa_dp1_4096_input::d d @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp1_4096_input::n n @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp1_4096_output::m m\n+ * @endlink\n+ */\n+#define PKE_RSA_DP2_4096 0xb1111fb2\n+/**< Functionality ID for RSA 4096 Decryption with CRT\n+ * @li 6 input parameters : @link icp_qat_fw_mmp_rsa_dp2_4096_input::c c\n+ * @endlink @link icp_qat_fw_mmp_rsa_dp2_4096_input::p p @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_4096_input::q q @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_4096_input::dp dp @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_4096_input::dq dq @endlink @link\n+ * icp_qat_fw_mmp_rsa_dp2_4096_input::qinv qinv @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_rsa_dp2_4096_output::m m\n+ * @endlink\n+ */\n+#define PKE_GCD_PT_192 0x19201fcd\n+/**< Functionality ID for GCD primality test for 192-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_192_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_GCD_PT_256 0x19201ff7\n+/**< Functionality ID for GCD primality test for 256-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_256_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_GCD_PT_384 0x19202021\n+/**< Functionality ID for GCD primality test for 384-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_384_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_GCD_PT_512 0x1b1b204b\n+/**< Functionality ID for GCD primality test for 512-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_512_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_GCD_PT_768 0x170c2070\n+/**< Functionality ID for GCD primality test for 768-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_768_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_GCD_PT_1024 0x130f2085\n+/**< Functionality ID for GCD primality test for 1024-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_1024_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_GCD_PT_1536 0x1d0c2094\n+/**< Functionality ID for GCD primality test for 1536-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_1536_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_GCD_PT_2048 0x210c20a5\n+/**< Functionality ID for GCD primality test for 2048-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_2048_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_GCD_PT_3072 0x290c20b6\n+/**< Functionality ID for GCD primality test for 3072-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_3072_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_GCD_PT_4096 0x310c20c7\n+/**< Functionality ID for GCD primality test for 4096-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_gcd_pt_4096_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_FERMAT_PT_160 0x0e1120d8\n+/**< Functionality ID for Fermat primality test for 160-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_160_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_FERMAT_PT_512 0x121120ee\n+/**< Functionality ID for Fermat primality test for 512-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_512_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_FERMAT_PT_L512 0x19162104\n+/**< Functionality ID for Fermat primality test for &lte; 512-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_l512_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_FERMAT_PT_768 0x19112124\n+/**< Functionality ID for Fermat primality test for 768-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_768_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_FERMAT_PT_1024 0x1f11213a\n+/**< Functionality ID for Fermat primality test for 1024-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_1024_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_FERMAT_PT_1536 0x2b112150\n+/**< Functionality ID for Fermat primality test for 1536-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_1536_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_FERMAT_PT_2048 0x3b112166\n+/**< Functionality ID for Fermat primality test for 2048-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_2048_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_FERMAT_PT_3072 0x3a11217c\n+/**< Functionality ID for Fermat primality test for 3072-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_3072_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_FERMAT_PT_4096 0x4a112192\n+/**< Functionality ID for Fermat primality test for 4096-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_fermat_pt_4096_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_MR_PT_160 0x0e1221a8\n+/**< Functionality ID for Miller-Rabin primality test for 160-bit numbers\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_160_input::x x\n+ * @endlink @link icp_qat_fw_mmp_mr_pt_160_input::m m @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_MR_PT_512 0x111221bf\n+/**< Functionality ID for Miller-Rabin primality test for 512-bit numbers\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_512_input::x x\n+ * @endlink @link icp_qat_fw_mmp_mr_pt_512_input::m m @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_MR_PT_768 0x1d0d21d6\n+/**< Functionality ID for Miller-Rabin primality test for 768-bit numbers\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_768_input::x x\n+ * @endlink @link icp_qat_fw_mmp_mr_pt_768_input::m m @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_MR_PT_1024 0x250d21ed\n+/**< Functionality ID for Miller-Rabin primality test for 1024-bit numbers\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_1024_input::x x\n+ * @endlink @link icp_qat_fw_mmp_mr_pt_1024_input::m m @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_MR_PT_1536 0x350d2204\n+/**< Functionality ID for Miller-Rabin primality test for 1536-bit numbers\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_1536_input::x x\n+ * @endlink @link icp_qat_fw_mmp_mr_pt_1536_input::m m @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_MR_PT_2048 0x490d221b\n+/**< Functionality ID for Miller-Rabin primality test for 2048-bit numbers\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_2048_input::x x\n+ * @endlink @link icp_qat_fw_mmp_mr_pt_2048_input::m m @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_MR_PT_3072 0x4d0d2232\n+/**< Functionality ID for Miller-Rabin primality test for 3072-bit numbers\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_3072_input::x x\n+ * @endlink @link icp_qat_fw_mmp_mr_pt_3072_input::m m @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_MR_PT_4096 0x650d2249\n+/**< Functionality ID for Miller-Rabin primality test for 4096-bit numbers\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_4096_input::x x\n+ * @endlink @link icp_qat_fw_mmp_mr_pt_4096_input::m m @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_MR_PT_L512 0x18182260\n+/**< Functionality ID for Miller-Rabin primality test for 512-bit numbers\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_mr_pt_l512_input::x x\n+ * @endlink @link icp_qat_fw_mmp_mr_pt_l512_input::m m @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_LUCAS_PT_160 0x0e0c227e\n+/**< Functionality ID for Lucas primality test for 160-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_160_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_LUCAS_PT_512 0x110c228f\n+/**< Functionality ID for Lucas primality test for 512-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_512_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_LUCAS_PT_768 0x130c22a0\n+/**< Functionality ID for Lucas primality test for 768-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_768_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_LUCAS_PT_1024 0x150c22b1\n+/**< Functionality ID for Lucas primality test for 1024-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_1024_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_LUCAS_PT_1536 0x190c22c2\n+/**< Functionality ID for Lucas primality test for 1536-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_1536_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_LUCAS_PT_2048 0x1d0c22d3\n+/**< Functionality ID for Lucas primality test for 2048-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_2048_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_LUCAS_PT_3072 0x250c22e4\n+/**< Functionality ID for Lucas primality test for 3072-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_3072_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_LUCAS_PT_4096 0x661522f5\n+/**< Functionality ID for Lucas primality test for 4096-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_4096_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_LUCAS_PT_L512 0x1617230a\n+/**< Functionality ID for Lucas primality test for L512-bit numbers\n+ * @li 1 input parameters : @link icp_qat_fw_mmp_lucas_pt_l512_input::m m\n+ * @endlink\n+ * @li no output parameters\n+ */\n+#define MATHS_MODEXP_L512 0x150c2327\n+/**< Functionality ID for Modular exponentiation for numbers less than 512-bits\n+ * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l512_input::g g\n+ * @endlink @link icp_qat_fw_maths_modexp_l512_input::e e @endlink @link\n+ * icp_qat_fw_maths_modexp_l512_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l512_output::r r\n+@endlink\n+ */\n+#define MATHS_MODEXP_L1024 0x2d0c233e\n+/**< Functionality ID for Modular exponentiation for numbers less than 1024-bit\n+ * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l1024_input::g g\n+ * @endlink @link icp_qat_fw_maths_modexp_l1024_input::e e @endlink @link\n+ * icp_qat_fw_maths_modexp_l1024_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l1024_output::r r\n+ * @endlink\n+ */\n+#define MATHS_MODEXP_L1536 0x410c2355\n+/**< Functionality ID for Modular exponentiation for numbers less than 1536-bits\n+ * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l1536_input::g g\n+ * @endlink @link icp_qat_fw_maths_modexp_l1536_input::e e @endlink @link\n+ * icp_qat_fw_maths_modexp_l1536_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l1536_output::r r\n+ * @endlink\n+ */\n+#define MATHS_MODEXP_L2048 0x5e12236c\n+/**< Functionality ID for Modular exponentiation for numbers less than 2048-bit\n+ * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l2048_input::g g\n+ * @endlink @link icp_qat_fw_maths_modexp_l2048_input::e e @endlink @link\n+ * icp_qat_fw_maths_modexp_l2048_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l2048_output::r r\n+ * @endlink\n+ */\n+#define MATHS_MODEXP_L2560 0x60162388\n+/**< Functionality ID for Modular exponentiation for numbers less than 2560-bits\n+ * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l2560_input::g g\n+ * @endlink @link icp_qat_fw_maths_modexp_l2560_input::e e @endlink @link\n+ * icp_qat_fw_maths_modexp_l2560_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l2560_output::r r\n+ * @endlink\n+ */\n+#define MATHS_MODEXP_L3072 0x650c23a9\n+/**< Functionality ID for Modular exponentiation for numbers less than 3072-bits\n+ * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l3072_input::g g\n+ * @endlink @link icp_qat_fw_maths_modexp_l3072_input::e e @endlink @link\n+ * icp_qat_fw_maths_modexp_l3072_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l3072_output::r r\n+ * @endlink\n+ */\n+#define MATHS_MODEXP_L3584 0x801623c0\n+/**< Functionality ID for Modular exponentiation for numbers less than 3584-bits\n+ * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l3584_input::g g\n+ * @endlink @link icp_qat_fw_maths_modexp_l3584_input::e e @endlink @link\n+ * icp_qat_fw_maths_modexp_l3584_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l3584_output::r r\n+ * @endlink\n+ */\n+#define MATHS_MODEXP_L4096 0x850c23e1\n+/**< Functionality ID for Modular exponentiation for numbers less than 4096-bit\n+ * @li 3 input parameters : @link icp_qat_fw_maths_modexp_l4096_input::g g\n+ * @endlink @link icp_qat_fw_maths_modexp_l4096_input::e e @endlink @link\n+ * icp_qat_fw_maths_modexp_l4096_input::m m @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_maths_modexp_l4096_output::r r\n+ * @endlink\n+ */\n+#define MATHS_MODINV_ODD_L128 0x090623f8\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 128 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l128_input::a a\n+ * @endlink @link icp_qat_fw_maths_modinv_odd_l128_input::b b @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l128_output::c\n+ * c @endlink\n+ */\n+#define MATHS_MODINV_ODD_L192 0x0a0623fe\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 192 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l192_input::a a\n+ * @endlink @link icp_qat_fw_maths_modinv_odd_l192_input::b b @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l192_output::c\n+ * c @endlink\n+ */\n+#define MATHS_MODINV_ODD_L256 0x0a062404\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 256 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l256_input::a a\n+ * @endlink @link icp_qat_fw_maths_modinv_odd_l256_input::b b @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l256_output::c\n+ * c @endlink\n+ */\n+#define MATHS_MODINV_ODD_L384 0x0b06240a\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 384 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l384_input::a a\n+ * @endlink @link icp_qat_fw_maths_modinv_odd_l384_input::b b @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l384_output::c\n+ * c @endlink\n+ */\n+#define MATHS_MODINV_ODD_L512 0x0c062410\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 512 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l512_input::a a\n+ * @endlink @link icp_qat_fw_maths_modinv_odd_l512_input::b b @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l512_output::c\n+ * c @endlink\n+ */\n+#define MATHS_MODINV_ODD_L768 0x0e062416\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 768 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l768_input::a a\n+ * @endlink @link icp_qat_fw_maths_modinv_odd_l768_input::b b @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_maths_modinv_odd_l768_output::c\n+ * c @endlink\n+ */\n+#define MATHS_MODINV_ODD_L1024 0x1006241c\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 1024 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l1024_input::a\n+ * a @endlink @link icp_qat_fw_maths_modinv_odd_l1024_input::b b @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_maths_modinv_odd_l1024_output::c c @endlink\n+ */\n+#define MATHS_MODINV_ODD_L1536 0x18062422\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 1536 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l1536_input::a\n+ * a @endlink @link icp_qat_fw_maths_modinv_odd_l1536_input::b b @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_maths_modinv_odd_l1536_output::c c @endlink\n+ */\n+#define MATHS_MODINV_ODD_L2048 0x20062428\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 2048 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l2048_input::a\n+ * a @endlink @link icp_qat_fw_maths_modinv_odd_l2048_input::b b @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_maths_modinv_odd_l2048_output::c c @endlink\n+ */\n+#define MATHS_MODINV_ODD_L3072 0x3006242e\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 3072 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l3072_input::a\n+ * a @endlink @link icp_qat_fw_maths_modinv_odd_l3072_input::b b @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_maths_modinv_odd_l3072_output::c c @endlink\n+ */\n+#define MATHS_MODINV_ODD_L4096 0x40062434\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 4096 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_odd_l4096_input::a\n+ * a @endlink @link icp_qat_fw_maths_modinv_odd_l4096_input::b b @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_maths_modinv_odd_l4096_output::c c @endlink\n+ */\n+#define MATHS_MODINV_EVEN_L128 0x0906243a\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 128 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l128_input::a\n+ * a @endlink @link icp_qat_fw_maths_modinv_even_l128_input::b b @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_maths_modinv_even_l128_output::c c @endlink\n+ */\n+#define MATHS_MODINV_EVEN_L192 0x0a062440\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 192 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l192_input::a\n+ * a @endlink @link icp_qat_fw_maths_modinv_even_l192_input::b b @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_maths_modinv_even_l192_output::c c @endlink\n+ */\n+#define MATHS_MODINV_EVEN_L256 0x0a062446\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 256 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l256_input::a\n+ * a @endlink @link icp_qat_fw_maths_modinv_even_l256_input::b b @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_maths_modinv_even_l256_output::c c @endlink\n+ */\n+#define MATHS_MODINV_EVEN_L384 0x0e0b244c\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 384 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l384_input::a\n+ * a @endlink @link icp_qat_fw_maths_modinv_even_l384_input::b b @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_maths_modinv_even_l384_output::c c @endlink\n+ */\n+#define MATHS_MODINV_EVEN_L512 0x110b2457\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 512 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l512_input::a\n+ * a @endlink @link icp_qat_fw_maths_modinv_even_l512_input::b b @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_maths_modinv_even_l512_output::c c @endlink\n+ */\n+#define MATHS_MODINV_EVEN_L768 0x170b2462\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 768 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l768_input::a\n+ * a @endlink @link icp_qat_fw_maths_modinv_even_l768_input::b b @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_maths_modinv_even_l768_output::c c @endlink\n+ */\n+#define MATHS_MODINV_EVEN_L1024 0x1d0b246d\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 1024 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l1024_input::a\n+ * a @endlink @link icp_qat_fw_maths_modinv_even_l1024_input::b b @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_maths_modinv_even_l1024_output::c c @endlink\n+ */\n+#define MATHS_MODINV_EVEN_L1536 0x290b2478\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 1536 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l1536_input::a\n+ * a @endlink @link icp_qat_fw_maths_modinv_even_l1536_input::b b @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_maths_modinv_even_l1536_output::c c @endlink\n+ */\n+#define MATHS_MODINV_EVEN_L2048 0x350b2483\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 2048 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l2048_input::a\n+ * a @endlink @link icp_qat_fw_maths_modinv_even_l2048_input::b b @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_maths_modinv_even_l2048_output::c c @endlink\n+ */\n+#define MATHS_MODINV_EVEN_L3072 0x4d0b248e\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 3072 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l3072_input::a\n+ * a @endlink @link icp_qat_fw_maths_modinv_even_l3072_input::b b @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_maths_modinv_even_l3072_output::c c @endlink\n+ */\n+#define MATHS_MODINV_EVEN_L4096 0x650b2499\n+/**< Functionality ID for Modular multiplicative inverse for numbers less than\n+ * 4096 bits\n+ * @li 2 input parameters : @link icp_qat_fw_maths_modinv_even_l4096_input::a\n+ * a @endlink @link icp_qat_fw_maths_modinv_even_l4096_input::b b @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_maths_modinv_even_l4096_output::c c @endlink\n+ */\n+#define PKE_DSA_GEN_P_1024_160 0x381824a4\n+/**< Functionality ID for DSA parameter generation P\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_dsa_gen_p_1024_160_input::x\n+ * x @endlink @link icp_qat_fw_mmp_dsa_gen_p_1024_160_input::q q @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_dsa_gen_p_1024_160_output::p p @endlink\n+ */\n+#define PKE_DSA_GEN_G_1024 0x261424d4\n+/**< Functionality ID for DSA key generation G\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_dsa_gen_g_1024_input::p p\n+ * @endlink @link icp_qat_fw_mmp_dsa_gen_g_1024_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_gen_g_1024_input::h h @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_gen_g_1024_output::g g\n+ * @endlink\n+ */\n+#define PKE_DSA_GEN_Y_1024 0x291224ed\n+/**< Functionality ID for DSA key generation Y\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_dsa_gen_y_1024_input::p p\n+ * @endlink @link icp_qat_fw_mmp_dsa_gen_y_1024_input::g g @endlink @link\n+ * icp_qat_fw_mmp_dsa_gen_y_1024_input::x x @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_gen_y_1024_output::y y\n+ * @endlink\n+ */\n+#define PKE_DSA_SIGN_R_1024_160 0x2c1c2504\n+/**< Functionality ID for DSA Sign R\n+ * @li 4 input parameters : @link icp_qat_fw_mmp_dsa_sign_r_1024_160_input::k\n+ * k @endlink @link icp_qat_fw_mmp_dsa_sign_r_1024_160_input::p p @endlink\n+ * @link icp_qat_fw_mmp_dsa_sign_r_1024_160_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_1024_160_input::g g @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_dsa_sign_r_1024_160_output::r r @endlink\n+ */\n+#define PKE_DSA_SIGN_S_160 0x12142526\n+/**< Functionality ID for DSA Sign S\n+ * @li 5 input parameters : @link icp_qat_fw_mmp_dsa_sign_s_160_input::m m\n+ * @endlink @link icp_qat_fw_mmp_dsa_sign_s_160_input::k k @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_s_160_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_s_160_input::r r @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_s_160_input::x x @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_sign_s_160_output::s s\n+ * @endlink\n+ */\n+#define PKE_DSA_SIGN_R_S_1024_160 0x301e2540\n+/**< Functionality ID for DSA Sign R S\n+ * @li 6 input parameters : @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input::m m @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input::k k @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input::p p @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input::g g @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_1024_160_input::x x @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_1024_160_output::r r @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_1024_160_output::s s @endlink\n+ */\n+#define PKE_DSA_VERIFY_1024_160 0x323a2570\n+/**< Functionality ID for DSA Verify\n+ * @li 7 input parameters : @link icp_qat_fw_mmp_dsa_verify_1024_160_input::r\n+ * r @endlink @link icp_qat_fw_mmp_dsa_verify_1024_160_input::s s @endlink\n+ * @link icp_qat_fw_mmp_dsa_verify_1024_160_input::m m @endlink @link\n+ * icp_qat_fw_mmp_dsa_verify_1024_160_input::p p @endlink @link\n+ * icp_qat_fw_mmp_dsa_verify_1024_160_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_verify_1024_160_input::g g @endlink @link\n+ * icp_qat_fw_mmp_dsa_verify_1024_160_input::y y @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_DSA_GEN_P_2048_224 0x341d25be\n+/**< Functionality ID for DSA parameter generation P\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_dsa_gen_p_2048_224_input::x\n+ * x @endlink @link icp_qat_fw_mmp_dsa_gen_p_2048_224_input::q q @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_dsa_gen_p_2048_224_output::p p @endlink\n+ */\n+#define PKE_DSA_GEN_Y_2048 0x4d1225ea\n+/**< Functionality ID for DSA key generation Y\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_dsa_gen_y_2048_input::p p\n+ * @endlink @link icp_qat_fw_mmp_dsa_gen_y_2048_input::g g @endlink @link\n+ * icp_qat_fw_mmp_dsa_gen_y_2048_input::x x @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_gen_y_2048_output::y y\n+ * @endlink\n+ */\n+#define PKE_DSA_SIGN_R_2048_224 0x511c2601\n+/**< Functionality ID for DSA Sign R\n+ * @li 4 input parameters : @link icp_qat_fw_mmp_dsa_sign_r_2048_224_input::k\n+ * k @endlink @link icp_qat_fw_mmp_dsa_sign_r_2048_224_input::p p @endlink\n+ * @link icp_qat_fw_mmp_dsa_sign_r_2048_224_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_2048_224_input::g g @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_dsa_sign_r_2048_224_output::r r @endlink\n+ */\n+#define PKE_DSA_SIGN_S_224 0x15142623\n+/**< Functionality ID for DSA Sign S\n+ * @li 5 input parameters : @link icp_qat_fw_mmp_dsa_sign_s_224_input::m m\n+ * @endlink @link icp_qat_fw_mmp_dsa_sign_s_224_input::k k @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_s_224_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_s_224_input::r r @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_s_224_input::x x @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_sign_s_224_output::s s\n+ * @endlink\n+ */\n+#define PKE_DSA_SIGN_R_S_2048_224 0x571e263d\n+/**< Functionality ID for DSA Sign R S\n+ * @li 6 input parameters : @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input::m m @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input::k k @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input::p p @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input::g g @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_2048_224_input::x x @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_2048_224_output::r r @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_2048_224_output::s s @endlink\n+ */\n+#define PKE_DSA_VERIFY_2048_224 0x6930266d\n+/**< Functionality ID for DSA Verify\n+ * @li 7 input parameters : @link icp_qat_fw_mmp_dsa_verify_2048_224_input::r\n+ * r @endlink @link icp_qat_fw_mmp_dsa_verify_2048_224_input::s s @endlink\n+ * @link icp_qat_fw_mmp_dsa_verify_2048_224_input::m m @endlink @link\n+ * icp_qat_fw_mmp_dsa_verify_2048_224_input::p p @endlink @link\n+ * icp_qat_fw_mmp_dsa_verify_2048_224_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_verify_2048_224_input::g g @endlink @link\n+ * icp_qat_fw_mmp_dsa_verify_2048_224_input::y y @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_DSA_GEN_P_2048_256 0x431126b7\n+/**< Functionality ID for DSA parameter generation P\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_dsa_gen_p_2048_256_input::x\n+ * x @endlink @link icp_qat_fw_mmp_dsa_gen_p_2048_256_input::q q @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_dsa_gen_p_2048_256_output::p p @endlink\n+ */\n+#define PKE_DSA_GEN_G_2048 0x4b1426ed\n+/**< Functionality ID for DSA key generation G\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_dsa_gen_g_2048_input::p p\n+ * @endlink @link icp_qat_fw_mmp_dsa_gen_g_2048_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_gen_g_2048_input::h h @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_gen_g_2048_output::g g\n+ * @endlink\n+ */\n+#define PKE_DSA_SIGN_R_2048_256 0x5b182706\n+/**< Functionality ID for DSA Sign R\n+ * @li 4 input parameters : @link icp_qat_fw_mmp_dsa_sign_r_2048_256_input::k\n+ * k @endlink @link icp_qat_fw_mmp_dsa_sign_r_2048_256_input::p p @endlink\n+ * @link icp_qat_fw_mmp_dsa_sign_r_2048_256_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_2048_256_input::g g @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_dsa_sign_r_2048_256_output::r r @endlink\n+ */\n+#define PKE_DSA_SIGN_S_256 0x15142733\n+/**< Functionality ID for DSA Sign S\n+ * @li 5 input parameters : @link icp_qat_fw_mmp_dsa_sign_s_256_input::m m\n+ * @endlink @link icp_qat_fw_mmp_dsa_sign_s_256_input::k k @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_s_256_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_s_256_input::r r @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_s_256_input::x x @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_sign_s_256_output::s s\n+ * @endlink\n+ */\n+#define PKE_DSA_SIGN_R_S_2048_256 0x5a2a274d\n+/**< Functionality ID for DSA Sign R S\n+ * @li 6 input parameters : @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input::m m @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input::k k @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input::p p @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input::g g @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_2048_256_input::x x @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_2048_256_output::r r @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_2048_256_output::s s @endlink\n+ */\n+#define PKE_DSA_VERIFY_2048_256 0x723a2789\n+/**< Functionality ID for DSA Verify\n+ * @li 7 input parameters : @link icp_qat_fw_mmp_dsa_verify_2048_256_input::r\n+ * r @endlink @link icp_qat_fw_mmp_dsa_verify_2048_256_input::s s @endlink\n+ * @link icp_qat_fw_mmp_dsa_verify_2048_256_input::m m @endlink @link\n+ * icp_qat_fw_mmp_dsa_verify_2048_256_input::p p @endlink @link\n+ * icp_qat_fw_mmp_dsa_verify_2048_256_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_verify_2048_256_input::g g @endlink @link\n+ * icp_qat_fw_mmp_dsa_verify_2048_256_input::y y @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_DSA_GEN_P_3072_256 0x4b1127e0\n+/**< Functionality ID for DSA parameter generation P\n+ * @li 2 input parameters : @link icp_qat_fw_mmp_dsa_gen_p_3072_256_input::x\n+ * x @endlink @link icp_qat_fw_mmp_dsa_gen_p_3072_256_input::q q @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_dsa_gen_p_3072_256_output::p p @endlink\n+ */\n+#define PKE_DSA_GEN_G_3072 0x4f142816\n+/**< Functionality ID for DSA key generation G\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_dsa_gen_g_3072_input::p p\n+ * @endlink @link icp_qat_fw_mmp_dsa_gen_g_3072_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_gen_g_3072_input::h h @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_gen_g_3072_output::g g\n+ * @endlink\n+ */\n+#define PKE_DSA_GEN_Y_3072 0x5112282f\n+/**< Functionality ID for DSA key generation Y\n+ * @li 3 input parameters : @link icp_qat_fw_mmp_dsa_gen_y_3072_input::p p\n+ * @endlink @link icp_qat_fw_mmp_dsa_gen_y_3072_input::g g @endlink @link\n+ * icp_qat_fw_mmp_dsa_gen_y_3072_input::x x @endlink\n+ * @li 1 output parameters : @link icp_qat_fw_mmp_dsa_gen_y_3072_output::y y\n+ * @endlink\n+ */\n+#define PKE_DSA_SIGN_R_3072_256 0x59282846\n+/**< Functionality ID for DSA Sign R\n+ * @li 4 input parameters : @link icp_qat_fw_mmp_dsa_sign_r_3072_256_input::k\n+ * k @endlink @link icp_qat_fw_mmp_dsa_sign_r_3072_256_input::p p @endlink\n+ * @link icp_qat_fw_mmp_dsa_sign_r_3072_256_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_3072_256_input::g g @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_dsa_sign_r_3072_256_output::r r @endlink\n+ */\n+#define PKE_DSA_SIGN_R_S_3072_256 0x61292874\n+/**< Functionality ID for DSA Sign R S\n+ * @li 6 input parameters : @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input::m m @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input::k k @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input::p p @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input::g g @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_3072_256_input::x x @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_3072_256_output::r r @endlink @link\n+ * icp_qat_fw_mmp_dsa_sign_r_s_3072_256_output::s s @endlink\n+ */\n+#define PKE_DSA_VERIFY_3072_256 0x7f4328ae\n+/**< Functionality ID for DSA Verify\n+ * @li 7 input parameters : @link icp_qat_fw_mmp_dsa_verify_3072_256_input::r\n+ * r @endlink @link icp_qat_fw_mmp_dsa_verify_3072_256_input::s s @endlink\n+ * @link  icp_qat_fw_mmp_dsa_verify_3072_256_input::m m @endlink @link\n+ * icp_qat_fw_mmp_dsa_verify_3072_256_input::p p @endlink @link\n+ * icp_qat_fw_mmp_dsa_verify_3072_256_input::q q @endlink @link\n+ * icp_qat_fw_mmp_dsa_verify_3072_256_input::g g @endlink @link\n+ * icp_qat_fw_mmp_dsa_verify_3072_256_input::y y @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_ECDSA_SIGN_RS_GF2_L256 0x46512907\n+/**< Functionality ID for ECDSA Sign RS for curves B/K-163 and B/K-233\n+ * @li 1 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l256_input::in in @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l256_output::r r @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l256_output::s s @endlink\n+ */\n+#define PKE_ECDSA_SIGN_R_GF2_L256 0x323a298f\n+/**< Functionality ID for ECDSA Sign R for curves B/K-163 and B/K-233\n+ * @li 7 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input::xg xg @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input::yg yg @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input::n n @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input::q q @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input::a a @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input::b b @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_input::k k @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l256_output::r r @endlink\n+ */\n+#define PKE_ECDSA_SIGN_S_GF2_L256 0x2b2229e6\n+/**< Functionality ID for ECDSA Sign S for curves with n &lt; 2^256\n+ * @li 5 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_input::e e @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_input::d d @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_input::r r @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_input::k k @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_input::n n @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l256_output::s s @endlink\n+ */\n+#define PKE_ECDSA_VERIFY_GF2_L256 0x337e2a27\n+/**< Functionality ID for ECDSA Verify for curves B/K-163 and B/K-233\n+ * @li 1 input parameters : @link\n+ *icp_qat_fw_mmp_ecdsa_verify_gf2_l256_input::in in @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_ECDSA_SIGN_RS_GF2_L512 0x5e5f2ad7\n+/**< Functionality ID for ECDSA Sign RS\n+ * @li 1 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_input::in in @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_output::r r @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_l512_output::s s @endlink\n+ */\n+#define PKE_ECDSA_SIGN_R_GF2_L512 0x84312b6a\n+/**< Functionality ID for ECDSA GF2 Sign R\n+ * @li 7 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input::xg xg @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input::yg yg @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input::n n @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input::q q @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input::a a @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input::b b @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_input::k k @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_l512_output::r r @endlink\n+ */\n+#define PKE_ECDSA_SIGN_S_GF2_L512 0x26182bbe\n+/**< Functionality ID for ECDSA GF2 Sign S\n+ * @li 5 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_input::e e @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_input::d d @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_input::r r @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_input::k k @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_input::n n @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_l512_output::s s @endlink\n+ */\n+#define PKE_ECDSA_VERIFY_GF2_L512 0x58892bea\n+/**< Functionality ID for ECDSA GF2 Verify\n+ * @li 1 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_verify_gf2_l512_input::in in @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_ECDSA_SIGN_RS_GF2_571 0x554a2c93\n+/**< Functionality ID for ECDSA GF2 Sign RS for curves B-571/K-571\n+ * @li 1 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_input::in in @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_output::r r @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gf2_571_output::s s @endlink\n+ */\n+#define PKE_ECDSA_SIGN_S_GF2_571 0x52332d09\n+/**< Functionality ID for ECDSA GF2 Sign S for curves with deg(q) &lt; 576\n+ * @li 5 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_input::e e @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_input::d d @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_input::r r @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_input::k k @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_input::n n @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gf2_571_output::s s @endlink\n+ */\n+#define PKE_ECDSA_SIGN_R_GF2_571 0x731a2d51\n+/**< Functionality ID for ECDSA GF2 Sign R for degree 571\n+ * @li 7 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input::xg xg @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input::yg yg @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input::n n @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input::q q @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input::a a @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input::b b @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_input::k k @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gf2_571_output::r r @endlink\n+ */\n+#define PKE_ECDSA_VERIFY_GF2_571 0x4f6c2d91\n+/**< Functionality ID for ECDSA GF2 Verify for degree 571\n+ * @li 1 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_verify_gf2_571_input::in in @endlink\n+ * @li no output parameters\n+ */\n+#define MATHS_POINT_MULTIPLICATION_GF2_L256 0x3b242e38\n+/**< Functionality ID for MATHS GF2 Point Multiplication\n+ * @li 7 input parameters : @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l256_input::k k @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l256_input::xg xg @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l256_input::yg yg @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l256_input::a a @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l256_input::b b @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l256_input::q q @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l256_input::h h @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l256_output::xk xk @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l256_output::yk yk @endlink\n+ */\n+#define MATHS_POINT_VERIFY_GF2_L256 0x231a2e7c\n+/**< Functionality ID for MATHS GF2 Point Verification\n+ * @li 5 input parameters : @link\n+ * icp_qat_fw_maths_point_verify_gf2_l256_input::xq xq @endlink @link\n+ * icp_qat_fw_maths_point_verify_gf2_l256_input::yq yq @endlink @link\n+ * icp_qat_fw_maths_point_verify_gf2_l256_input::q q @endlink @link\n+ * icp_qat_fw_maths_point_verify_gf2_l256_input::a a @endlink @link\n+ * icp_qat_fw_maths_point_verify_gf2_l256_input::b b @endlink\n+ * @li no output parameters\n+ */\n+#define MATHS_POINT_MULTIPLICATION_GF2_L512 0x722c2e96\n+/**< Functionality ID for MATHS GF2 Point Multiplication\n+ * @li 7 input parameters : @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l512_input::k k @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l512_input::xg xg @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l512_input::yg yg @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l512_input::a a @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l512_input::b b @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l512_input::q q @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l512_input::h h @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l512_output::xk xk @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_l512_output::yk yk @endlink\n+ */\n+#define MATHS_POINT_VERIFY_GF2_L512 0x25132ee2\n+/**< Functionality ID for MATHS GF2 Point Verification\n+ * @li 5 input parameters : @link\n+ * icp_qat_fw_maths_point_verify_gf2_l512_input::xq xq @endlink @link\n+ * icp_qat_fw_maths_point_verify_gf2_l512_input::yq yq @endlink @link\n+ * icp_qat_fw_maths_point_verify_gf2_l512_input::q q @endlink @link\n+ * icp_qat_fw_maths_point_verify_gf2_l512_input::a a @endlink @link\n+ * icp_qat_fw_maths_point_verify_gf2_l512_input::b b @endlink\n+ * @li no output parameters\n+ */\n+#define MATHS_POINT_MULTIPLICATION_GF2_571 0x44152ef5\n+/**< Functionality ID for ECC GF2 Point Multiplication for curves B-571/K-571\n+ * @li 7 input parameters : @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_571_input::k k @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_571_input::xg xg @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_571_input::yg yg @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_571_input::a a @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_571_input::b b @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_571_input::q q @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_571_input::h h @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_571_output::xk xk @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gf2_571_output::yk yk @endlink\n+ */\n+#define MATHS_POINT_VERIFY_GF2_571 0x12072f1b\n+/**< Functionality ID for ECC GF2 Point Verification for degree 571\n+ * @li 5 input parameters : @link\n+ * icp_qat_fw_maths_point_verify_gf2_571_input::xq xq @endlink @link\n+ * icp_qat_fw_maths_point_verify_gf2_571_input::yq yq @endlink @link\n+ * icp_qat_fw_maths_point_verify_gf2_571_input::q q @endlink @link\n+ * icp_qat_fw_maths_point_verify_gf2_571_input::a a @endlink @link\n+ * icp_qat_fw_maths_point_verify_gf2_571_input::b b @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_KPT_ECDSA_SIGN_RS_GF2_L256 0x515217d9\n+/**< Functionality ID for KPT ECDSA Sign RS for curves B/K-163 and B/K-233\n+ * @li 3 input parameters : @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gf2_l256_input::in in @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gf2_l256_input::d d @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gf2_l256_input::c c @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gf2_l256_output::r r @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gf2_l256_output::s s @endlink\n+ */\n+#define PKE_KPT_ECDSA_SIGN_RS_GF2_L512 0x4d811987\n+/**< Functionality ID for KPT ECDSA Sign RS\n+ * @li 3 input parameters : @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gf2_l512_input::in in @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gf2_l512_input::d d @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gf2_l512_input::c c @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gf2_l512_output::r r @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gf2_l512_output::s s @endlink\n+ */\n+#define PKE_KPT_ECDSA_SIGN_RS_GF2_571 0x45731898\n+/**< Functionality ID for KPT ECDSA GF2 Sign RS for curves B-571/K-571\n+ * @li 3 input parameters : @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gf2_571_input::in in @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gf2_571_input::d d @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gf2_571_input::c c @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gf2_571_output::r r @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gf2_571_output::s s @endlink\n+ */\n+#define PKE_ECDSA_SIGN_R_GFP_L256 0x431b2f22\n+/**< Functionality ID for ECDSA GFP Sign R\n+ * @li 7 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input::xg xg @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input::yg yg @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input::n n @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input::q q @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input::a a @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input::b b @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_input::k k @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l256_output::r r @endlink\n+ */\n+#define PKE_ECDSA_SIGN_S_GFP_L256 0x2b252f6d\n+/**< Functionality ID for ECDSA GFP Sign S\n+ * @li 5 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_input::e e @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_input::d d @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_input::r r @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_input::k k @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_input::n n @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l256_output::s s @endlink\n+ */\n+#define PKE_ECDSA_SIGN_RS_GFP_L256 0x6a3c2fa6\n+/**< Functionality ID for ECDSA GFP Sign RS\n+ * @li 1 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_input::in in @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_output::r r @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l256_output::s s @endlink\n+ */\n+#define PKE_ECDSA_VERIFY_GFP_L256 0x325b3023\n+/**< Functionality ID for ECDSA GFP Verify\n+ * @li 1 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_verify_gfp_l256_input::in in @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_ECDSA_SIGN_R_GFP_L512 0x4e2530b3\n+/**< Functionality ID for ECDSA GFP Sign R\n+ * @li 7 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input::xg xg @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input::yg yg @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input::n n @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input::q q @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input::a a @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input::b b @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_input::k k @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_l512_output::r r @endlink\n+ */\n+#define PKE_ECDSA_SIGN_S_GFP_L512 0x251830fa\n+/**< Functionality ID for ECDSA GFP Sign S\n+ * @li 5 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_input::e e @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_input::d d @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_input::r r @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_input::k k @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_input::n n @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_l512_output::s s @endlink\n+ */\n+#define PKE_ECDSA_SIGN_RS_GFP_L512 0x5a2b3127\n+/**< Functionality ID for ECDSA GFP Sign RS\n+ * @li 1 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_input::in in @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_output::r r @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_l512_output::s s @endlink\n+ */\n+#define PKE_ECDSA_VERIFY_GFP_L512 0x3553318a\n+/**< Functionality ID for ECDSA GFP Verify\n+ * @li 1 input parameters : @link\n+icp_qat_fw_mmp_ecdsa_verify_gfp_l512_input::in in @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_ECDSA_SIGN_R_GFP_521 0x772c31fe\n+/**< Functionality ID for ECDSA GFP Sign R\n+ * @li 7 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input::xg xg @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input::yg yg @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input::n n @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input::q q @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input::a a @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input::b b @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_input::k k @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_r_gfp_521_output::r r @endlink\n+ */\n+#define PKE_ECDSA_SIGN_S_GFP_521 0x52343251\n+/**< Functionality ID for ECDSA GFP Sign S\n+ * @li 5 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_input::e e @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_input::d d @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_input::r r @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_input::k k @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_input::n n @endlink\n+ * @li 1 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_s_gfp_521_output::s s @endlink\n+ */\n+#define PKE_ECDSA_SIGN_RS_GFP_521 0x494a329b\n+/**< Functionality ID for ECDSA GFP Sign RS\n+ * @li 1 input parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_input::in in @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_output::r r @endlink @link\n+ * icp_qat_fw_mmp_ecdsa_sign_rs_gfp_521_output::s s @endlink\n+ */\n+#define PKE_ECDSA_VERIFY_GFP_521 0x554c331f\n+/**< Functionality ID for ECDSA GFP Verify\n+ * @li 1 input parameters : @link\n+icp_qat_fw_mmp_ecdsa_verify_gfp_521_input::in in @endlink\n+ * @li no output parameters\n+ */\n+#define MATHS_POINT_MULTIPLICATION_GFP_L256 0x432033a6\n+/**< Functionality ID for ECC GFP Point Multiplication\n+ * @li 7 input parameters : @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l256_input::k k @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l256_input::xg xg @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l256_input::yg yg @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l256_input::a a @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l256_input::b b @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l256_input::q q @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l256_input::h h @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l256_output::xk xk @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l256_output::yk yk @endlink\n+ */\n+#define MATHS_POINT_VERIFY_GFP_L256 0x1f0c33fc\n+/**< Functionality ID for ECC GFP Partial Point Verification\n+ * @li 5 input parameters : @link\n+ * icp_qat_fw_maths_point_verify_gfp_l256_input::xq xq @endlink @link\n+ * icp_qat_fw_maths_point_verify_gfp_l256_input::yq yq @endlink @link\n+ * icp_qat_fw_maths_point_verify_gfp_l256_input::q q @endlink @link\n+ * icp_qat_fw_maths_point_verify_gfp_l256_input::a a @endlink @link\n+ * icp_qat_fw_maths_point_verify_gfp_l256_input::b b @endlink\n+ * @li no output parameters\n+ */\n+#define MATHS_POINT_MULTIPLICATION_GFP_L512 0x41253419\n+/**< Functionality ID for ECC GFP Point Multiplication\n+ * @li 7 input parameters : @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l512_input::k k @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l512_input::xg xg @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l512_input::yg yg @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l512_input::a a @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l512_input::b b @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l512_input::q q @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l512_input::h h @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l512_output::xk xk @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_l512_output::yk yk @endlink\n+ */\n+#define MATHS_POINT_VERIFY_GFP_L512 0x2612345c\n+/**< Functionality ID for ECC GFP Partial Point\n+ * @li 5 input parameters : @link\n+ * icp_qat_fw_maths_point_verify_gfp_l512_input::xq xq @endlink @link\n+ * icp_qat_fw_maths_point_verify_gfp_l512_input::yq yq @endlink @link\n+ * icp_qat_fw_maths_point_verify_gfp_l512_input::q q @endlink @link\n+ * icp_qat_fw_maths_point_verify_gfp_l512_input::a a @endlink @link\n+ * icp_qat_fw_maths_point_verify_gfp_l512_input::b b @endlink\n+ * @li no output parameters\n+ */\n+#define MATHS_POINT_MULTIPLICATION_GFP_521 0x5511346e\n+/**< Functionality ID for ECC GFP Point Multiplication\n+ * @li 7 input parameters : @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_521_input::k k @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_521_input::xg xg @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_521_input::yg yg @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_521_input::a a @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_521_input::b b @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_521_input::q q @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_521_input::h h @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_521_output::xk xk @endlink @link\n+ * icp_qat_fw_maths_point_multiplication_gfp_521_output::yk yk @endlink\n+ */\n+#define MATHS_POINT_VERIFY_GFP_521 0x0e0734be\n+/**< Functionality ID for ECC GFP Partial Point Verification\n+ * @li 5 input parameters : @link\n+ * icp_qat_fw_maths_point_verify_gfp_521_input::xq xq @endlink @link\n+ * icp_qat_fw_maths_point_verify_gfp_521_input::yq yq @endlink @link\n+ * icp_qat_fw_maths_point_verify_gfp_521_input::q q @endlink @link\n+ * icp_qat_fw_maths_point_verify_gfp_521_input::a a @endlink @link\n+ * icp_qat_fw_maths_point_verify_gfp_521_input::b b @endlink\n+ * @li no output parameters\n+ */\n+#define PKE_KPT_ECDSA_SIGN_RS_GFP_L256 0x1b6b182c\n+/**< Functionality ID for KPT ECDSA GFP Sign RS\n+ * @li 3 input parameters : @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gfp_l256_input::in in @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gfp_l256_input::d d @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gfp_l256_input::c c @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gfp_l256_output::r r @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gfp_l256_output::s s @endlink\n+ */\n+#define PKE_KPT_ECDSA_SIGN_RS_GFP_L512 0x7439179f\n+/**< Functionality ID for KPT ECDSA GFP Sign RS\n+ * @li 3 input parameters : @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gfp_l512_input::in in @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gfp_l512_input::d d @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gfp_l512_input::c c @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gfp_l512_output::r r @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gfp_l512_output::s s @endlink\n+ */\n+#define PKE_KPT_ECDSA_SIGN_RS_GFP_521 0x3b7a190c\n+/**< Functionality ID for KPT ECDSA GFP Sign RS\n+ * @li 3 input parameters : @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gfp_521_input::in in @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gfp_521_input::d d @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gfp_521_input::c c @endlink\n+ * @li 2 output parameters : @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gfp_521_output::r r @endlink @link\n+ * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gfp_521_output::s s @endlink\n+ */\n+\n+#define PKE_LIVENESS 0x00000001\n+/**< Functionality ID for PKE_LIVENESS\n+ * @li 0 input parameter(s)\n+ * @li 1 output parameter(s) (8 qwords)\n+ */\n+#define PKE_INTERFACE_SIGNATURE 0x972ded54\n+/**< Encoded signature of the interface specifications\n+ */\n+\n+#define PKE_INVALID_FUNC_ID 0xffffffff\n+\n+#endif /* __ICP_QAT_FW_MMP_IDS__ */\ndiff --git a/drivers/common/qat/qat_adf/icp_qat_fw_pke.h b/drivers/common/qat/qat_adf/icp_qat_fw_pke.h\nnew file mode 100644\nindex 0000000..1c1560a\n--- /dev/null\n+++ b/drivers/common/qat/qat_adf/icp_qat_fw_pke.h\n@@ -0,0 +1,426 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019 Intel Corporation\n+ */\n+\n+/**\n+ * @file icp_qat_fw_pke.h\n+ * @defgroup icp_qat_fw_pke ICP QAT FW PKE Processing Definitions\n+ * @ingroup icp_qat_fw\n+ * Revision: 0.1\n+ * @brief\n+ *      This file documents the external interfaces that the QAT FW running\n+ *      on the QAT Acceleration Engine provides to clients wanting to\n+ *      accelerate crypto assymetric applications\n+ */\n+\n+#ifndef _ICP_QAT_FW_PKE_H_\n+#define _ICP_QAT_FW_PKE_H_\n+\n+/*\n+ * Keep all dpdk-specific changes in this section\n+ */\n+\n+#include <stdint.h>\n+\n+typedef uint8_t u8;\n+typedef uint16_t u16;\n+typedef uint32_t u32;\n+typedef uint64_t u64;\n+\n+/* End of DPDK-specific section\n+ * Don't modify below this.\n+ */\n+\n+/*\n+ ****************************************************************************\n+ * Include local header files\n+ ****************************************************************************\n+ */\n+#include \"icp_qat_fw.h\"\n+\n+/**\n+ *****************************************************************************\n+ *\n+ * @ingroup icp_qat_fw_pke\n+ *\n+ * @brief\n+ *      PKE response status field structure contained\n+ *      within LW1, comprising the common error codes and\n+ *      the response flags.\n+ *\n+ *****************************************************************************/\n+struct icp_qat_fw_pke_resp_status {\n+\tu8 comn_err_code;\n+\t/**< 8 bit common error code */\n+\n+\tu8 pke_resp_flags;\n+\t/**< 8-bit PKE response flags  */\n+};\n+\n+/**\n+ *****************************************************************************\n+ * @ingroup icp_qat_fw_pke\n+ *      Definition of the QAT FW PKE request header pars field.\n+ *\n+ * @description\n+ *      PKE request message header pars structure\n+ *\n+ *****************************************************************************/\n+struct icp_qat_fw_req_hdr_pke_cd_pars {\n+\t/**< LWs 2-3 */\n+\tu64 content_desc_addr;\n+\t/**< Content descriptor pointer */\n+\n+\t/**< LW 4 */\n+\tu32 content_desc_resrvd;\n+\t/**< Content descriptor reserved field */\n+\n+\t/**< LW 5 */\n+\tu32 func_id;\n+\t/**< MMP functionality Id */\n+};\n+\n+/**\n+ *****************************************************************************\n+ * @ingroup icp_qat_fw_pke\n+ *      Definition of the QAT FW PKE request header mid section.\n+ *\n+ * @description\n+ *      PKE request message header middle structure\n+ *\n+ *****************************************************************************/\n+struct icp_qat_fw_req_pke_mid {\n+\t/**< LWs 6-11 */\n+\tu64 opaque;\n+\t/**< Opaque data passed unmodified from the request to response messages\n+\t * by firmware (fw)\n+\t */\n+\n+\tu64 src_data_addr;\n+\t/**< Generic definition of the source data supplied to the QAT AE. The\n+\t * common flags are used to further describe the attributes of this\n+\t * field\n+\t */\n+\n+\tu64 dest_data_addr;\n+\t/**< Generic definition of the destination data supplied to the QAT AE.\n+\t * The common flags are used to further describe the attributes of this\n+\t * field\n+\t */\n+};\n+\n+/**\n+ *****************************************************************************\n+ * @ingroup icp_qat_fw_pke\n+ *      Definition of the QAT FW PKE request header.\n+ *\n+ * @description\n+ *      PKE request message header structure\n+ *\n+ *****************************************************************************/\n+struct icp_qat_fw_req_pke_hdr {\n+\t/**< LW0 */\n+\tu8 resrvd1;\n+\t/**< reserved field */\n+\n+\tu8 resrvd2;\n+\t/**< reserved field */\n+\n+\tu8 service_type;\n+\t/**< Service type */\n+\n+\tu8 hdr_flags;\n+\t/**< This represents a flags field for the Service Request.\n+\t * The most significant bit is the 'valid' flag and the only\n+\t * one used. All remaining bit positions are unused and\n+\t * are therefore reserved and need to be set to 0.\n+\t */\n+\n+\t/**< LW1 */\n+\tu16 comn_req_flags;\n+\t/**< Common Request flags must indicate flat buffer\n+\t * Common Request flags - PKE slice flags no longer used - slice\n+\t * allocated to a threadstrand.\n+\t */\n+\n+\tu8 kpt_mask;\n+\t/** < KPT input parameters array mask, indicate which node in array is\n+\t *encrypted\n+\t */\n+\n+\tu8 kpt_rn_mask;\n+\t/**< KPT random node(RN) mask - indicate which node is RN that QAT\n+\t * should generate itself.\n+\t */\n+\n+\t/**< LWs 2-5 */\n+\tstruct icp_qat_fw_req_hdr_pke_cd_pars cd_pars;\n+\t/**< PKE request message header pars structure */\n+};\n+\n+/**\n+ ***************************************************************************\n+ *\n+ * @ingroup icp_qat_fw_pke\n+ *\n+ * @brief\n+ *      PKE request message structure (64 bytes)\n+ *\n+ *****************************************************************************/\n+struct icp_qat_fw_pke_request {\n+\t/**< LWs 0-5 */\n+\tstruct icp_qat_fw_req_pke_hdr pke_hdr;\n+\t/**< Request header for PKE - CD Header/Param size  must be zero */\n+\n+\t/**< LWs 6-11 */\n+\tstruct icp_qat_fw_req_pke_mid pke_mid;\n+\t/**< Request middle section for PKE */\n+\n+\t/**< LW 12 */\n+\tu8 output_param_count;\n+\t/**< Number of output large integers for request */\n+\n+\tu8 input_param_count;\n+\t/**< Number of input large integers for request */\n+\n+\tu16 resrvd1;\n+\t/** Reserved **/\n+\n+\t/**< LW 13 */\n+\tu32 resrvd2;\n+\t/**< Reserved */\n+\n+\t/**< LWs 14-15 */\n+\tu64 next_req_adr;\n+\t/** < PKE - next request address */\n+};\n+\n+/**\n+ *****************************************************************************\n+ *\n+ * @ingroup icp_qat_fw_pke\n+ *\n+ * @brief\n+ *      PKE response message header structure\n+ *\n+ *****************************************************************************/\n+struct icp_qat_fw_resp_pke_hdr {\n+\t/**< LW0 */\n+\tu8 resrvd1;\n+\t/**< Reserved */\n+\n+\tu8 resrvd2;\n+\t/**< Reserved */\n+\n+\tu8 response_type;\n+\t/**< Response type - copied from the request to the response message */\n+\n+\tu8 hdr_flags;\n+\t/**< This represents a flags field for the Response.\n+\t * The most significant bit is the 'valid' flag and the only\n+\t * one used. All remaining bit positions are unused and\n+\t * are therefore reserved\n+\t */\n+\n+\t/**< LW1 */\n+\tstruct icp_qat_fw_pke_resp_status resp_status;\n+\n+\tu16 resrvd4;\n+\t/**< Set to zero. */\n+};\n+\n+/**\n+ *****************************************************************************\n+ *\n+ * @ingroup icp_qat_fw_pke\n+ *\n+ * @brief\n+ *      PKE response message structure (32 bytes)\n+ *\n+ *****************************************************************************/\n+struct icp_qat_fw_pke_resp {\n+\t/**< LWs 0-1 */\n+\tstruct icp_qat_fw_resp_pke_hdr pke_resp_hdr;\n+\t/**< Response header for PKE */\n+\n+\t/**< LWs 2-3 */\n+\tu64 opaque;\n+\t/**< Opaque data passed from the request to the response message */\n+\n+\t/**< LWs 4-5 */\n+\tu64 src_data_addr;\n+\t/**< Generic definition of the source data supplied to the QAT AE. The\n+\t * common flags are used to further describe the attributes of this\n+\t * field\n+\t */\n+\n+\t/**< LWs 6-7 */\n+\tu64 dest_data_addr;\n+\t/**< Generic definition of the destination data supplied to the QAT AE.\n+\t * The common flags are used to further describe the attributes of this\n+\t * field\n+\t */\n+};\n+\n+/* ========================================================================= */\n+/* MACRO DEFINITIONS                                                         */\n+/* ========================================================================= */\n+\n+/**< @ingroup icp_qat_fw_pke\n+ * Macro defining the bit position and mask of the 'valid' flag, within the\n+ * hdr_flags field of LW0 (service request and response) of the PKE request\n+ */\n+#define ICP_QAT_FW_PKE_HDR_VALID_FLAG_BITPOS 7\n+#define ICP_QAT_FW_PKE_HDR_VALID_FLAG_MASK 0x1\n+\n+/**< @ingroup icp_qat_fw_pke\n+ * Macro defining the bit position and mask of the PKE status flag, within the\n+ * status field LW1 of a PKE response message\n+ */\n+#define QAT_COMN_RESP_PKE_STATUS_BITPOS 6\n+/**< @ingroup icp_qat_fw_pke\n+ * Starting bit position indicating the PKE status flag within the PKE response\n+ * pke_resp_flags byte.\n+ */\n+\n+#define QAT_COMN_RESP_PKE_STATUS_MASK 0x1\n+/**< @ingroup icp_qat_fw_pke\n+ * One bit mask used to determine PKE status mask\n+ */\n+\n+/*\n+ *  < @ingroup icp_qat_fw_pke\n+ *  *** PKE Response Status Field Definition ***\n+ *  The PKE response follows the CPM 1.5 message format. The status field is\n+ *  16 bits wide, where the status flags are contained within the most\n+ *  significant byte of the icp_qat_fw_pke_resp_status structure.\n+ *  The lower 8 bits of this word now contain the common error codes,\n+ *  which are defined in the common header file(*).\n+ */\n+/*  +=====+-----+----+-----+-----+-----+-----+-----+-----+---------------------+\n+ *  | Bit |  15 | 14 | 13  | 12  | 11  | 10  |  9  |  8  |    [7....0]         |\n+ *  +=====+-----+----+-----+-----+-----+-----+-----+-----+---------------------+\n+ *  |Flags|Rsrvd|Pke |Rsrvd|Rsrvd|Rsrvd|Rsrvd|Rsrvd|Rsrvd|Common error codes(*)|\n+ *  +=====+-----+----+-----+-----+-----+-----+-----+-----+---------------------+\n+ */\n+\n+/**\n+ ******************************************************************************\n+ * @ingroup icp_qat_fw_pke\n+ *\n+ * @description\n+ *     Macro for extraction of the PKE bit from the 16-bit status field\n+ *     particular to a PKE response. The status flags are contained within\n+ *     the most significant byte of the word. The lower 8 bits of this status\n+ *     word now contain the common error codes, which are defined in the common\n+ *     header file. The appropriate macro definition to extract the PKE status\n+ *     lag from the PKE response assumes that a single byte i.e. pke_resp_flags\n+ *     is passed to the macro.\n+ *\n+ * @param status\n+ *     Status to extract the PKE status bit\n+ *\n+ *****************************************************************************/\n+#define ICP_QAT_FW_PKE_RESP_PKE_STAT_GET(flags)                                \\\n+\tQAT_FIELD_GET((flags), QAT_COMN_RESP_PKE_STATUS_BITPOS,                \\\n+\t\t      QAT_COMN_RESP_PKE_STATUS_MASK)\n+\n+/**\n+ ******************************************************************************\n+ * @ingroup icp_qat_fw_pke\n+ *\n+ * @description\n+ *      Extract the valid flag from the PKE Request's header flags. Note that\n+ *      this invokes the common macro which may be used by either the request\n+ *      or the response.\n+ *\n+ * @param icp_qat_fw_req_pke_hdr    Structure passed to extract the valid bit\n+ *                                  from the 'hdr_flags' field.\n+ *\n+ *****************************************************************************/\n+#define ICP_QAT_FW_PKE_RQ_VALID_FLAG_GET(icp_qat_fw_req_pke_hdr)               \\\n+\tICP_QAT_FW_PKE_HDR_VALID_FLAG_GET(icp_qat_fw_req_pke_hdr)\n+\n+/**\n+ ******************************************************************************\n+ * @ingroup icp_qat_fw_pke\n+ *\n+ * @description\n+ *      Set the valid bit in the PKE Request's header flags. Note that\n+ *      this invokes the common macro which may be used by either the request\n+ *      or the response.\n+ *\n+ * @param icp_qat_fw_req_pke_hdr    Structure passed to set the valid bit.\n+ * @param val    Value of the valid bit flag.\n+ *\n+ *****************************************************************************/\n+#define ICP_QAT_FW_PKE_RQ_VALID_FLAG_SET(icp_qat_fw_req_pke_hdr, val)          \\\n+\tICP_QAT_FW_PKE_HDR_VALID_FLAG_SET(icp_qat_fw_req_pke_hdr, val)\n+\n+/**\n+ ******************************************************************************\n+ * @ingroup icp_qat_fw_pke\n+ *\n+ * @description\n+ *      Extract the valid flag from the PKE Response's header flags. Note that\n+ *      invokes the common macro which may be used by either the request\n+ *      or the response.\n+ *\n+ * @param icp_qat_fw_resp_pke_hdr    Structure to extract the valid bit\n+ *                                   from the 'hdr_flags' field.\n+ *\n+ *****************************************************************************/\n+#define ICP_QAT_FW_PKE_RESP_VALID_FLAG_GET(icp_qat_fw_resp_pke_hdr)            \\\n+\tICP_QAT_FW_PKE_HDR_VALID_FLAG_GET(icp_qat_fw_resp_pke_hdr)\n+\n+/**\n+ ******************************************************************************\n+ * @ingroup icp_qat_fw_pke\n+ *\n+ * @description\n+ *      Set the valid bit in the PKE Response's header flags. Note that\n+ *      this invokes the common macro which may be used by either the\n+ *      request or the response.\n+ *\n+ * @param icp_qat_fw_resp_pke_hdr    Structure to set the valid bit\n+ * @param val    Value of the valid bit flag.\n+ *\n+ *****************************************************************************/\n+#define ICP_QAT_FW_PKE_RESP_VALID_FLAG_SET(icp_qat_fw_resp_pke_hdr, val)       \\\n+\tICP_QAT_FW_PKE_HDR_VALID_FLAG_SET(icp_qat_fw_resp_pke_hdr, val)\n+\n+/**\n+ ******************************************************************************\n+ * @ingroup icp_qat_fw_pke\n+ *\n+ * @description\n+ *      Common macro to extract the valid flag from the header flags field\n+ *      within the header structure (request or response).\n+ *\n+ * @param hdr    Structure (request or response) to extract the\n+ *               valid bit from the 'hdr_flags' field.\n+ *\n+ *****************************************************************************/\n+#define ICP_QAT_FW_PKE_HDR_VALID_FLAG_GET(hdr)                                 \\\n+\tQAT_FIELD_GET(hdr.hdr_flags, ICP_QAT_FW_PKE_HDR_VALID_FLAG_BITPOS,     \\\n+\t\t      ICP_QAT_FW_PKE_HDR_VALID_FLAG_MASK)\n+\n+/**\n+ ******************************************************************************\n+ * @ingroup icp_qat_fw_pke\n+ *\n+ * @description\n+ *      Common macro to set the valid bit in the header flags field within\n+ *      the header structure (request or response).\n+ *\n+ * @param hdr    Structure (request or response) containing the header\n+ *               flags field, to allow the valid bit to be set.\n+ * @param val    Value of the valid bit flag.\n+ *\n+ *****************************************************************************/\n+#define ICP_QAT_FW_PKE_HDR_VALID_FLAG_SET(hdr, val)                            \\\n+\tQAT_FIELD_SET((hdr.hdr_flags), (val),                                  \\\n+\t\t      ICP_QAT_FW_PKE_HDR_VALID_FLAG_BITPOS,                    \\\n+\t\t      ICP_QAT_FW_PKE_HDR_VALID_FLAG_MASK)\n+\n+#endif /* _ICP_QAT_FW_PKE_H_ */\ndiff --git a/drivers/common/qat/qat_adf/qat_pke_functionality_arrays.h b/drivers/common/qat/qat_adf/qat_pke_functionality_arrays.h\nnew file mode 100644\nindex 0000000..1fdb45a\n--- /dev/null\n+++ b/drivers/common/qat/qat_adf/qat_pke_functionality_arrays.h\n@@ -0,0 +1,52 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019 Intel Corporation\n+ */\n+\n+#ifndef _QAT_PKE_FUNCTIONALITY_ARRAYS_H_\n+#define _QAT_PKE_FUNCTIONALITY_ARRAYS_H_\n+\n+#include \"icp_qat_fw_mmp_ids.h\"\n+\n+/*\n+ * Modular exponentiation functionality IDs\n+ */\n+static const uint32_t __rte_unused MOD_EXP_SIZE[][2] = {\n+\t\t{ 512,\tMATHS_MODEXP_L512 },\n+\t\t{ 1024, MATHS_MODEXP_L1024 },\n+\t\t{ 1536,\tMATHS_MODEXP_L1536 },\n+\t\t{ 2048, MATHS_MODEXP_L2048 },\n+\t\t{ 2560, MATHS_MODEXP_L2560 },\n+\t\t{ 3072, MATHS_MODEXP_L3072 },\n+\t\t{ 3584, MATHS_MODEXP_L3584 },\n+\t\t{ 4096, MATHS_MODEXP_L4096 }\n+};\n+\n+static const uint32_t __rte_unused MOD_INV_IDS_ODD[][2] = {\n+\t\t{ 128,\tMATHS_MODINV_ODD_L128 },\n+\t\t{ 192,\tMATHS_MODINV_ODD_L192 },\n+\t\t{ 256,  MATHS_MODINV_ODD_L256 },\n+\t\t{ 384,\tMATHS_MODINV_ODD_L384 },\n+\t\t{ 512,\tMATHS_MODINV_ODD_L512 },\n+\t\t{ 768,\tMATHS_MODINV_ODD_L768 },\n+\t\t{ 1024, MATHS_MODINV_ODD_L1024 },\n+\t\t{ 1536, MATHS_MODINV_ODD_L1536 },\n+\t\t{ 2048, MATHS_MODINV_ODD_L2048 },\n+\t\t{ 3072, MATHS_MODINV_ODD_L3072 },\n+\t\t{ 4096, MATHS_MODINV_ODD_L4096 },\n+};\n+\n+static const uint32_t __rte_unused MOD_INV_IDS_EVEN[][2] = {\n+\t\t{ 128,\tMATHS_MODINV_EVEN_L128 },\n+\t\t{ 192,\tMATHS_MODINV_EVEN_L192 },\n+\t\t{ 256,\tMATHS_MODINV_EVEN_L256 },\n+\t\t{ 384,\tMATHS_MODINV_EVEN_L384 },\n+\t\t{ 512,\tMATHS_MODINV_EVEN_L512 },\n+\t\t{ 768,\tMATHS_MODINV_EVEN_L768 },\n+\t\t{ 1024, MATHS_MODINV_EVEN_L1024 },\n+\t\t{ 1536, MATHS_MODINV_EVEN_L1536 },\n+\t\t{ 2048, MATHS_MODINV_EVEN_L2048 },\n+\t\t{ 3072, MATHS_MODINV_EVEN_L3072 },\n+\t\t{ 4096, MATHS_MODINV_EVEN_L4096 },\n+};\n+\n+#endif\n",
    "prefixes": [
        "v4",
        "1/4"
    ]
}