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GET /api/patches/51127/?format=api
{ "id": 51127, "url": "http://patches.dpdk.org/api/patches/51127/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/13dc16dc55b42d6ba0df358ad727308938fde8cf.1552402263.git.igor.russkikh@aquantia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<13dc16dc55b42d6ba0df358ad727308938fde8cf.1552402263.git.igor.russkikh@aquantia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/13dc16dc55b42d6ba0df358ad727308938fde8cf.1552402263.git.igor.russkikh@aquantia.com", "date": "2019-03-12T15:24:59", "name": "[v3,05/10] net/atlantic: use EEPROM magic as a device address", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "818d38a780afb3fe8d60107060e844ed3bc0a38c", "submitter": { "id": 1124, "url": "http://patches.dpdk.org/api/people/1124/?format=api", "name": "Igor Russkikh", "email": "igor.russkikh@aquantia.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/13dc16dc55b42d6ba0df358ad727308938fde8cf.1552402263.git.igor.russkikh@aquantia.com/mbox/", "series": [ { "id": 3719, "url": "http://patches.dpdk.org/api/series/3719/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=3719", "date": "2019-03-12T15:24:49", "name": "net/atlantic: bugfixes and code cleanup", "version": 3, "mbox": "http://patches.dpdk.org/series/3719/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/51127/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/51127/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 5A64C5592;\n\tTue, 12 Mar 2019 16:25:03 +0100 (CET)", "from NAM03-BY2-obe.outbound.protection.outlook.com\n\t(mail-eopbgr780087.outbound.protection.outlook.com [40.107.78.87])\n\tby dpdk.org (Postfix) with ESMTP id 5D2B64F93\n\tfor <dev@dpdk.org>; Tue, 12 Mar 2019 16:25:01 +0100 (CET)", "from DM6PR11MB3625.namprd11.prod.outlook.com (20.178.230.149) by\n\tDM6PR11MB2747.namprd11.prod.outlook.com (20.176.100.10) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n\t15.20.1686.18; Tue, 12 Mar 2019 15:24:59 +0000", "from DM6PR11MB3625.namprd11.prod.outlook.com\n\t([fe80::d145:a1f4:ed34:e31b]) by\n\tDM6PR11MB3625.namprd11.prod.outlook.com\n\t([fe80::d145:a1f4:ed34:e31b%3]) with mapi id 15.20.1686.021;\n\tTue, 12 Mar 2019 15:24:59 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=AQUANTIA1COM.onmicrosoft.com; s=selector1-aquantia-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=4E/sLDIyoShPPI0v0ri6IFqjBml1650h70sAeRsnN2I=;\n\tb=rySAzpM6t9EcWcSw31RS/K9jajIDWlwbDLttitXW64W/P7xeBF/AKVmZOFbXGxHcW3C5jey7EIilHP8oo/kdEdT1TiWp/QYpZGIntSh8NR1lb6xn1Z2hrPnTbjDifETNjV3258dfazbSnP8vg8m4MxpCrp2FlHKT0ZUGDz3A5Lc=", "From": "Igor Russkikh <Igor.Russkikh@aquantia.com>", "To": "\"dev@dpdk.org\" <dev@dpdk.org>", "CC": "Pavel Belous <Pavel.Belous@aquantia.com>, Igor Russkikh\n\t<Igor.Russkikh@aquantia.com>, Pavel Belous <Pavel.Belous@aquantia.com>", "Thread-Topic": "[PATCH v3 05/10] net/atlantic: use EEPROM magic as a device\n\taddress", "Thread-Index": "AQHU2OfBHYDDICbFE0mHbxUJxXx3LQ==", "Date": "Tue, 12 Mar 2019 15:24:59 +0000", "Message-ID": "<13dc16dc55b42d6ba0df358ad727308938fde8cf.1552402263.git.igor.russkikh@aquantia.com>", "References": "<cover.1552402263.git.igor.russkikh@aquantia.com>", "In-Reply-To": "<cover.1552402263.git.igor.russkikh@aquantia.com>", "Accept-Language": "en-US", "Content-Language": "en-US", "X-MS-Has-Attach": "", "X-MS-TNEF-Correlator": "", "x-clientproxiedby": "HE1PR0901CA0050.eurprd09.prod.outlook.com\n\t(2603:10a6:3:45::18) To DM6PR11MB3625.namprd11.prod.outlook.com\n\t(2603:10b6:5:13a::21)", "authentication-results": "spf=none (sender IP is )\n\tsmtp.mailfrom=Igor.Russkikh@aquantia.com; ", "x-ms-exchange-messagesentrepresentingtype": "1", "x-mailer": "git-send-email 2.17.1", "x-originating-ip": "[95.79.108.179]", "x-ms-publictraffictype": "Email", "x-ms-office365-filtering-correlation-id": "553eefff-3191-4a17-0b10-08d6a6fee3da", "x-microsoft-antispam": "BCL:0; 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(protection.outlook.com: aquantia.com does not designate\n\tpermitted sender hosts)", "x-ms-exchange-senderadcheck": "1", "x-microsoft-antispam-message-info": "R3wtSP+XkTvOWUC7B2LdCXxrhAZkktt1/i/ID+rAgUDl0/zy3Uz0sXAHXfC8gl82IxhKsXYo+7YWvxT80T6Igf2bv3lUSYqSxWh4anb1GcmbpyroTYknp5OG//QJVXQDRLKZCXZ6P6GO1rSf9tm7sJtceRvTNRuY+XYIi34VFpRReZFZDffzpCwsGFIdChVWNHGxmotu1g0JYCgmx4fZrMGP+pPpFvdYmKSiqifdxTs2VVXFS6PQxW8Y9M4BbelSA44dHtML3yCIp+fCrSlNzwDUbBS+FLdqdg8PAJubkPPDeXhq540zSy6TiZlrLqsG66dltAZF1xCVz0zWeAwIk//aWWpLjqu1gqSDGgvgPkWxN63xkWnCNQLWJC3Ynf9BGHsmIC+Z1QdCB66n/ARNZTV7Mm5jlC32nvd8geF0Dls=", "Content-Type": "text/plain; charset=\"iso-8859-1\"", "Content-Transfer-Encoding": "quoted-printable", "MIME-Version": "1.0", "X-OriginatorOrg": "aquantia.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "553eefff-3191-4a17-0b10-08d6a6fee3da", "X-MS-Exchange-CrossTenant-originalarrivaltime": "12 Mar 2019 15:24:59.7898\n\t(UTC)", "X-MS-Exchange-CrossTenant-fromentityheader": "Hosted", "X-MS-Exchange-CrossTenant-id": "83e2e134-991c-4ede-8ced-34d47e38e6b1", "X-MS-Exchange-CrossTenant-mailboxtype": "HOSTED", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM6PR11MB2747", "Subject": "[dpdk-dev] [PATCH v3 05/10] net/atlantic: use EEPROM magic as a\n\tdevice address", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Pavel Belous <Pavel.Belous@aquantia.com>\n\nDefault dev addr is replaced with magic field from the request.\nLength is allowed to be less than maximum.\nSMBUS access bit definitions also better organised now.\n\nSigned-off-by: Igor Russkikh <igor.russkikh@aquantia.com>\nSigned-off-by: Pavel Belous <Pavel.Belous@aquantia.com>\n---\n drivers/net/atlantic/atl_ethdev.c | 25 +++++++++++-----\n drivers/net/atlantic/atl_types.h | 7 +++--\n drivers/net/atlantic/hw_atl/hw_atl_utils.c | 4 +++\n drivers/net/atlantic/hw_atl/hw_atl_utils.h | 23 +++++++-------\n .../net/atlantic/hw_atl/hw_atl_utils_fw2x.c | 30 +++++++++++--------\n 5 files changed, 58 insertions(+), 31 deletions(-)", "diff": "diff --git a/drivers/net/atlantic/atl_ethdev.c b/drivers/net/atlantic/atl_ethdev.c\nindex 5bc04f55cc21..a510646a5f7e 100644\n--- a/drivers/net/atlantic/atl_ethdev.c\n+++ b/drivers/net/atlantic/atl_ethdev.c\n@@ -1102,24 +1102,31 @@ atl_dev_get_eeprom_length(struct rte_eth_dev *dev __rte_unused)\n \treturn SFP_EEPROM_SIZE;\n }\n \n-static int\n-atl_dev_get_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *eeprom)\n+int atl_dev_get_eeprom(struct rte_eth_dev *dev,\n+\t\t struct rte_dev_eeprom_info *eeprom)\n {\n \tstruct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tuint32_t dev_addr = SMBUS_DEVICE_ID;\n \n \tif (hw->aq_fw_ops->get_eeprom == NULL)\n \t\treturn -ENOTSUP;\n \n-\tif (eeprom->length != SFP_EEPROM_SIZE || eeprom->data == NULL)\n+\tif (eeprom->length + eeprom->offset > SFP_EEPROM_SIZE ||\n+\t eeprom->data == NULL)\n \t\treturn -EINVAL;\n \n-\treturn hw->aq_fw_ops->get_eeprom(hw, eeprom->data, eeprom->length);\n+\tif (eeprom->magic)\n+\t\tdev_addr = eeprom->magic;\n+\n+\treturn hw->aq_fw_ops->get_eeprom(hw, dev_addr, eeprom->data,\n+\t\t\t\t\t eeprom->length, eeprom->offset);\n }\n \n-static int\n-atl_dev_set_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *eeprom)\n+int atl_dev_set_eeprom(struct rte_eth_dev *dev,\n+\t\t struct rte_dev_eeprom_info *eeprom)\n {\n \tstruct aq_hw_s *hw = ATL_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tuint32_t dev_addr = SMBUS_DEVICE_ID;\n \n \tif (hw->aq_fw_ops->set_eeprom == NULL)\n \t\treturn -ENOTSUP;\n@@ -1127,7 +1134,11 @@ atl_dev_set_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *eeprom)\n \tif (eeprom->length != SFP_EEPROM_SIZE || eeprom->data == NULL)\n \t\treturn -EINVAL;\n \n-\treturn hw->aq_fw_ops->set_eeprom(hw, eeprom->data, eeprom->length);\n+\tif (eeprom->magic)\n+\t\tdev_addr = eeprom->magic;\n+\n+\treturn hw->aq_fw_ops->set_eeprom(hw, dev_addr,\n+\t\t\t\t\t eeprom->data, eeprom->length);\n }\n \n static int\ndiff --git a/drivers/net/atlantic/atl_types.h b/drivers/net/atlantic/atl_types.h\nindex 3d90f6caefc2..3edaf0c7c047 100644\n--- a/drivers/net/atlantic/atl_types.h\n+++ b/drivers/net/atlantic/atl_types.h\n@@ -137,9 +137,12 @@ struct aq_fw_ops {\n \n \tint (*led_control)(struct aq_hw_s *self, u32 mode);\n \n-\tint (*get_eeprom)(struct aq_hw_s *self, u32 *data, u32 len);\n+\tint (*get_eeprom)(struct aq_hw_s *self, int dev_addr,\n+\t\t\t u32 *data, u32 len, u32 offset);\n+\n+\tint (*set_eeprom)(struct aq_hw_s *self, int dev_addr,\n+\t\t\t u32 *data, u32 len);\n \n-\tint (*set_eeprom)(struct aq_hw_s *self, u32 *data, u32 len);\n };\n \n struct atl_sw_stats {\ndiff --git a/drivers/net/atlantic/hw_atl/hw_atl_utils.c b/drivers/net/atlantic/hw_atl/hw_atl_utils.c\nindex 13f02b9f99c5..4299b7016e2f 100644\n--- a/drivers/net/atlantic/hw_atl/hw_atl_utils.c\n+++ b/drivers/net/atlantic/hw_atl/hw_atl_utils.c\n@@ -305,6 +305,10 @@ int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a,\n \t\t\tAQ_HW_WAIT_FOR(!(0x100 & aq_hw_read_reg(self,\n \t\t\t\t\t\t\t HW_ATL_MIF_CMD)),\n \t\t\t\t 1, 1000U);\n+\t\t\tif (err) {\n+\t\t\t\terr = -ETIMEDOUT;\n+\t\t\t\tgoto err_exit;\n+\t\t\t}\n \n \t\t*(p++) = aq_hw_read_reg(self, HW_ATL_MIF_VAL);\n \t\ta += 4;\ndiff --git a/drivers/net/atlantic/hw_atl/hw_atl_utils.h b/drivers/net/atlantic/hw_atl/hw_atl_utils.h\nindex 5f3f70847310..f2a87826c0d1 100644\n--- a/drivers/net/atlantic/hw_atl/hw_atl_utils.h\n+++ b/drivers/net/atlantic/hw_atl/hw_atl_utils.h\n@@ -8,6 +8,7 @@\n #ifndef HW_ATL_UTILS_H\n #define HW_ATL_UTILS_H\n \n+#define BIT(x) (1UL << (x))\n #define HW_ATL_FLUSH() { (void)aq_hw_read_reg(self, 0x10); }\n \n /* Hardware tx descriptor */\n@@ -389,18 +390,8 @@ enum hal_atl_utils_fw_state_e {\n #define HAL_ATLANTIC_UTILS_FW_MSG_OFFLOAD_DEL 10U\n #define HAL_ATLANTIC_UTILS_FW_MSG_CABLE_DIAG 13U // 0xd\n \n-#define SMBUS_READ_REQUEST BIT(13)\n-#define SMBUS_WRITE_REQUEST BIT(14)\n #define SMBUS_DEVICE_ID 0x50\n \n-enum hw_atl_fw2x_rate {\n-\tFW2X_RATE_100M = 0x20,\n-\tFW2X_RATE_1G = 0x100,\n-\tFW2X_RATE_2G5 = 0x200,\n-\tFW2X_RATE_5G = 0x400,\n-\tFW2X_RATE_10G = 0x800,\n-};\n-\n enum hw_atl_fw2x_caps_lo {\n \tCAPS_LO_10BASET_HD = 0x00,\n \tCAPS_LO_10BASET_FD,\n@@ -414,6 +405,10 @@ enum hw_atl_fw2x_caps_lo {\n \tCAPS_LO_2P5GBASET_FD,\n \tCAPS_LO_5GBASET_FD,\n \tCAPS_LO_10GBASET_FD,\n+\tCAPS_LO_AUTONEG,\n+\tCAPS_LO_SMBUS_READ,\n+\tCAPS_LO_SMBUS_WRITE,\n+\tCAPS_LO_MACSEC\n };\n \n enum hw_atl_fw2x_caps_hi {\n@@ -451,6 +446,14 @@ enum hw_atl_fw2x_caps_hi {\n \tCAPS_HI_TRANSACTION_ID,\n };\n \n+enum hw_atl_fw2x_rate {\n+\tFW2X_RATE_100M = BIT(CAPS_LO_100BASETX_FD),\n+\tFW2X_RATE_1G = BIT(CAPS_LO_1000BASET_FD),\n+\tFW2X_RATE_2G5 = BIT(CAPS_LO_2P5GBASET_FD),\n+\tFW2X_RATE_5G = BIT(CAPS_LO_5GBASET_FD),\n+\tFW2X_RATE_10G = BIT(CAPS_LO_10GBASET_FD),\n+};\n+\n struct aq_hw_s;\n struct aq_fw_ops;\n struct aq_hw_link_status_s;\ndiff --git a/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c b/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c\nindex f90ccfe9e010..1d9190155421 100644\n--- a/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c\n+++ b/drivers/net/atlantic/hw_atl/hw_atl_utils_fw2x.c\n@@ -129,7 +129,11 @@ static u32 fw2x_to_eee_mask(u32 speed)\n \n static int aq_fw2x_set_link_speed(struct aq_hw_s *self, u32 speed)\n {\n-\tu32 val = link_speed_mask_2fw2x_ratemask(speed);\n+\tu32 rate_mask = link_speed_mask_2fw2x_ratemask(speed);\n+\tu32 reg_val = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR);\n+\tu32 val = rate_mask | ((BIT(CAPS_LO_SMBUS_READ) |\n+\t\t\t\tBIT(CAPS_LO_SMBUS_WRITE) |\n+\t\t\t\tBIT(CAPS_LO_MACSEC)) & reg_val);\n \n \taq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR, val);\n \n@@ -484,7 +488,8 @@ static int aq_fw2x_led_control(struct aq_hw_s *self, u32 mode)\n \treturn 0;\n }\n \n-static int aq_fw2x_get_eeprom(struct aq_hw_s *self, u32 *data, u32 len)\n+static int aq_fw2x_get_eeprom(struct aq_hw_s *self, int dev_addr,\n+\t\t\t u32 *data, u32 len, u32 offset)\n {\n \tint err = 0;\n \tstruct smbus_read_request request;\n@@ -494,8 +499,8 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, u32 *data, u32 len)\n \tif (self->fw_ver_actual < HW_ATL_FW_FEATURE_EEPROM)\n \t\treturn -EOPNOTSUPP;\n \n-\trequest.device_id = SMBUS_DEVICE_ID;\n-\trequest.address = 0;\n+\trequest.device_id = dev_addr;\n+\trequest.address = offset;\n \trequest.length = len;\n \n \t/* Write SMBUS request to cfg memory */\n@@ -506,16 +511,16 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, u32 *data, u32 len)\n \tif (err < 0)\n \t\treturn err;\n \n-\t/* Toggle 0x368.SMBUS_READ_REQUEST bit */\n+\t/* Toggle 0x368.CAPS_LO_SMBUS_READ bit */\n \tmpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR);\n-\tmpi_opts ^= SMBUS_READ_REQUEST;\n+\tmpi_opts ^= BIT(CAPS_LO_SMBUS_READ);\n \n \taq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR, mpi_opts);\n \n \t/* Wait until REQUEST_BIT matched in 0x370 */\n \n \tAQ_HW_WAIT_FOR((aq_hw_read_reg(self, HW_ATL_FW2X_MPI_STATE_ADDR) &\n-\t\tSMBUS_READ_REQUEST) == (mpi_opts & SMBUS_READ_REQUEST),\n+\t\tBIT(CAPS_LO_SMBUS_READ)) == (mpi_opts & BIT(CAPS_LO_SMBUS_READ)),\n \t\t10U, 10000U);\n \n \tif (err < 0)\n@@ -542,7 +547,8 @@ static int aq_fw2x_get_eeprom(struct aq_hw_s *self, u32 *data, u32 len)\n }\n \n \n-static int aq_fw2x_set_eeprom(struct aq_hw_s *self, u32 *data, u32 len)\n+static int aq_fw2x_set_eeprom(struct aq_hw_s *self, int dev_addr,\n+\t\t\t u32 *data, u32 len)\n {\n \tstruct smbus_write_request request;\n \tu32 mpi_opts, result = 0;\n@@ -551,7 +557,7 @@ static int aq_fw2x_set_eeprom(struct aq_hw_s *self, u32 *data, u32 len)\n \tif (self->fw_ver_actual < HW_ATL_FW_FEATURE_EEPROM)\n \t\treturn -EOPNOTSUPP;\n \n-\trequest.device_id = SMBUS_DEVICE_ID;\n+\trequest.device_id = dev_addr;\n \trequest.address = 0;\n \trequest.length = len;\n \n@@ -572,15 +578,15 @@ static int aq_fw2x_set_eeprom(struct aq_hw_s *self, u32 *data, u32 len)\n \tif (err < 0)\n \t\treturn err;\n \n-\t/* Toggle 0x368.SMBUS_WRITE_REQUEST bit */\n+\t/* Toggle 0x368.CAPS_LO_SMBUS_WRITE bit */\n \tmpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR);\n-\tmpi_opts ^= SMBUS_WRITE_REQUEST;\n+\tmpi_opts ^= BIT(CAPS_LO_SMBUS_WRITE);\n \n \taq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR, mpi_opts);\n \n \t/* Wait until REQUEST_BIT matched in 0x370 */\n \tAQ_HW_WAIT_FOR((aq_hw_read_reg(self, HW_ATL_FW2X_MPI_STATE_ADDR) &\n-\t\tSMBUS_WRITE_REQUEST) == (mpi_opts & SMBUS_WRITE_REQUEST),\n+\t\tBIT(CAPS_LO_SMBUS_WRITE)) == (mpi_opts & BIT(CAPS_LO_SMBUS_WRITE)),\n \t\t10U, 10000U);\n \n \tif (err < 0)\n", "prefixes": [ "v3", "05/10" ] }