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GET /api/patches/50797/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 50797,
    "url": "http://patches.dpdk.org/api/patches/50797/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190304145735.25267-1-roy.fan.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190304145735.25267-1-roy.fan.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190304145735.25267-1-roy.fan.zhang@intel.com",
    "date": "2019-03-04T14:57:35",
    "name": "[v2] crypto/aesni_mb: support newer version library only",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "1b1a3dcdab3fa73cfac0c98d55477f33b6eaedbe",
    "submitter": {
        "id": 304,
        "url": "http://patches.dpdk.org/api/people/304/?format=api",
        "name": "Fan Zhang",
        "email": "roy.fan.zhang@intel.com"
    },
    "delegate": {
        "id": 6690,
        "url": "http://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190304145735.25267-1-roy.fan.zhang@intel.com/mbox/",
    "series": [
        {
            "id": 3621,
            "url": "http://patches.dpdk.org/api/series/3621/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=3621",
            "date": "2019-03-04T14:57:35",
            "name": "[v2] crypto/aesni_mb: support newer version library only",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/3621/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/50797/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/50797/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 6573E2C18;\n\tMon,  4 Mar 2019 15:59:12 +0100 (CET)",
            "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id CE9AAF94\n\tfor <dev@dpdk.org>; Mon,  4 Mar 2019 15:59:09 +0100 (CET)",
            "from fmsmga003.fm.intel.com ([10.253.24.29])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t04 Mar 2019 06:59:07 -0800",
            "from silpixa00398673.ir.intel.com (HELO\n\tsilpixa00398673.ger.corp.intel.com) ([10.237.223.136])\n\tby FMSMGA003.fm.intel.com with ESMTP; 04 Mar 2019 06:59:05 -0800"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.58,440,1544515200\"; d=\"scan'208\";a=\"137939258\"",
        "From": "Fan Zhang <roy.fan.zhang@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "akhil.goyal@nxp.com,\n\troy.fan.zhang@intel.com,\n\tfiona.trahe@intel.com",
        "Date": "Mon,  4 Mar 2019 14:57:35 +0000",
        "Message-Id": "<20190304145735.25267-1-roy.fan.zhang@intel.com>",
        "X-Mailer": "git-send-email 2.14.5",
        "In-Reply-To": "<20190304114717.18152-1-roy.fan.zhang@intel.com>",
        "References": "<20190304114717.18152-1-roy.fan.zhang@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v2] crypto/aesni_mb: support newer version\n\tlibrary only",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "As stated in 19.02 deprecation notice, this patch updates the\naesni_mb PMD to remove the support of older Intel-ipsec-mb\nlibrary version eariler than 0.52.\n\nSigned-off-by: Fan Zhang <roy.fan.zhang@intel.com>\n---\n\nv2:\n- fixed incorrect version in documentation.\n\n doc/guides/cryptodevs/aesni_mb.rst                 |    8 +-\n doc/guides/rel_notes/deprecation.rst               |    3 -\n drivers/crypto/aesni_mb/Makefile                   |   21 +-\n drivers/crypto/aesni_mb/aesni_mb_ops.h             |  302 -----\n drivers/crypto/aesni_mb/meson.build                |   13 +-\n drivers/crypto/aesni_mb/rte_aesni_mb_pmd_compat.c  | 1313 --------------------\n .../crypto/aesni_mb/rte_aesni_mb_pmd_ops_compat.c  |  745 -----------\n drivers/crypto/aesni_mb/rte_aesni_mb_pmd_private.h |   37 -\n 8 files changed, 16 insertions(+), 2426 deletions(-)\n delete mode 100644 drivers/crypto/aesni_mb/aesni_mb_ops.h\n delete mode 100644 drivers/crypto/aesni_mb/rte_aesni_mb_pmd_compat.c\n delete mode 100644 drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops_compat.c",
    "diff": "diff --git a/doc/guides/cryptodevs/aesni_mb.rst b/doc/guides/cryptodevs/aesni_mb.rst\nindex 47f2ecc2f..66c44e03a 100644\n--- a/doc/guides/cryptodevs/aesni_mb.rst\n+++ b/doc/guides/cryptodevs/aesni_mb.rst\n@@ -57,10 +57,7 @@ Limitations\n \n * Chained mbufs are not supported.\n * Only in-place is currently supported (destination address is the same as source address).\n-* RTE_CRYPTO_AEAD_AES_GCM only works properly when the multi-buffer library is\n-  0.51.0 or newer.\n-* RTE_CRYPTO_HASH_AES_GMAC is supported by library version v0.51 or later.\n-* RTE_CRYPTO_HASH_SHA* is supported by library version v0.52 or later.\n+* Only support Intel multi buffer library version 0.52 or later.\n \n \n Installation\n@@ -92,7 +89,8 @@ and the Multi-Buffer library version supported by them:\n    17.05 - 17.08   0.45 - 0.48\n    17.11           0.47 - 0.48\n    18.02           0.48\n-   18.05+          0.49+\n+   18.05           0.49\n+   19.05+          0.52+\n    ==============  ============================\n \n \ndiff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/deprecation.rst\nindex 1b4fcb7e6..8adeaa552 100644\n--- a/doc/guides/rel_notes/deprecation.rst\n+++ b/doc/guides/rel_notes/deprecation.rst\n@@ -72,6 +72,3 @@ Deprecation Notices\n   replace ``enum rte_meter_color`` in meter library in 19.05. This will help\n   to consolidate color definition, which is currently replicated in many places,\n   such as: rte_meter.h, rte_mtr.h, rte_tm.h.\n-\n-* crypto/aesni_mb: the minimum supported intel-ipsec-mb library version will be\n-  changed from 0.49.0 to 0.52.0.\ndiff --git a/drivers/crypto/aesni_mb/Makefile b/drivers/crypto/aesni_mb/Makefile\nindex 8d2024c9e..f3035340a 100644\n--- a/drivers/crypto/aesni_mb/Makefile\n+++ b/drivers/crypto/aesni_mb/Makefile\n@@ -32,19 +32,14 @@ IMB_VERSION = $(shell grep -e \"IMB_VERSION_STR\" $(IMB_HDR) | cut -d'\"' -f2)\n IMB_VERSION_NUM = $(shell grep -e \"IMB_VERSION_NUM\" $(IMB_HDR) | cut -d' ' -f3)\n \n ifeq ($(IMB_VERSION),)\n-\t# files for older version of IMB\n-\tSRCS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_MB) += rte_aesni_mb_pmd_compat.c\n-\tSRCS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_MB) += rte_aesni_mb_pmd_ops_compat.c\n-else\n-\tifeq ($(shell expr $(IMB_VERSION_NUM) \\>= 0x3400), 1)\n-\t\t# files for a new version of IMB\n-\t\tSRCS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_MB) += rte_aesni_mb_pmd.c\n-\t\tSRCS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_MB) += rte_aesni_mb_pmd_ops.c\n-\telse\n-\t\t# files for older version of IMB\n-\t\tSRCS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_MB) += rte_aesni_mb_pmd_compat.c\n-\t\tSRCS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_MB) += rte_aesni_mb_pmd_ops_compat.c\n-\tendif\n+$(error \"IPSec_MB version >= 0.52 is required\")\n endif\n \n+ifeq ($(shell expr $(IMB_VERSION_NUM) \\< 0x3400), 1)\n+$(error \"IPSec_MB version >= 0.52 is required\")\n+endif\n+\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_MB) += rte_aesni_mb_pmd.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_MB) += rte_aesni_mb_pmd_ops.c\n+\n include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/crypto/aesni_mb/aesni_mb_ops.h b/drivers/crypto/aesni_mb/aesni_mb_ops.h\ndeleted file mode 100644\nindex 575d6a5b8..000000000\n--- a/drivers/crypto/aesni_mb/aesni_mb_ops.h\n+++ /dev/null\n@@ -1,302 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2015 Intel Corporation\n- */\n-\n-#ifndef _AESNI_MB_OPS_H_\n-#define _AESNI_MB_OPS_H_\n-\n-#ifndef LINUX\n-#define LINUX\n-#endif\n-\n-#include <intel-ipsec-mb.h>\n-\n-/*\n- * IMB_VERSION_NUM macro was introduced in version Multi-buffer 0.50,\n- * so if macro is not defined, it means that the version is 0.49.\n- */\n-#if !defined(IMB_VERSION_NUM)\n-#define IMB_VERSION(a, b, c) (((a) << 16) + ((b) << 8) + (c))\n-#define IMB_VERSION_NUM IMB_VERSION(0, 49, 0)\n-#endif\n-\n-enum aesni_mb_vector_mode {\n-\tRTE_AESNI_MB_NOT_SUPPORTED = 0,\n-\tRTE_AESNI_MB_SSE,\n-\tRTE_AESNI_MB_AVX,\n-\tRTE_AESNI_MB_AVX2,\n-\tRTE_AESNI_MB_AVX512\n-};\n-\n-typedef void (*md5_one_block_t)(const void *data, void *digest);\n-\n-typedef void (*sha1_one_block_t)(const void *data, void *digest);\n-typedef void (*sha224_one_block_t)(const void *data, void *digest);\n-typedef void (*sha256_one_block_t)(const void *data, void *digest);\n-typedef void (*sha384_one_block_t)(const void *data, void *digest);\n-typedef void (*sha512_one_block_t)(const void *data, void *digest);\n-\n-typedef void (*aes_keyexp_128_t)\n-\t\t(const void *key, void *enc_exp_keys, void *dec_exp_keys);\n-typedef void (*aes_keyexp_192_t)\n-\t\t(const void *key, void *enc_exp_keys, void *dec_exp_keys);\n-typedef void (*aes_keyexp_256_t)\n-\t\t(const void *key, void *enc_exp_keys, void *dec_exp_keys);\n-typedef void (*aes_xcbc_expand_key_t)\n-\t\t(const void *key, void *exp_k1, void *k2, void *k3);\n-typedef void (*aes_cmac_sub_key_gen_t)\n-\t\t(const void *exp_key, void *k2, void *k3);\n-typedef void (*aes_cmac_keyexp_t)\n-\t\t(const void *key, void *keyexp);\n-typedef void (*aes_gcm_keyexp_t)\n-\t\t(const void *key, struct gcm_key_data *keyexp);\n-\n-/** Multi-buffer library function pointer table */\n-struct aesni_mb_op_fns {\n-\tstruct {\n-\t\tinit_mb_mgr_t init_mgr;\n-\t\t/**< Initialise scheduler  */\n-\t\tget_next_job_t get_next;\n-\t\t/**< Get next free job structure */\n-\t\tsubmit_job_t submit;\n-\t\t/**< Submit job to scheduler */\n-\t\tget_completed_job_t get_completed_job;\n-\t\t/**< Get completed job */\n-\t\tflush_job_t flush_job;\n-\t\t/**< flush jobs from manager */\n-\t} job;\n-\t/**< multi buffer manager functions */\n-\n-\tstruct {\n-\t\tstruct {\n-\t\t\tmd5_one_block_t md5;\n-\t\t\t/**< MD5 one block hash */\n-\t\t\tsha1_one_block_t sha1;\n-\t\t\t/**< SHA1 one block hash */\n-\t\t\tsha224_one_block_t sha224;\n-\t\t\t/**< SHA224 one block hash */\n-\t\t\tsha256_one_block_t sha256;\n-\t\t\t/**< SHA256 one block hash */\n-\t\t\tsha384_one_block_t sha384;\n-\t\t\t/**< SHA384 one block hash */\n-\t\t\tsha512_one_block_t sha512;\n-\t\t\t/**< SHA512 one block hash */\n-\t\t} one_block;\n-\t\t/**< one block hash functions */\n-\n-\t\tstruct {\n-\t\t\taes_keyexp_128_t aes128;\n-\t\t\t/**< AES128 key expansions */\n-\t\t\taes_keyexp_192_t aes192;\n-\t\t\t/**< AES192 key expansions */\n-\t\t\taes_keyexp_256_t aes256;\n-\t\t\t/**< AES256 key expansions */\n-\t\t\taes_xcbc_expand_key_t aes_xcbc;\n-\t\t\t/**< AES XCBC key epansions */\n-\t\t\taes_cmac_sub_key_gen_t aes_cmac_subkey;\n-\t\t\t/**< AES CMAC subkey expansions */\n-\t\t\taes_cmac_keyexp_t aes_cmac_expkey;\n-\t\t\t/**< AES CMAC key expansions */\n-\t\t\taes_gcm_keyexp_t aes_gcm_128;\n-\t\t\t/**< AES GCM 128 key expansions */\n-\t\t\taes_gcm_keyexp_t aes_gcm_192;\n-\t\t\t/**< AES GCM 192 key expansions */\n-\t\t\taes_gcm_keyexp_t aes_gcm_256;\n-\t\t\t/**< AES GCM 256 key expansions */\n-\t\t} keyexp;\n-\t\t/**< Key expansion functions */\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\tstruct {\n-\t\t\thash_fn_t sha1;\n-\t\t\thash_fn_t sha224;\n-\t\t\thash_fn_t sha256;\n-\t\t\thash_fn_t sha384;\n-\t\t\thash_fn_t sha512;\n-\t\t} multi_block;\n-\t\t/** multi block hash functions */\n-#endif\n-\t} aux;\n-\t/**< Auxiliary functions */\n-};\n-\n-\n-static const struct aesni_mb_op_fns job_ops[] = {\n-\t\t[RTE_AESNI_MB_NOT_SUPPORTED] = {\n-\t\t\t.job = {\n-\t\t\t\tNULL\n-\t\t\t},\n-\t\t\t.aux = {\n-\t\t\t\t.one_block = {\n-\t\t\t\t\tNULL\n-\t\t\t\t},\n-\t\t\t\t.keyexp = {\n-\t\t\t\t\tNULL\n-\t\t\t\t},\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\t\t\t.multi_block = {\n-\t\t\t\t\tNULL\n-\t\t\t\t}\n-#endif\n-\n-\t\t\t}\n-\t\t},\n-\t\t[RTE_AESNI_MB_SSE] = {\n-\t\t\t.job = {\n-\t\t\t\tinit_mb_mgr_sse,\n-\t\t\t\tget_next_job_sse,\n-\t\t\t\tsubmit_job_sse,\n-\t\t\t\tget_completed_job_sse,\n-\t\t\t\tflush_job_sse\n-\t\t\t},\n-\t\t\t.aux = {\n-\t\t\t\t.one_block = {\n-\t\t\t\t\tmd5_one_block_sse,\n-\t\t\t\t\tsha1_one_block_sse,\n-\t\t\t\t\tsha224_one_block_sse,\n-\t\t\t\t\tsha256_one_block_sse,\n-\t\t\t\t\tsha384_one_block_sse,\n-\t\t\t\t\tsha512_one_block_sse\n-\t\t\t\t},\n-\t\t\t\t.keyexp = {\n-\t\t\t\t\taes_keyexp_128_sse,\n-\t\t\t\t\taes_keyexp_192_sse,\n-\t\t\t\t\taes_keyexp_256_sse,\n-\t\t\t\t\taes_xcbc_expand_key_sse,\n-\t\t\t\t\taes_cmac_subkey_gen_sse,\n-\t\t\t\t\taes_keyexp_128_enc_sse,\n-\t\t\t\t\taes_gcm_pre_128_sse,\n-\t\t\t\t\taes_gcm_pre_192_sse,\n-\t\t\t\t\taes_gcm_pre_256_sse\n-\t\t\t\t},\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\t\t\t.multi_block = {\n-\t\t\t\t\tsha1_sse,\n-\t\t\t\t\tsha224_sse,\n-\t\t\t\t\tsha256_sse,\n-\t\t\t\t\tsha384_sse,\n-\t\t\t\t\tsha512_sse\n-\t\t\t\t}\n-#endif\n-\t\t\t}\n-\t\t},\n-\t\t[RTE_AESNI_MB_AVX] = {\n-\t\t\t.job = {\n-\t\t\t\tinit_mb_mgr_avx,\n-\t\t\t\tget_next_job_avx,\n-\t\t\t\tsubmit_job_avx,\n-\t\t\t\tget_completed_job_avx,\n-\t\t\t\tflush_job_avx\n-\t\t\t},\n-\t\t\t.aux = {\n-\t\t\t\t.one_block = {\n-\t\t\t\t\tmd5_one_block_avx,\n-\t\t\t\t\tsha1_one_block_avx,\n-\t\t\t\t\tsha224_one_block_avx,\n-\t\t\t\t\tsha256_one_block_avx,\n-\t\t\t\t\tsha384_one_block_avx,\n-\t\t\t\t\tsha512_one_block_avx\n-\t\t\t\t},\n-\t\t\t\t.keyexp = {\n-\t\t\t\t\taes_keyexp_128_avx,\n-\t\t\t\t\taes_keyexp_192_avx,\n-\t\t\t\t\taes_keyexp_256_avx,\n-\t\t\t\t\taes_xcbc_expand_key_avx,\n-\t\t\t\t\taes_cmac_subkey_gen_avx,\n-\t\t\t\t\taes_keyexp_128_enc_avx,\n-\t\t\t\t\taes_gcm_pre_128_avx_gen2,\n-\t\t\t\t\taes_gcm_pre_192_avx_gen2,\n-\t\t\t\t\taes_gcm_pre_256_avx_gen2\n-\t\t\t\t},\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\t\t\t.multi_block = {\n-\t\t\t\t\tsha1_avx,\n-\t\t\t\t\tsha224_avx,\n-\t\t\t\t\tsha256_avx,\n-\t\t\t\t\tsha384_avx,\n-\t\t\t\t\tsha512_avx\n-\t\t\t\t}\n-#endif\n-\t\t\t}\n-\t\t},\n-\t\t[RTE_AESNI_MB_AVX2] = {\n-\t\t\t.job = {\n-\t\t\t\tinit_mb_mgr_avx2,\n-\t\t\t\tget_next_job_avx2,\n-\t\t\t\tsubmit_job_avx2,\n-\t\t\t\tget_completed_job_avx2,\n-\t\t\t\tflush_job_avx2\n-\t\t\t},\n-\t\t\t.aux = {\n-\t\t\t\t.one_block = {\n-\t\t\t\t\tmd5_one_block_avx2,\n-\t\t\t\t\tsha1_one_block_avx2,\n-\t\t\t\t\tsha224_one_block_avx2,\n-\t\t\t\t\tsha256_one_block_avx2,\n-\t\t\t\t\tsha384_one_block_avx2,\n-\t\t\t\t\tsha512_one_block_avx2\n-\t\t\t\t},\n-\t\t\t\t.keyexp = {\n-\t\t\t\t\taes_keyexp_128_avx2,\n-\t\t\t\t\taes_keyexp_192_avx2,\n-\t\t\t\t\taes_keyexp_256_avx2,\n-\t\t\t\t\taes_xcbc_expand_key_avx2,\n-\t\t\t\t\taes_cmac_subkey_gen_avx2,\n-\t\t\t\t\taes_keyexp_128_enc_avx2,\n-\t\t\t\t\taes_gcm_pre_128_avx_gen4,\n-\t\t\t\t\taes_gcm_pre_192_avx_gen4,\n-\t\t\t\t\taes_gcm_pre_256_avx_gen4\n-\t\t\t\t},\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\t\t\t.multi_block = {\n-\t\t\t\t\tsha1_avx2,\n-\t\t\t\t\tsha224_avx2,\n-\t\t\t\t\tsha256_avx2,\n-\t\t\t\t\tsha384_avx2,\n-\t\t\t\t\tsha512_avx2\n-\t\t\t\t}\n-#endif\n-\t\t\t}\n-\t\t},\n-\t\t[RTE_AESNI_MB_AVX512] = {\n-\t\t\t.job = {\n-\t\t\t\tinit_mb_mgr_avx512,\n-\t\t\t\tget_next_job_avx512,\n-\t\t\t\tsubmit_job_avx512,\n-\t\t\t\tget_completed_job_avx512,\n-\t\t\t\tflush_job_avx512\n-\t\t\t},\n-\t\t\t.aux = {\n-\t\t\t\t.one_block = {\n-\t\t\t\t\tmd5_one_block_avx512,\n-\t\t\t\t\tsha1_one_block_avx512,\n-\t\t\t\t\tsha224_one_block_avx512,\n-\t\t\t\t\tsha256_one_block_avx512,\n-\t\t\t\t\tsha384_one_block_avx512,\n-\t\t\t\t\tsha512_one_block_avx512\n-\t\t\t\t},\n-\t\t\t\t.keyexp = {\n-\t\t\t\t\taes_keyexp_128_avx512,\n-\t\t\t\t\taes_keyexp_192_avx512,\n-\t\t\t\t\taes_keyexp_256_avx512,\n-\t\t\t\t\taes_xcbc_expand_key_avx512,\n-\t\t\t\t\taes_cmac_subkey_gen_avx512,\n-\t\t\t\t\taes_keyexp_128_enc_avx512,\n-\t\t\t\t\taes_gcm_pre_128_avx_gen4,\n-\t\t\t\t\taes_gcm_pre_192_avx_gen4,\n-\t\t\t\t\taes_gcm_pre_256_avx_gen4\n-\t\t\t\t},\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\t\t\t.multi_block = {\n-\t\t\t\t\tsha1_avx512,\n-\t\t\t\t\tsha224_avx512,\n-\t\t\t\t\tsha256_avx512,\n-\t\t\t\t\tsha384_avx512,\n-\t\t\t\t\tsha512_avx512\n-\t\t\t\t}\n-#endif\n-\t\t\t}\n-\t\t}\n-};\n-\n-\n-#endif /* _AESNI_MB_OPS_H_ */\ndiff --git a/drivers/crypto/aesni_mb/meson.build b/drivers/crypto/aesni_mb/meson.build\nindex 6313c4bd0..fbc4878af 100644\n--- a/drivers/crypto/aesni_mb/meson.build\n+++ b/drivers/crypto/aesni_mb/meson.build\n@@ -10,16 +10,13 @@ else\n \timb_arr = cc.get_define('IMB_VERSION_STR',\n \t\tprefix : '#include<intel-ipsec-mb.h>').split('\"')\n \n-\timb_ver =''.join(imb_arr)\n+\timb_ver = ''.join(imb_arr)\n \n-\tif imb_ver.version_compare('>=' + IPSec_MB_ver_0_52)\n-\t\tmessage('Build for a new version of library IPSec_MB[' + imb_ver + ']')\n-\t\tsources = files('rte_aesni_mb_pmd.c',\n-\t\t\t'rte_aesni_mb_pmd_ops.c')\n+\tif (imb_ver == '') or (imb_ver.version_compare('<' + IPSec_MB_ver_0_52))\n+\t\tmessage('IPSec_MB version >= 0.52 is required')\n+\t\tbuild = false\n \telse\n-\t\tsources = files('rte_aesni_mb_pmd_compat.c',\n-\t\t\t'rte_aesni_mb_pmd_ops_compat.c')\n-\t\tmessage('Build for older version of library IPSec_MB[' + imb_ver + ']')\n+\t\tsources = files('rte_aesni_mb_pmd.c', 'rte_aesni_mb_pmd_ops.c')\n \tendif\n \n endif\ndiff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_compat.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_compat.c\ndeleted file mode 100644\nindex 8020f68e3..000000000\n--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_compat.c\n+++ /dev/null\n@@ -1,1313 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2015-2017 Intel Corporation\n- */\n-\n-#include <intel-ipsec-mb.h>\n-\n-#include <rte_common.h>\n-#include <rte_hexdump.h>\n-#include <rte_cryptodev.h>\n-#include <rte_cryptodev_pmd.h>\n-#include <rte_bus_vdev.h>\n-#include <rte_malloc.h>\n-#include <rte_cpuflags.h>\n-\n-#include \"rte_aesni_mb_pmd_private.h\"\n-\n-#define AES_CCM_DIGEST_MIN_LEN 4\n-#define AES_CCM_DIGEST_MAX_LEN 16\n-#define HMAC_MAX_BLOCK_SIZE 128\n-static uint8_t cryptodev_driver_id;\n-\n-typedef void (*hash_one_block_t)(const void *data, void *digest);\n-typedef void (*aes_keyexp_t)(const void *key, void *enc_exp_keys, void *dec_exp_keys);\n-\n-/**\n- * Calculate the authentication pre-computes\n- *\n- * @param one_block_hash\tFunction pointer to calculate digest on ipad/opad\n- * @param ipad\t\t\tInner pad output byte array\n- * @param opad\t\t\tOuter pad output byte array\n- * @param hkey\t\t\tAuthentication key\n- * @param hkey_len\t\tAuthentication key length\n- * @param blocksize\t\tBlock size of selected hash algo\n- */\n-static void\n-calculate_auth_precomputes(hash_one_block_t one_block_hash,\n-\t\tuint8_t *ipad, uint8_t *opad,\n-\t\tuint8_t *hkey, uint16_t hkey_len,\n-\t\tuint16_t blocksize)\n-{\n-\tunsigned i, length;\n-\n-\tuint8_t ipad_buf[blocksize] __rte_aligned(16);\n-\tuint8_t opad_buf[blocksize] __rte_aligned(16);\n-\n-\t/* Setup inner and outer pads */\n-\tmemset(ipad_buf, HMAC_IPAD_VALUE, blocksize);\n-\tmemset(opad_buf, HMAC_OPAD_VALUE, blocksize);\n-\n-\t/* XOR hash key with inner and outer pads */\n-\tlength = hkey_len > blocksize ? blocksize : hkey_len;\n-\n-\tfor (i = 0; i < length; i++) {\n-\t\tipad_buf[i] ^= hkey[i];\n-\t\topad_buf[i] ^= hkey[i];\n-\t}\n-\n-\t/* Compute partial hashes */\n-\t(*one_block_hash)(ipad_buf, ipad);\n-\t(*one_block_hash)(opad_buf, opad);\n-\n-\t/* Clean up stack */\n-\tmemset(ipad_buf, 0, blocksize);\n-\tmemset(opad_buf, 0, blocksize);\n-}\n-\n-/** Get xform chain order */\n-static enum aesni_mb_operation\n-aesni_mb_get_chain_order(const struct rte_crypto_sym_xform *xform)\n-{\n-\tif (xform == NULL)\n-\t\treturn AESNI_MB_OP_NOT_SUPPORTED;\n-\n-\tif (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {\n-\t\tif (xform->next == NULL)\n-\t\t\treturn AESNI_MB_OP_CIPHER_ONLY;\n-\t\tif (xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH)\n-\t\t\treturn AESNI_MB_OP_CIPHER_HASH;\n-\t}\n-\n-\tif (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH) {\n-\t\tif (xform->next == NULL)\n-\t\t\treturn AESNI_MB_OP_HASH_ONLY;\n-\t\tif (xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER)\n-\t\t\treturn AESNI_MB_OP_HASH_CIPHER;\n-\t}\n-\n-\tif (xform->type == RTE_CRYPTO_SYM_XFORM_AEAD) {\n-\t\tif (xform->aead.algo == RTE_CRYPTO_AEAD_AES_CCM ||\n-\t\t\t\txform->aead.algo == RTE_CRYPTO_AEAD_AES_GCM) {\n-\t\t\tif (xform->aead.op == RTE_CRYPTO_AEAD_OP_ENCRYPT)\n-\t\t\t\treturn AESNI_MB_OP_AEAD_CIPHER_HASH;\n-\t\t\telse\n-\t\t\t\treturn AESNI_MB_OP_AEAD_HASH_CIPHER;\n-\t\t}\n-\t}\n-\n-\treturn AESNI_MB_OP_NOT_SUPPORTED;\n-}\n-\n-/** Set session authentication parameters */\n-static int\n-aesni_mb_set_session_auth_parameters(const struct aesni_mb_op_fns *mb_ops,\n-\t\tstruct aesni_mb_session *sess,\n-\t\tconst struct rte_crypto_sym_xform *xform)\n-{\n-\thash_one_block_t hash_oneblock_fn;\n-\tunsigned int key_larger_block_size = 0;\n-\tuint8_t hashed_key[HMAC_MAX_BLOCK_SIZE] = { 0 };\n-\n-\tif (xform == NULL) {\n-\t\tsess->auth.algo = NULL_HASH;\n-\t\treturn 0;\n-\t}\n-\n-\tif (xform->type != RTE_CRYPTO_SYM_XFORM_AUTH) {\n-\t\tAESNI_MB_LOG(ERR, \"Crypto xform struct not of type auth\");\n-\t\treturn -1;\n-\t}\n-\n-\t/* Set the request digest size */\n-\tsess->auth.req_digest_len = xform->auth.digest_length;\n-\n-\t/* Select auth generate/verify */\n-\tsess->auth.operation = xform->auth.op;\n-\n-\t/* Set Authentication Parameters */\n-\tif (xform->auth.algo == RTE_CRYPTO_AUTH_AES_XCBC_MAC) {\n-\t\tsess->auth.algo = AES_XCBC;\n-\n-\t\tuint16_t xcbc_mac_digest_len =\n-\t\t\tget_truncated_digest_byte_length(AES_XCBC);\n-\t\tif (sess->auth.req_digest_len != xcbc_mac_digest_len) {\n-\t\t\tAESNI_MB_LOG(ERR, \"Invalid digest size\\n\");\n-\t\t\treturn -EINVAL;\n-\t\t}\n-\t\tsess->auth.gen_digest_len = sess->auth.req_digest_len;\n-\t\t(*mb_ops->aux.keyexp.aes_xcbc)(xform->auth.key.data,\n-\t\t\t\tsess->auth.xcbc.k1_expanded,\n-\t\t\t\tsess->auth.xcbc.k2, sess->auth.xcbc.k3);\n-\t\treturn 0;\n-\t}\n-\n-\tif (xform->auth.algo == RTE_CRYPTO_AUTH_AES_CMAC) {\n-\t\tsess->auth.algo = AES_CMAC;\n-\n-\t\tuint16_t cmac_digest_len = get_digest_byte_length(AES_CMAC);\n-\n-\t\tif (sess->auth.req_digest_len > cmac_digest_len) {\n-\t\t\tAESNI_MB_LOG(ERR, \"Invalid digest size\\n\");\n-\t\t\treturn -EINVAL;\n-\t\t}\n-\t\t/*\n-\t\t * Multi-buffer lib supports digest sizes from 4 to 16 bytes\n-\t\t * in version 0.50 and sizes of 12 and 16 bytes,\n-\t\t * in version 0.49.\n-\t\t * If size requested is different, generate the full digest\n-\t\t * (16 bytes) in a temporary location and then memcpy\n-\t\t * the requested number of bytes.\n-\t\t */\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\tif (sess->auth.req_digest_len < 4)\n-#else\n-\t\tuint16_t cmac_trunc_digest_len =\n-\t\t\t\tget_truncated_digest_byte_length(AES_CMAC);\n-\t\tif (sess->auth.req_digest_len != cmac_digest_len &&\n-\t\t\t\tsess->auth.req_digest_len != cmac_trunc_digest_len)\n-#endif\n-\t\t\tsess->auth.gen_digest_len = cmac_digest_len;\n-\t\telse\n-\t\t\tsess->auth.gen_digest_len = sess->auth.req_digest_len;\n-\t\t(*mb_ops->aux.keyexp.aes_cmac_expkey)(xform->auth.key.data,\n-\t\t\t\tsess->auth.cmac.expkey);\n-\n-\t\t(*mb_ops->aux.keyexp.aes_cmac_subkey)(sess->auth.cmac.expkey,\n-\t\t\t\tsess->auth.cmac.skey1, sess->auth.cmac.skey2);\n-\t\treturn 0;\n-\t}\n-\n-\tif (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC) {\n-\t\tif (xform->auth.op == RTE_CRYPTO_AUTH_OP_GENERATE) {\n-\t\t\tsess->cipher.direction = ENCRYPT;\n-\t\t\tsess->chain_order = CIPHER_HASH;\n-\t\t} else\n-\t\t\tsess->cipher.direction = DECRYPT;\n-\n-\t\tsess->auth.algo = AES_GMAC;\n-\t\t/*\n-\t\t * Multi-buffer lib supports 8, 12 and 16 bytes of digest.\n-\t\t * If size requested is different, generate the full digest\n-\t\t * (16 bytes) in a temporary location and then memcpy\n-\t\t * the requested number of bytes.\n-\t\t */\n-\t\tif (sess->auth.req_digest_len != 16 &&\n-\t\t\t\tsess->auth.req_digest_len != 12 &&\n-\t\t\t\tsess->auth.req_digest_len != 8) {\n-\t\t\tsess->auth.gen_digest_len = 16;\n-\t\t} else {\n-\t\t\tsess->auth.gen_digest_len = sess->auth.req_digest_len;\n-\t\t}\n-\t\tsess->iv.length = xform->auth.iv.length;\n-\t\tsess->iv.offset = xform->auth.iv.offset;\n-\n-\t\tswitch (xform->auth.key.length) {\n-\t\tcase AES_128_BYTES:\n-\t\t\tsess->cipher.key_length_in_bytes = AES_128_BYTES;\n-\t\t\t(mb_ops->aux.keyexp.aes_gcm_128)(xform->auth.key.data,\n-\t\t\t\t&sess->cipher.gcm_key);\n-\t\t\tbreak;\n-\t\tcase AES_192_BYTES:\n-\t\t\tsess->cipher.key_length_in_bytes = AES_192_BYTES;\n-\t\t\t(mb_ops->aux.keyexp.aes_gcm_192)(xform->auth.key.data,\n-\t\t\t\t&sess->cipher.gcm_key);\n-\t\t\tbreak;\n-\t\tcase AES_256_BYTES:\n-\t\t\tsess->cipher.key_length_in_bytes = AES_256_BYTES;\n-\t\t\t(mb_ops->aux.keyexp.aes_gcm_256)(xform->auth.key.data,\n-\t\t\t\t&sess->cipher.gcm_key);\n-\t\t\tbreak;\n-\t\tdefault:\n-\t\t\tRTE_LOG(ERR, PMD, \"failed to parse test type\\n\");\n-\t\t\treturn -EINVAL;\n-\t\t}\n-\n-\t\treturn 0;\n-\t}\n-\n-\tswitch (xform->auth.algo) {\n-\tcase RTE_CRYPTO_AUTH_MD5_HMAC:\n-\t\tsess->auth.algo = MD5;\n-\t\thash_oneblock_fn = mb_ops->aux.one_block.md5;\n-\t\tbreak;\n-\tcase RTE_CRYPTO_AUTH_SHA1_HMAC:\n-\t\tsess->auth.algo = SHA1;\n-\t\thash_oneblock_fn = mb_ops->aux.one_block.sha1;\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\tif (xform->auth.key.length > get_auth_algo_blocksize(SHA1)) {\n-\t\t\tmb_ops->aux.multi_block.sha1(\n-\t\t\t\txform->auth.key.data,\n-\t\t\t\txform->auth.key.length,\n-\t\t\t\thashed_key);\n-\t\t\tkey_larger_block_size = 1;\n-\t\t}\n-#endif\n-\t\tbreak;\n-\tcase RTE_CRYPTO_AUTH_SHA224_HMAC:\n-\t\tsess->auth.algo = SHA_224;\n-\t\thash_oneblock_fn = mb_ops->aux.one_block.sha224;\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\tif (xform->auth.key.length > get_auth_algo_blocksize(SHA_224)) {\n-\t\t\tmb_ops->aux.multi_block.sha224(\n-\t\t\t\txform->auth.key.data,\n-\t\t\t\txform->auth.key.length,\n-\t\t\t\thashed_key);\n-\t\t\tkey_larger_block_size = 1;\n-\t\t}\n-#endif\n-\t\tbreak;\n-\tcase RTE_CRYPTO_AUTH_SHA256_HMAC:\n-\t\tsess->auth.algo = SHA_256;\n-\t\thash_oneblock_fn = mb_ops->aux.one_block.sha256;\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\tif (xform->auth.key.length > get_auth_algo_blocksize(SHA_256)) {\n-\t\t\tmb_ops->aux.multi_block.sha256(\n-\t\t\t\txform->auth.key.data,\n-\t\t\t\txform->auth.key.length,\n-\t\t\t\thashed_key);\n-\t\t\tkey_larger_block_size = 1;\n-\t\t}\n-#endif\n-\t\tbreak;\n-\tcase RTE_CRYPTO_AUTH_SHA384_HMAC:\n-\t\tsess->auth.algo = SHA_384;\n-\t\thash_oneblock_fn = mb_ops->aux.one_block.sha384;\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\tif (xform->auth.key.length > get_auth_algo_blocksize(SHA_384)) {\n-\t\t\tmb_ops->aux.multi_block.sha384(\n-\t\t\t\txform->auth.key.data,\n-\t\t\t\txform->auth.key.length,\n-\t\t\t\thashed_key);\n-\t\t\tkey_larger_block_size = 1;\n-\t\t}\n-#endif\n-\t\tbreak;\n-\tcase RTE_CRYPTO_AUTH_SHA512_HMAC:\n-\t\tsess->auth.algo = SHA_512;\n-\t\thash_oneblock_fn = mb_ops->aux.one_block.sha512;\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\tif (xform->auth.key.length > get_auth_algo_blocksize(SHA_512)) {\n-\t\t\tmb_ops->aux.multi_block.sha512(\n-\t\t\t\txform->auth.key.data,\n-\t\t\t\txform->auth.key.length,\n-\t\t\t\thashed_key);\n-\t\t\tkey_larger_block_size = 1;\n-\t\t}\n-#endif\n-\t\tbreak;\n-\tdefault:\n-\t\tAESNI_MB_LOG(ERR, \"Unsupported authentication algorithm selection\");\n-\t\treturn -ENOTSUP;\n-\t}\n-\tuint16_t trunc_digest_size =\n-\t\t\tget_truncated_digest_byte_length(sess->auth.algo);\n-\tuint16_t full_digest_size =\n-\t\t\tget_digest_byte_length(sess->auth.algo);\n-\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\tif (sess->auth.req_digest_len > full_digest_size ||\n-\t\t\tsess->auth.req_digest_len == 0) {\n-#else\n-\tif (sess->auth.req_digest_len != trunc_digest_size) {\n-#endif\n-\t\tAESNI_MB_LOG(ERR, \"Invalid digest size\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tif (sess->auth.req_digest_len != trunc_digest_size &&\n-\t\t\tsess->auth.req_digest_len != full_digest_size)\n-\t\tsess->auth.gen_digest_len = full_digest_size;\n-\telse\n-\t\tsess->auth.gen_digest_len = sess->auth.req_digest_len;\n-\n-\t/* Calculate Authentication precomputes */\n-\tif (key_larger_block_size) {\n-\t\tcalculate_auth_precomputes(hash_oneblock_fn,\n-\t\t\tsess->auth.pads.inner, sess->auth.pads.outer,\n-\t\t\thashed_key,\n-\t\t\txform->auth.key.length,\n-\t\t\tget_auth_algo_blocksize(sess->auth.algo));\n-\t} else {\n-\t\tcalculate_auth_precomputes(hash_oneblock_fn,\n-\t\t\tsess->auth.pads.inner, sess->auth.pads.outer,\n-\t\t\txform->auth.key.data,\n-\t\t\txform->auth.key.length,\n-\t\t\tget_auth_algo_blocksize(sess->auth.algo));\n-\t}\n-\n-\treturn 0;\n-}\n-\n-/** Set session cipher parameters */\n-static int\n-aesni_mb_set_session_cipher_parameters(const struct aesni_mb_op_fns *mb_ops,\n-\t\tstruct aesni_mb_session *sess,\n-\t\tconst struct rte_crypto_sym_xform *xform)\n-{\n-\tuint8_t is_aes = 0;\n-\tuint8_t is_3DES = 0;\n-\taes_keyexp_t aes_keyexp_fn;\n-\n-\tif (xform == NULL) {\n-\t\tsess->cipher.mode = NULL_CIPHER;\n-\t\treturn 0;\n-\t}\n-\n-\tif (xform->type != RTE_CRYPTO_SYM_XFORM_CIPHER) {\n-\t\tAESNI_MB_LOG(ERR, \"Crypto xform struct not of type cipher\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\t/* Select cipher direction */\n-\tswitch (xform->cipher.op) {\n-\tcase RTE_CRYPTO_CIPHER_OP_ENCRYPT:\n-\t\tsess->cipher.direction = ENCRYPT;\n-\t\tbreak;\n-\tcase RTE_CRYPTO_CIPHER_OP_DECRYPT:\n-\t\tsess->cipher.direction = DECRYPT;\n-\t\tbreak;\n-\tdefault:\n-\t\tAESNI_MB_LOG(ERR, \"Invalid cipher operation parameter\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\t/* Select cipher mode */\n-\tswitch (xform->cipher.algo) {\n-\tcase RTE_CRYPTO_CIPHER_AES_CBC:\n-\t\tsess->cipher.mode = CBC;\n-\t\tis_aes = 1;\n-\t\tbreak;\n-\tcase RTE_CRYPTO_CIPHER_AES_CTR:\n-\t\tsess->cipher.mode = CNTR;\n-\t\tis_aes = 1;\n-\t\tbreak;\n-\tcase RTE_CRYPTO_CIPHER_AES_DOCSISBPI:\n-\t\tsess->cipher.mode = DOCSIS_SEC_BPI;\n-\t\tis_aes = 1;\n-\t\tbreak;\n-\tcase RTE_CRYPTO_CIPHER_DES_CBC:\n-\t\tsess->cipher.mode = DES;\n-\t\tbreak;\n-\tcase RTE_CRYPTO_CIPHER_DES_DOCSISBPI:\n-\t\tsess->cipher.mode = DOCSIS_DES;\n-\t\tbreak;\n-\tcase RTE_CRYPTO_CIPHER_3DES_CBC:\n-\t\tsess->cipher.mode = DES3;\n-\t\tis_3DES = 1;\n-\t\tbreak;\n-\tdefault:\n-\t\tAESNI_MB_LOG(ERR, \"Unsupported cipher mode parameter\");\n-\t\treturn -ENOTSUP;\n-\t}\n-\n-\t/* Set IV parameters */\n-\tsess->iv.offset = xform->cipher.iv.offset;\n-\tsess->iv.length = xform->cipher.iv.length;\n-\n-\t/* Check key length and choose key expansion function for AES */\n-\tif (is_aes) {\n-\t\tswitch (xform->cipher.key.length) {\n-\t\tcase AES_128_BYTES:\n-\t\t\tsess->cipher.key_length_in_bytes = AES_128_BYTES;\n-\t\t\taes_keyexp_fn = mb_ops->aux.keyexp.aes128;\n-\t\t\tbreak;\n-\t\tcase AES_192_BYTES:\n-\t\t\tsess->cipher.key_length_in_bytes = AES_192_BYTES;\n-\t\t\taes_keyexp_fn = mb_ops->aux.keyexp.aes192;\n-\t\t\tbreak;\n-\t\tcase AES_256_BYTES:\n-\t\t\tsess->cipher.key_length_in_bytes = AES_256_BYTES;\n-\t\t\taes_keyexp_fn = mb_ops->aux.keyexp.aes256;\n-\t\t\tbreak;\n-\t\tdefault:\n-\t\t\tAESNI_MB_LOG(ERR, \"Invalid cipher key length\");\n-\t\t\treturn -EINVAL;\n-\t\t}\n-\n-\t\t/* Expanded cipher keys */\n-\t\t(*aes_keyexp_fn)(xform->cipher.key.data,\n-\t\t\t\tsess->cipher.expanded_aes_keys.encode,\n-\t\t\t\tsess->cipher.expanded_aes_keys.decode);\n-\n-\t} else if (is_3DES) {\n-\t\tuint64_t *keys[3] = {sess->cipher.exp_3des_keys.key[0],\n-\t\t\t\tsess->cipher.exp_3des_keys.key[1],\n-\t\t\t\tsess->cipher.exp_3des_keys.key[2]};\n-\n-\t\tswitch (xform->cipher.key.length) {\n-\t\tcase  24:\n-\t\t\tdes_key_schedule(keys[0], xform->cipher.key.data);\n-\t\t\tdes_key_schedule(keys[1], xform->cipher.key.data+8);\n-\t\t\tdes_key_schedule(keys[2], xform->cipher.key.data+16);\n-\n-\t\t\t/* Initialize keys - 24 bytes: [K1-K2-K3] */\n-\t\t\tsess->cipher.exp_3des_keys.ks_ptr[0] = keys[0];\n-\t\t\tsess->cipher.exp_3des_keys.ks_ptr[1] = keys[1];\n-\t\t\tsess->cipher.exp_3des_keys.ks_ptr[2] = keys[2];\n-\t\t\tbreak;\n-\t\tcase 16:\n-\t\t\tdes_key_schedule(keys[0], xform->cipher.key.data);\n-\t\t\tdes_key_schedule(keys[1], xform->cipher.key.data+8);\n-\n-\t\t\t/* Initialize keys - 16 bytes: [K1=K1,K2=K2,K3=K1] */\n-\t\t\tsess->cipher.exp_3des_keys.ks_ptr[0] = keys[0];\n-\t\t\tsess->cipher.exp_3des_keys.ks_ptr[1] = keys[1];\n-\t\t\tsess->cipher.exp_3des_keys.ks_ptr[2] = keys[0];\n-\t\t\tbreak;\n-\t\tcase 8:\n-\t\t\tdes_key_schedule(keys[0], xform->cipher.key.data);\n-\n-\t\t\t/* Initialize keys - 8 bytes: [K1 = K2 = K3] */\n-\t\t\tsess->cipher.exp_3des_keys.ks_ptr[0] = keys[0];\n-\t\t\tsess->cipher.exp_3des_keys.ks_ptr[1] = keys[0];\n-\t\t\tsess->cipher.exp_3des_keys.ks_ptr[2] = keys[0];\n-\t\t\tbreak;\n-\t\tdefault:\n-\t\t\tAESNI_MB_LOG(ERR, \"Invalid cipher key length\");\n-\t\t\treturn -EINVAL;\n-\t\t}\n-\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\tsess->cipher.key_length_in_bytes = 24;\n-#else\n-\t\tsess->cipher.key_length_in_bytes = 8;\n-#endif\n-\t} else {\n-\t\tif (xform->cipher.key.length != 8) {\n-\t\t\tAESNI_MB_LOG(ERR, \"Invalid cipher key length\");\n-\t\t\treturn -EINVAL;\n-\t\t}\n-\t\tsess->cipher.key_length_in_bytes = 8;\n-\n-\t\tdes_key_schedule((uint64_t *)sess->cipher.expanded_aes_keys.encode,\n-\t\t\t\txform->cipher.key.data);\n-\t\tdes_key_schedule((uint64_t *)sess->cipher.expanded_aes_keys.decode,\n-\t\t\t\txform->cipher.key.data);\n-\t}\n-\n-\treturn 0;\n-}\n-\n-static int\n-aesni_mb_set_session_aead_parameters(const struct aesni_mb_op_fns *mb_ops,\n-\t\tstruct aesni_mb_session *sess,\n-\t\tconst struct rte_crypto_sym_xform *xform)\n-{\n-\tunion {\n-\t\taes_keyexp_t aes_keyexp_fn;\n-\t\taes_gcm_keyexp_t aes_gcm_keyexp_fn;\n-\t} keyexp;\n-\n-\tswitch (xform->aead.op) {\n-\tcase RTE_CRYPTO_AEAD_OP_ENCRYPT:\n-\t\tsess->cipher.direction = ENCRYPT;\n-\t\tsess->auth.operation = RTE_CRYPTO_AUTH_OP_GENERATE;\n-\t\tbreak;\n-\tcase RTE_CRYPTO_AEAD_OP_DECRYPT:\n-\t\tsess->cipher.direction = DECRYPT;\n-\t\tsess->auth.operation = RTE_CRYPTO_AUTH_OP_VERIFY;\n-\t\tbreak;\n-\tdefault:\n-\t\tAESNI_MB_LOG(ERR, \"Invalid aead operation parameter\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tswitch (xform->aead.algo) {\n-\tcase RTE_CRYPTO_AEAD_AES_CCM:\n-\t\tsess->cipher.mode = CCM;\n-\t\tsess->auth.algo = AES_CCM;\n-\n-\t\t/* Check key length and choose key expansion function for AES */\n-\t\tswitch (xform->aead.key.length) {\n-\t\tcase AES_128_BYTES:\n-\t\t\tsess->cipher.key_length_in_bytes = AES_128_BYTES;\n-\t\t\tkeyexp.aes_keyexp_fn = mb_ops->aux.keyexp.aes128;\n-\t\t\tbreak;\n-\t\tdefault:\n-\t\t\tAESNI_MB_LOG(ERR, \"Invalid cipher key length\");\n-\t\t\treturn -EINVAL;\n-\t\t}\n-\n-\t\t/* Expanded cipher keys */\n-\t\t(*keyexp.aes_keyexp_fn)(xform->aead.key.data,\n-\t\t\t\tsess->cipher.expanded_aes_keys.encode,\n-\t\t\t\tsess->cipher.expanded_aes_keys.decode);\n-\t\tbreak;\n-\n-\tcase RTE_CRYPTO_AEAD_AES_GCM:\n-\t\tsess->cipher.mode = GCM;\n-\t\tsess->auth.algo = AES_GMAC;\n-\n-\t\tswitch (xform->aead.key.length) {\n-\t\tcase AES_128_BYTES:\n-\t\t\tsess->cipher.key_length_in_bytes = AES_128_BYTES;\n-\t\t\tkeyexp.aes_gcm_keyexp_fn =\n-\t\t\t\t\tmb_ops->aux.keyexp.aes_gcm_128;\n-\t\t\tbreak;\n-\t\tcase AES_192_BYTES:\n-\t\t\tsess->cipher.key_length_in_bytes = AES_192_BYTES;\n-\t\t\tkeyexp.aes_gcm_keyexp_fn =\n-\t\t\t\t\tmb_ops->aux.keyexp.aes_gcm_192;\n-\t\t\tbreak;\n-\t\tcase AES_256_BYTES:\n-\t\t\tsess->cipher.key_length_in_bytes = AES_256_BYTES;\n-\t\t\tkeyexp.aes_gcm_keyexp_fn =\n-\t\t\t\t\tmb_ops->aux.keyexp.aes_gcm_256;\n-\t\t\tbreak;\n-\t\tdefault:\n-\t\t\tAESNI_MB_LOG(ERR, \"Invalid cipher key length\");\n-\t\t\treturn -EINVAL;\n-\t\t}\n-\n-\t\t(keyexp.aes_gcm_keyexp_fn)(xform->aead.key.data,\n-\t\t\t\t&sess->cipher.gcm_key);\n-\t\tbreak;\n-\n-\tdefault:\n-\t\tAESNI_MB_LOG(ERR, \"Unsupported aead mode parameter\");\n-\t\treturn -ENOTSUP;\n-\t}\n-\n-\t/* Set IV parameters */\n-\tsess->iv.offset = xform->aead.iv.offset;\n-\tsess->iv.length = xform->aead.iv.length;\n-\n-\tsess->auth.req_digest_len = xform->aead.digest_length;\n-\t/* CCM digests must be between 4 and 16 and an even number */\n-\tif (sess->auth.req_digest_len < AES_CCM_DIGEST_MIN_LEN ||\n-\t\t\tsess->auth.req_digest_len > AES_CCM_DIGEST_MAX_LEN ||\n-\t\t\t(sess->auth.req_digest_len & 1) == 1) {\n-\t\tAESNI_MB_LOG(ERR, \"Invalid digest size\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\tsess->auth.gen_digest_len = sess->auth.req_digest_len;\n-\n-\treturn 0;\n-}\n-\n-/** Parse crypto xform chain and set private session parameters */\n-int\n-aesni_mb_set_session_parameters(const struct aesni_mb_op_fns *mb_ops,\n-\t\tstruct aesni_mb_session *sess,\n-\t\tconst struct rte_crypto_sym_xform *xform)\n-{\n-\tconst struct rte_crypto_sym_xform *auth_xform = NULL;\n-\tconst struct rte_crypto_sym_xform *cipher_xform = NULL;\n-\tconst struct rte_crypto_sym_xform *aead_xform = NULL;\n-\tint ret;\n-\n-\t/* Select Crypto operation - hash then cipher / cipher then hash */\n-\tswitch (aesni_mb_get_chain_order(xform)) {\n-\tcase AESNI_MB_OP_HASH_CIPHER:\n-\t\tsess->chain_order = HASH_CIPHER;\n-\t\tauth_xform = xform;\n-\t\tcipher_xform = xform->next;\n-\t\tbreak;\n-\tcase AESNI_MB_OP_CIPHER_HASH:\n-\t\tsess->chain_order = CIPHER_HASH;\n-\t\tauth_xform = xform->next;\n-\t\tcipher_xform = xform;\n-\t\tbreak;\n-\tcase AESNI_MB_OP_HASH_ONLY:\n-\t\tsess->chain_order = HASH_CIPHER;\n-\t\tauth_xform = xform;\n-\t\tcipher_xform = NULL;\n-\t\tbreak;\n-\tcase AESNI_MB_OP_CIPHER_ONLY:\n-\t\t/*\n-\t\t * Multi buffer library operates only at two modes,\n-\t\t * CIPHER_HASH and HASH_CIPHER. When doing ciphering only,\n-\t\t * chain order depends on cipher operation: encryption is always\n-\t\t * the first operation and decryption the last one.\n-\t\t */\n-\t\tif (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)\n-\t\t\tsess->chain_order = CIPHER_HASH;\n-\t\telse\n-\t\t\tsess->chain_order = HASH_CIPHER;\n-\t\tauth_xform = NULL;\n-\t\tcipher_xform = xform;\n-\t\tbreak;\n-\tcase AESNI_MB_OP_AEAD_CIPHER_HASH:\n-\t\tsess->chain_order = CIPHER_HASH;\n-\t\tsess->aead.aad_len = xform->aead.aad_length;\n-\t\taead_xform = xform;\n-\t\tbreak;\n-\tcase AESNI_MB_OP_AEAD_HASH_CIPHER:\n-\t\tsess->chain_order = HASH_CIPHER;\n-\t\tsess->aead.aad_len = xform->aead.aad_length;\n-\t\taead_xform = xform;\n-\t\tbreak;\n-\tcase AESNI_MB_OP_NOT_SUPPORTED:\n-\tdefault:\n-\t\tAESNI_MB_LOG(ERR, \"Unsupported operation chain order parameter\");\n-\t\treturn -ENOTSUP;\n-\t}\n-\n-\t/* Default IV length = 0 */\n-\tsess->iv.length = 0;\n-\n-\tret = aesni_mb_set_session_auth_parameters(mb_ops, sess, auth_xform);\n-\tif (ret != 0) {\n-\t\tAESNI_MB_LOG(ERR, \"Invalid/unsupported authentication parameters\");\n-\t\treturn ret;\n-\t}\n-\n-\tret = aesni_mb_set_session_cipher_parameters(mb_ops, sess,\n-\t\t\tcipher_xform);\n-\tif (ret != 0) {\n-\t\tAESNI_MB_LOG(ERR, \"Invalid/unsupported cipher parameters\");\n-\t\treturn ret;\n-\t}\n-\n-\tif (aead_xform) {\n-\t\tret = aesni_mb_set_session_aead_parameters(mb_ops, sess,\n-\t\t\t\taead_xform);\n-\t\tif (ret != 0) {\n-\t\t\tAESNI_MB_LOG(ERR, \"Invalid/unsupported aead parameters\");\n-\t\t\treturn ret;\n-\t\t}\n-\t}\n-\n-\treturn 0;\n-}\n-\n-/**\n- * burst enqueue, place crypto operations on ingress queue for processing.\n- *\n- * @param __qp         Queue Pair to process\n- * @param ops          Crypto operations for processing\n- * @param nb_ops       Number of crypto operations for processing\n- *\n- * @return\n- * - Number of crypto operations enqueued\n- */\n-static uint16_t\n-aesni_mb_pmd_enqueue_burst(void *__qp, struct rte_crypto_op **ops,\n-\t\tuint16_t nb_ops)\n-{\n-\tstruct aesni_mb_qp *qp = __qp;\n-\n-\tunsigned int nb_enqueued;\n-\n-\tnb_enqueued = rte_ring_enqueue_burst(qp->ingress_queue,\n-\t\t\t(void **)ops, nb_ops, NULL);\n-\n-\tqp->stats.enqueued_count += nb_enqueued;\n-\n-\treturn nb_enqueued;\n-}\n-\n-/** Get multi buffer session */\n-static inline struct aesni_mb_session *\n-get_session(struct aesni_mb_qp *qp, struct rte_crypto_op *op)\n-{\n-\tstruct aesni_mb_session *sess = NULL;\n-\n-\tif (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n-\t\tif (likely(op->sym->session != NULL))\n-\t\t\tsess = (struct aesni_mb_session *)\n-\t\t\t\t\tget_sym_session_private_data(\n-\t\t\t\t\top->sym->session,\n-\t\t\t\t\tcryptodev_driver_id);\n-\t} else {\n-\t\tvoid *_sess = NULL;\n-\t\tvoid *_sess_private_data = NULL;\n-\n-\t\tif (rte_mempool_get(qp->sess_mp, (void **)&_sess))\n-\t\t\treturn NULL;\n-\n-\t\tif (rte_mempool_get(qp->sess_mp_priv, (void **)&_sess_private_data))\n-\t\t\treturn NULL;\n-\n-\t\tsess = (struct aesni_mb_session *)_sess_private_data;\n-\n-\t\tif (unlikely(aesni_mb_set_session_parameters(qp->op_fns,\n-\t\t\t\tsess, op->sym->xform) != 0)) {\n-\t\t\trte_mempool_put(qp->sess_mp, _sess);\n-\t\t\trte_mempool_put(qp->sess_mp_priv, _sess_private_data);\n-\t\t\tsess = NULL;\n-\t\t}\n-\t\top->sym->session = (struct rte_cryptodev_sym_session *)_sess;\n-\t\tset_sym_session_private_data(op->sym->session,\n-\t\t\t\tcryptodev_driver_id, _sess_private_data);\n-\t}\n-\n-\tif (unlikely(sess == NULL))\n-\t\top->status = RTE_CRYPTO_OP_STATUS_INVALID_SESSION;\n-\n-\treturn sess;\n-}\n-\n-/**\n- * Process a crypto operation and complete a JOB_AES_HMAC job structure for\n- * submission to the multi buffer library for processing.\n- *\n- * @param\tqp\tqueue pair\n- * @param\tjob\tJOB_AES_HMAC structure to fill\n- * @param\tm\tmbuf to process\n- *\n- * @return\n- * - Completed JOB_AES_HMAC structure pointer on success\n- * - NULL pointer if completion of JOB_AES_HMAC structure isn't possible\n- */\n-static inline int\n-set_mb_job_params(JOB_AES_HMAC *job, struct aesni_mb_qp *qp,\n-\t\tstruct rte_crypto_op *op, uint8_t *digest_idx)\n-{\n-\tstruct rte_mbuf *m_src = op->sym->m_src, *m_dst;\n-\tstruct aesni_mb_session *session;\n-\tuint16_t m_offset = 0;\n-\n-\tsession = get_session(qp, op);\n-\tif (session == NULL) {\n-\t\top->status = RTE_CRYPTO_OP_STATUS_INVALID_SESSION;\n-\t\treturn -1;\n-\t}\n-\n-\t/* Set crypto operation */\n-\tjob->chain_order = session->chain_order;\n-\n-\t/* Set cipher parameters */\n-\tjob->cipher_direction = session->cipher.direction;\n-\tjob->cipher_mode = session->cipher.mode;\n-\n-\tjob->aes_key_len_in_bytes = session->cipher.key_length_in_bytes;\n-\n-\t/* Set authentication parameters */\n-\tjob->hash_alg = session->auth.algo;\n-\n-\tswitch (job->hash_alg) {\n-\tcase AES_XCBC:\n-\t\tjob->u.XCBC._k1_expanded = session->auth.xcbc.k1_expanded;\n-\t\tjob->u.XCBC._k2 = session->auth.xcbc.k2;\n-\t\tjob->u.XCBC._k3 = session->auth.xcbc.k3;\n-\n-\t\tjob->aes_enc_key_expanded =\n-\t\t\t\tsession->cipher.expanded_aes_keys.encode;\n-\t\tjob->aes_dec_key_expanded =\n-\t\t\t\tsession->cipher.expanded_aes_keys.decode;\n-\t\tbreak;\n-\n-\tcase AES_CCM:\n-\t\tjob->u.CCM.aad = op->sym->aead.aad.data + 18;\n-\t\tjob->u.CCM.aad_len_in_bytes = session->aead.aad_len;\n-\t\tjob->aes_enc_key_expanded =\n-\t\t\t\tsession->cipher.expanded_aes_keys.encode;\n-\t\tjob->aes_dec_key_expanded =\n-\t\t\t\tsession->cipher.expanded_aes_keys.decode;\n-\t\tbreak;\n-\n-\tcase AES_CMAC:\n-\t\tjob->u.CMAC._key_expanded = session->auth.cmac.expkey;\n-\t\tjob->u.CMAC._skey1 = session->auth.cmac.skey1;\n-\t\tjob->u.CMAC._skey2 = session->auth.cmac.skey2;\n-\t\tjob->aes_enc_key_expanded =\n-\t\t\t\tsession->cipher.expanded_aes_keys.encode;\n-\t\tjob->aes_dec_key_expanded =\n-\t\t\t\tsession->cipher.expanded_aes_keys.decode;\n-\t\tbreak;\n-\n-\tcase AES_GMAC:\n-\t\tif (session->cipher.mode == GCM) {\n-\t\t\tjob->u.GCM.aad = op->sym->aead.aad.data;\n-\t\t\tjob->u.GCM.aad_len_in_bytes = session->aead.aad_len;\n-\t\t} else {\n-\t\t\t/* For GMAC */\n-\t\t\tjob->u.GCM.aad = rte_pktmbuf_mtod_offset(m_src,\n-\t\t\t\t\tuint8_t *, op->sym->auth.data.offset);\n-\t\t\tjob->u.GCM.aad_len_in_bytes = op->sym->auth.data.length;\n-\t\t\tjob->cipher_mode = GCM;\n-\t\t}\n-\t\tjob->aes_enc_key_expanded = &session->cipher.gcm_key;\n-\t\tjob->aes_dec_key_expanded = &session->cipher.gcm_key;\n-\t\tbreak;\n-\n-\tdefault:\n-\t\tjob->u.HMAC._hashed_auth_key_xor_ipad = session->auth.pads.inner;\n-\t\tjob->u.HMAC._hashed_auth_key_xor_opad = session->auth.pads.outer;\n-\n-\t\tif (job->cipher_mode == DES3) {\n-\t\t\tjob->aes_enc_key_expanded =\n-\t\t\t\tsession->cipher.exp_3des_keys.ks_ptr;\n-\t\t\tjob->aes_dec_key_expanded =\n-\t\t\t\tsession->cipher.exp_3des_keys.ks_ptr;\n-\t\t} else {\n-\t\t\tjob->aes_enc_key_expanded =\n-\t\t\t\tsession->cipher.expanded_aes_keys.encode;\n-\t\t\tjob->aes_dec_key_expanded =\n-\t\t\t\tsession->cipher.expanded_aes_keys.decode;\n-\t\t}\n-\t}\n-\n-\t/* Mutable crypto operation parameters */\n-\tif (op->sym->m_dst) {\n-\t\tm_src = m_dst = op->sym->m_dst;\n-\n-\t\t/* append space for output data to mbuf */\n-\t\tchar *odata = rte_pktmbuf_append(m_dst,\n-\t\t\t\trte_pktmbuf_data_len(op->sym->m_src));\n-\t\tif (odata == NULL) {\n-\t\t\tAESNI_MB_LOG(ERR, \"failed to allocate space in destination \"\n-\t\t\t\t\t\"mbuf for source data\");\n-\t\t\top->status = RTE_CRYPTO_OP_STATUS_ERROR;\n-\t\t\treturn -1;\n-\t\t}\n-\n-\t\tmemcpy(odata, rte_pktmbuf_mtod(op->sym->m_src, void*),\n-\t\t\t\trte_pktmbuf_data_len(op->sym->m_src));\n-\t} else {\n-\t\tm_dst = m_src;\n-\t\tif (job->hash_alg == AES_CCM || (job->hash_alg == AES_GMAC &&\n-\t\t\t\tsession->cipher.mode == GCM))\n-\t\t\tm_offset = op->sym->aead.data.offset;\n-\t\telse\n-\t\t\tm_offset = op->sym->cipher.data.offset;\n-\t}\n-\n-\t/* Set digest output location */\n-\tif (job->hash_alg != NULL_HASH &&\n-\t\t\tsession->auth.operation == RTE_CRYPTO_AUTH_OP_VERIFY) {\n-\t\tjob->auth_tag_output = qp->temp_digests[*digest_idx];\n-\t\t*digest_idx = (*digest_idx + 1) % MAX_JOBS;\n-\t} else {\n-\t\tif (job->hash_alg == AES_CCM || (job->hash_alg == AES_GMAC &&\n-\t\t\t\tsession->cipher.mode == GCM))\n-\t\t\tjob->auth_tag_output = op->sym->aead.digest.data;\n-\t\telse\n-\t\t\tjob->auth_tag_output = op->sym->auth.digest.data;\n-\n-\t\tif (session->auth.req_digest_len != session->auth.gen_digest_len) {\n-\t\t\tjob->auth_tag_output = qp->temp_digests[*digest_idx];\n-\t\t\t*digest_idx = (*digest_idx + 1) % MAX_JOBS;\n-\t\t}\n-\t}\n-\t/*\n-\t * Multi-buffer library current only support returning a truncated\n-\t * digest length as specified in the relevant IPsec RFCs\n-\t */\n-\n-\t/* Set digest length */\n-\tjob->auth_tag_output_len_in_bytes = session->auth.gen_digest_len;\n-\n-\t/* Set IV parameters */\n-\tjob->iv_len_in_bytes = session->iv.length;\n-\n-\t/* Data  Parameter */\n-\tjob->src = rte_pktmbuf_mtod(m_src, uint8_t *);\n-\tjob->dst = rte_pktmbuf_mtod_offset(m_dst, uint8_t *, m_offset);\n-\n-\tswitch (job->hash_alg) {\n-\tcase AES_CCM:\n-\t\tjob->cipher_start_src_offset_in_bytes =\n-\t\t\t\top->sym->aead.data.offset;\n-\t\tjob->msg_len_to_cipher_in_bytes = op->sym->aead.data.length;\n-\t\tjob->hash_start_src_offset_in_bytes = op->sym->aead.data.offset;\n-\t\tjob->msg_len_to_hash_in_bytes = op->sym->aead.data.length;\n-\n-\t\tjob->iv = rte_crypto_op_ctod_offset(op, uint8_t *,\n-\t\t\tsession->iv.offset + 1);\n-\t\tbreak;\n-\n-\tcase AES_GMAC:\n-\t\tif (session->cipher.mode == GCM) {\n-\t\t\tjob->cipher_start_src_offset_in_bytes =\n-\t\t\t\t\top->sym->aead.data.offset;\n-\t\t\tjob->hash_start_src_offset_in_bytes =\n-\t\t\t\t\top->sym->aead.data.offset;\n-\t\t\tjob->msg_len_to_cipher_in_bytes =\n-\t\t\t\t\top->sym->aead.data.length;\n-\t\t\tjob->msg_len_to_hash_in_bytes =\n-\t\t\t\t\top->sym->aead.data.length;\n-\t\t} else {\n-\t\t\tjob->cipher_start_src_offset_in_bytes =\n-\t\t\t\t\top->sym->auth.data.offset;\n-\t\t\tjob->hash_start_src_offset_in_bytes =\n-\t\t\t\t\top->sym->auth.data.offset;\n-\t\t\tjob->msg_len_to_cipher_in_bytes = 0;\n-\t\t\tjob->msg_len_to_hash_in_bytes = 0;\n-\t\t}\n-\t\tjob->iv = rte_crypto_op_ctod_offset(op, uint8_t *,\n-\t\t\t\tsession->iv.offset);\n-\n-\t\tbreak;\n-\n-\tdefault:\n-\t\tjob->cipher_start_src_offset_in_bytes =\n-\t\t\t\top->sym->cipher.data.offset;\n-\t\tjob->msg_len_to_cipher_in_bytes = op->sym->cipher.data.length;\n-\n-\t\tjob->hash_start_src_offset_in_bytes = op->sym->auth.data.offset;\n-\t\tjob->msg_len_to_hash_in_bytes = op->sym->auth.data.length;\n-\n-\t\tjob->iv = rte_crypto_op_ctod_offset(op, uint8_t *,\n-\t\t\tsession->iv.offset);\n-\t}\n-\n-\t/* Set user data to be crypto operation data struct */\n-\tjob->user_data = op;\n-\n-\treturn 0;\n-}\n-\n-static inline void\n-verify_digest(JOB_AES_HMAC *job, void *digest, uint16_t len, uint8_t *status)\n-{\n-\tif (memcmp(job->auth_tag_output, digest, len) != 0)\n-\t\t*status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;\n-}\n-\n-static inline void\n-generate_digest(JOB_AES_HMAC *job, struct rte_crypto_op *op,\n-\t\tstruct aesni_mb_session *sess)\n-{\n-\t/* No extra copy neeed */\n-\tif (likely(sess->auth.req_digest_len == sess->auth.gen_digest_len))\n-\t\treturn;\n-\n-\t/*\n-\t * This can only happen for HMAC, so only digest\n-\t * for authentication algos is required\n-\t */\n-\tmemcpy(op->sym->auth.digest.data, job->auth_tag_output,\n-\t\t\tsess->auth.req_digest_len);\n-}\n-\n-/**\n- * Process a completed job and return rte_mbuf which job processed\n- *\n- * @param qp\t\tQueue Pair to process\n- * @param job\tJOB_AES_HMAC job to process\n- *\n- * @return\n- * - Returns processed crypto operation.\n- * - Returns NULL on invalid job\n- */\n-static inline struct rte_crypto_op *\n-post_process_mb_job(struct aesni_mb_qp *qp, JOB_AES_HMAC *job)\n-{\n-\tstruct rte_crypto_op *op = (struct rte_crypto_op *)job->user_data;\n-\tstruct aesni_mb_session *sess = get_sym_session_private_data(\n-\t\t\t\t\t\t\top->sym->session,\n-\t\t\t\t\t\t\tcryptodev_driver_id);\n-\n-\tif (likely(op->status == RTE_CRYPTO_OP_STATUS_NOT_PROCESSED)) {\n-\t\tswitch (job->status) {\n-\t\tcase STS_COMPLETED:\n-\t\t\top->status = RTE_CRYPTO_OP_STATUS_SUCCESS;\n-\n-\t\t\tif (job->hash_alg == NULL_HASH)\n-\t\t\t\tbreak;\n-\n-\t\t\tif (sess->auth.operation == RTE_CRYPTO_AUTH_OP_VERIFY) {\n-\t\t\t\tif (job->hash_alg == AES_CCM ||\n-\t\t\t\t\t(job->hash_alg == AES_GMAC &&\n-\t\t\t\t\t\tsess->cipher.mode == GCM))\n-\t\t\t\t\tverify_digest(job,\n-\t\t\t\t\t\top->sym->aead.digest.data,\n-\t\t\t\t\t\tsess->auth.req_digest_len,\n-\t\t\t\t\t\t&op->status);\n-\t\t\t\telse\n-\t\t\t\t\tverify_digest(job,\n-\t\t\t\t\t\top->sym->auth.digest.data,\n-\t\t\t\t\t\tsess->auth.req_digest_len,\n-\t\t\t\t\t\t&op->status);\n-\t\t\t} else\n-\t\t\t\tgenerate_digest(job, op, sess);\n-\t\t\tbreak;\n-\t\tdefault:\n-\t\t\top->status = RTE_CRYPTO_OP_STATUS_ERROR;\n-\t\t}\n-\t}\n-\n-\t/* Free session if a session-less crypto op */\n-\tif (op->sess_type == RTE_CRYPTO_OP_SESSIONLESS) {\n-\t\tmemset(sess, 0, sizeof(struct aesni_mb_session));\n-\t\tmemset(op->sym->session, 0,\n-\t\t\trte_cryptodev_sym_get_existing_header_session_size(\n-\t\t\t\top->sym->session));\n-\t\trte_mempool_put(qp->sess_mp_priv, sess);\n-\t\trte_mempool_put(qp->sess_mp, op->sym->session);\n-\t\top->sym->session = NULL;\n-\t}\n-\n-\treturn op;\n-}\n-\n-/**\n- * Process a completed JOB_AES_HMAC job and keep processing jobs until\n- * get_completed_job return NULL\n- *\n- * @param qp\t\tQueue Pair to process\n- * @param job\t\tJOB_AES_HMAC job\n- *\n- * @return\n- * - Number of processed jobs\n- */\n-static unsigned\n-handle_completed_jobs(struct aesni_mb_qp *qp, JOB_AES_HMAC *job,\n-\t\tstruct rte_crypto_op **ops, uint16_t nb_ops)\n-{\n-\tstruct rte_crypto_op *op = NULL;\n-\tunsigned processed_jobs = 0;\n-\n-\twhile (job != NULL) {\n-\t\top = post_process_mb_job(qp, job);\n-\n-\t\tif (op) {\n-\t\t\tops[processed_jobs++] = op;\n-\t\t\tqp->stats.dequeued_count++;\n-\t\t} else {\n-\t\t\tqp->stats.dequeue_err_count++;\n-\t\t\tbreak;\n-\t\t}\n-\t\tif (processed_jobs == nb_ops)\n-\t\t\tbreak;\n-\n-\t\tjob = (*qp->op_fns->job.get_completed_job)(qp->mb_mgr);\n-\t}\n-\n-\treturn processed_jobs;\n-}\n-\n-static inline uint16_t\n-flush_mb_mgr(struct aesni_mb_qp *qp, struct rte_crypto_op **ops,\n-\t\tuint16_t nb_ops)\n-{\n-\tint processed_ops = 0;\n-\n-\t/* Flush the remaining jobs */\n-\tJOB_AES_HMAC *job = (*qp->op_fns->job.flush_job)(qp->mb_mgr);\n-\n-\tif (job)\n-\t\tprocessed_ops += handle_completed_jobs(qp, job,\n-\t\t\t\t&ops[processed_ops], nb_ops - processed_ops);\n-\n-\treturn processed_ops;\n-}\n-\n-static inline JOB_AES_HMAC *\n-set_job_null_op(JOB_AES_HMAC *job, struct rte_crypto_op *op)\n-{\n-\tjob->chain_order = HASH_CIPHER;\n-\tjob->cipher_mode = NULL_CIPHER;\n-\tjob->hash_alg = NULL_HASH;\n-\tjob->cipher_direction = DECRYPT;\n-\n-\t/* Set user data to be crypto operation data struct */\n-\tjob->user_data = op;\n-\n-\treturn job;\n-}\n-\n-static uint16_t\n-aesni_mb_pmd_dequeue_burst(void *queue_pair, struct rte_crypto_op **ops,\n-\t\tuint16_t nb_ops)\n-{\n-\tstruct aesni_mb_qp *qp = queue_pair;\n-\n-\tstruct rte_crypto_op *op;\n-\tJOB_AES_HMAC *job;\n-\n-\tint retval, processed_jobs = 0;\n-\n-\tif (unlikely(nb_ops == 0))\n-\t\treturn 0;\n-\n-\tuint8_t digest_idx = qp->digest_idx;\n-\tdo {\n-\t\t/* Get next free mb job struct from mb manager */\n-\t\tjob = (*qp->op_fns->job.get_next)(qp->mb_mgr);\n-\t\tif (unlikely(job == NULL)) {\n-\t\t\t/* if no free mb job structs we need to flush mb_mgr */\n-\t\t\tprocessed_jobs += flush_mb_mgr(qp,\n-\t\t\t\t\t&ops[processed_jobs],\n-\t\t\t\t\tnb_ops - processed_jobs);\n-\n-\t\t\tif (nb_ops == processed_jobs)\n-\t\t\t\tbreak;\n-\n-\t\t\tjob = (*qp->op_fns->job.get_next)(qp->mb_mgr);\n-\t\t}\n-\n-\t\t/*\n-\t\t * Get next operation to process from ingress queue.\n-\t\t * There is no need to return the job to the MB_MGR\n-\t\t * if there are no more operations to process, since the MB_MGR\n-\t\t * can use that pointer again in next get_next calls.\n-\t\t */\n-\t\tretval = rte_ring_dequeue(qp->ingress_queue, (void **)&op);\n-\t\tif (retval < 0)\n-\t\t\tbreak;\n-\n-\t\tretval = set_mb_job_params(job, qp, op, &digest_idx);\n-\t\tif (unlikely(retval != 0)) {\n-\t\t\tqp->stats.dequeue_err_count++;\n-\t\t\tset_job_null_op(job, op);\n-\t\t}\n-\n-\t\t/* Submit job to multi-buffer for processing */\n-\t\tjob = (*qp->op_fns->job.submit)(qp->mb_mgr);\n-\n-\t\t/*\n-\t\t * If submit returns a processed job then handle it,\n-\t\t * before submitting subsequent jobs\n-\t\t */\n-\t\tif (job)\n-\t\t\tprocessed_jobs += handle_completed_jobs(qp, job,\n-\t\t\t\t\t&ops[processed_jobs],\n-\t\t\t\t\tnb_ops - processed_jobs);\n-\n-\t} while (processed_jobs < nb_ops);\n-\n-\tqp->digest_idx = digest_idx;\n-\n-\tif (processed_jobs < 1)\n-\t\tprocessed_jobs += flush_mb_mgr(qp,\n-\t\t\t\t&ops[processed_jobs],\n-\t\t\t\tnb_ops - processed_jobs);\n-\n-\treturn processed_jobs;\n-}\n-\n-static int cryptodev_aesni_mb_remove(struct rte_vdev_device *vdev);\n-\n-static int\n-cryptodev_aesni_mb_create(const char *name,\n-\t\t\tstruct rte_vdev_device *vdev,\n-\t\t\tstruct rte_cryptodev_pmd_init_params *init_params)\n-{\n-\tstruct rte_cryptodev *dev;\n-\tstruct aesni_mb_private *internals;\n-\tenum aesni_mb_vector_mode vector_mode;\n-\n-\t/* Check CPU for support for AES instruction set */\n-\tif (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES)) {\n-\t\tAESNI_MB_LOG(ERR, \"AES instructions not supported by CPU\");\n-\t\treturn -EFAULT;\n-\t}\n-\n-\tdev = rte_cryptodev_pmd_create(name, &vdev->device, init_params);\n-\tif (dev == NULL) {\n-\t\tAESNI_MB_LOG(ERR, \"failed to create cryptodev vdev\");\n-\t\treturn -ENODEV;\n-\t}\n-\n-\t/* Check CPU for supported vector instruction set */\n-\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))\n-\t\tvector_mode = RTE_AESNI_MB_AVX512;\n-\telse if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))\n-\t\tvector_mode = RTE_AESNI_MB_AVX2;\n-\telse if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX))\n-\t\tvector_mode = RTE_AESNI_MB_AVX;\n-\telse\n-\t\tvector_mode = RTE_AESNI_MB_SSE;\n-\n-\tdev->driver_id = cryptodev_driver_id;\n-\tdev->dev_ops = rte_aesni_mb_pmd_ops;\n-\n-\t/* register rx/tx burst functions for data path */\n-\tdev->dequeue_burst = aesni_mb_pmd_dequeue_burst;\n-\tdev->enqueue_burst = aesni_mb_pmd_enqueue_burst;\n-\n-\tdev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |\n-\t\t\tRTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |\n-\t\t\tRTE_CRYPTODEV_FF_CPU_AESNI;\n-\n-\tswitch (vector_mode) {\n-\tcase RTE_AESNI_MB_SSE:\n-\t\tdev->feature_flags |= RTE_CRYPTODEV_FF_CPU_SSE;\n-\t\tbreak;\n-\tcase RTE_AESNI_MB_AVX:\n-\t\tdev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX;\n-\t\tbreak;\n-\tcase RTE_AESNI_MB_AVX2:\n-\t\tdev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX2;\n-\t\tbreak;\n-\tcase RTE_AESNI_MB_AVX512:\n-\t\tdev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX512;\n-\t\tbreak;\n-\tdefault:\n-\t\tbreak;\n-\t}\n-\n-\t/* Set vector instructions mode supported */\n-\tinternals = dev->data->dev_private;\n-\n-\tinternals->vector_mode = vector_mode;\n-\tinternals->max_nb_queue_pairs = init_params->max_nb_queue_pairs;\n-\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\tAESNI_MB_LOG(INFO, \"IPSec Multi-buffer library version used: %s\\n\",\n-\t\t\timb_get_version_str());\n-#else\n-\tAESNI_MB_LOG(INFO, \"IPSec Multi-buffer library version used: 0.49.0\\n\");\n-#endif\n-\n-\treturn 0;\n-}\n-\n-static int\n-cryptodev_aesni_mb_probe(struct rte_vdev_device *vdev)\n-{\n-\tstruct rte_cryptodev_pmd_init_params init_params = {\n-\t\t\"\",\n-\t\tsizeof(struct aesni_mb_private),\n-\t\trte_socket_id(),\n-\t\tRTE_CRYPTODEV_PMD_DEFAULT_MAX_NB_QUEUE_PAIRS\n-\t};\n-\tconst char *name, *args;\n-\tint retval;\n-\n-\tname = rte_vdev_device_name(vdev);\n-\tif (name == NULL)\n-\t\treturn -EINVAL;\n-\n-\targs = rte_vdev_device_args(vdev);\n-\n-\tretval = rte_cryptodev_pmd_parse_input_args(&init_params, args);\n-\tif (retval) {\n-\t\tAESNI_MB_LOG(ERR, \"Failed to parse initialisation arguments[%s]\",\n-\t\t\t\targs);\n-\t\treturn -EINVAL;\n-\t}\n-\n-\treturn cryptodev_aesni_mb_create(name, vdev, &init_params);\n-}\n-\n-static int\n-cryptodev_aesni_mb_remove(struct rte_vdev_device *vdev)\n-{\n-\tstruct rte_cryptodev *cryptodev;\n-\tconst char *name;\n-\n-\tname = rte_vdev_device_name(vdev);\n-\tif (name == NULL)\n-\t\treturn -EINVAL;\n-\n-\tcryptodev = rte_cryptodev_pmd_get_named_dev(name);\n-\tif (cryptodev == NULL)\n-\t\treturn -ENODEV;\n-\n-\treturn rte_cryptodev_pmd_destroy(cryptodev);\n-}\n-\n-static struct rte_vdev_driver cryptodev_aesni_mb_pmd_drv = {\n-\t.probe = cryptodev_aesni_mb_probe,\n-\t.remove = cryptodev_aesni_mb_remove\n-};\n-\n-static struct cryptodev_driver aesni_mb_crypto_drv;\n-\n-RTE_PMD_REGISTER_VDEV(CRYPTODEV_NAME_AESNI_MB_PMD, cryptodev_aesni_mb_pmd_drv);\n-RTE_PMD_REGISTER_ALIAS(CRYPTODEV_NAME_AESNI_MB_PMD, cryptodev_aesni_mb_pmd);\n-RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_AESNI_MB_PMD,\n-\t\"max_nb_queue_pairs=<int> \"\n-\t\"socket_id=<int>\");\n-RTE_PMD_REGISTER_CRYPTO_DRIVER(aesni_mb_crypto_drv,\n-\t\tcryptodev_aesni_mb_pmd_drv.driver,\n-\t\tcryptodev_driver_id);\n-\n-RTE_INIT(aesni_mb_init_log)\n-{\n-\taesni_mb_logtype_driver = rte_log_register(\"pmd.crypto.aesni_mb\");\n-}\ndiff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops_compat.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops_compat.c\ndeleted file mode 100644\nindex 79a38b25e..000000000\n--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops_compat.c\n+++ /dev/null\n@@ -1,745 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2015-2017 Intel Corporation\n- */\n-\n-#include <string.h>\n-\n-#include <rte_common.h>\n-#include <rte_malloc.h>\n-#include <rte_cryptodev_pmd.h>\n-\n-#include \"rte_aesni_mb_pmd_private.h\"\n-\n-\n-static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {\n-\t{\t/* MD5 HMAC */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n-\t\t\t{.auth = {\n-\t\t\t\t.algo = RTE_CRYPTO_AUTH_MD5_HMAC,\n-\t\t\t\t.block_size = 64,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 1,\n-\t\t\t\t\t.max = 64,\n-\t\t\t\t\t.increment = 1\n-\t\t\t\t},\n-\t\t\t\t.digest_size = {\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\t\t\t\t.min = 1,\n-\t\t\t\t\t.max = 16,\n-\t\t\t\t\t.increment = 1\n-#else\n-\t\t\t\t\t.min = 12,\n-\t\t\t\t\t.max = 12,\n-\t\t\t\t\t.increment = 0\n-#endif\n-\t\t\t\t},\n-\t\t\t\t.iv_size = { 0 }\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\t{\t/* SHA1 HMAC */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n-\t\t\t{.auth = {\n-\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA1_HMAC,\n-\t\t\t\t.block_size = 64,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 1,\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\t\t\t\t.max = 65535,\n-#else\n-\t\t\t\t\t.max = 64,\n-#endif\n-\t\t\t\t\t.increment = 1\n-\t\t\t\t},\n-\t\t\t\t.digest_size = {\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\t\t\t\t.min = 1,\n-\t\t\t\t\t.max = 20,\n-\t\t\t\t\t.increment = 1\n-#else\n-\t\t\t\t\t.min = 12,\n-\t\t\t\t\t.max = 12,\n-\t\t\t\t\t.increment = 0\n-#endif\n-\t\t\t\t},\n-\t\t\t\t.iv_size = { 0 }\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\t{\t/* SHA224 HMAC */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n-\t\t\t{.auth = {\n-\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA224_HMAC,\n-\t\t\t\t.block_size = 64,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 1,\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\t\t\t\t.max = 65535,\n-#else\n-\t\t\t\t\t.max = 64,\n-#endif\n-\t\t\t\t\t.increment = 1\n-\t\t\t\t},\n-\t\t\t\t.digest_size = {\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\t\t\t\t.min = 1,\n-\t\t\t\t\t.max = 28,\n-\t\t\t\t\t.increment = 1\n-#else\n-\t\t\t\t\t.min = 14,\n-\t\t\t\t\t.max = 14,\n-\t\t\t\t\t.increment = 0\n-#endif\n-\t\t\t\t},\n-\t\t\t\t.iv_size = { 0 }\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\t{\t/* SHA256 HMAC */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n-\t\t\t{.auth = {\n-\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA256_HMAC,\n-\t\t\t\t.block_size = 64,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 1,\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\t\t\t\t.max = 65535,\n-#else\n-\t\t\t\t\t.max = 64,\n-#endif\n-\t\t\t\t\t.increment = 1\n-\t\t\t\t},\n-\t\t\t\t.digest_size = {\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\t\t\t\t.min = 1,\n-\t\t\t\t\t.max = 32,\n-\t\t\t\t\t.increment = 1\n-#else\n-\t\t\t\t\t.min = 16,\n-\t\t\t\t\t.max = 16,\n-\t\t\t\t\t.increment = 0\n-#endif\n-\t\t\t\t},\n-\t\t\t\t.iv_size = { 0 }\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\t{\t/* SHA384 HMAC */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n-\t\t\t{.auth = {\n-\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA384_HMAC,\n-\t\t\t\t.block_size = 128,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 1,\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\t\t\t\t.max = 65535,\n-#else\n-\t\t\t\t\t.max = 128,\n-#endif\n-\t\t\t\t\t.increment = 1\n-\t\t\t\t},\n-\t\t\t\t.digest_size = {\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\t\t\t\t.min = 1,\n-\t\t\t\t\t.max = 48,\n-\t\t\t\t\t.increment = 1\n-#else\n-\t\t\t\t\t.min = 24,\n-\t\t\t\t\t.max = 24,\n-\t\t\t\t\t.increment = 0\n-#endif\n-\t\t\t\t},\n-\t\t\t\t.iv_size = { 0 }\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\t{\t/* SHA512 HMAC */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n-\t\t\t{.auth = {\n-\t\t\t\t.algo = RTE_CRYPTO_AUTH_SHA512_HMAC,\n-\t\t\t\t.block_size = 128,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 1,\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\t\t\t\t.max = 65535,\n-#else\n-\t\t\t\t\t.max = 128,\n-#endif\n-\t\t\t\t\t.increment = 1\n-\t\t\t\t},\n-\t\t\t\t.digest_size = {\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 50, 0)\n-\t\t\t\t\t.min = 1,\n-\t\t\t\t\t.max = 64,\n-\t\t\t\t\t.increment = 1\n-#else\n-\t\t\t\t\t.min = 32,\n-\t\t\t\t\t.max = 32,\n-\t\t\t\t\t.increment = 0\n-#endif\n-\t\t\t\t},\n-\t\t\t\t.iv_size = { 0 }\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\t{\t/* AES XCBC HMAC */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n-\t\t\t{.auth = {\n-\t\t\t\t.algo = RTE_CRYPTO_AUTH_AES_XCBC_MAC,\n-\t\t\t\t.block_size = 16,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 16,\n-\t\t\t\t\t.max = 16,\n-\t\t\t\t\t.increment = 0\n-\t\t\t\t},\n-\t\t\t\t.digest_size = {\n-\t\t\t\t\t.min = 12,\n-\t\t\t\t\t.max = 12,\n-\t\t\t\t\t.increment = 0\n-\t\t\t\t},\n-\t\t\t\t.iv_size = { 0 }\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\t{\t/* AES CBC */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n-\t\t\t{.cipher = {\n-\t\t\t\t.algo = RTE_CRYPTO_CIPHER_AES_CBC,\n-\t\t\t\t.block_size = 16,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 16,\n-\t\t\t\t\t.max = 32,\n-\t\t\t\t\t.increment = 8\n-\t\t\t\t},\n-\t\t\t\t.iv_size = {\n-\t\t\t\t\t.min = 16,\n-\t\t\t\t\t.max = 16,\n-\t\t\t\t\t.increment = 0\n-\t\t\t\t}\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\t{\t/* AES CTR */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n-\t\t\t{.cipher = {\n-\t\t\t\t.algo = RTE_CRYPTO_CIPHER_AES_CTR,\n-\t\t\t\t.block_size = 16,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 16,\n-\t\t\t\t\t.max = 32,\n-\t\t\t\t\t.increment = 8\n-\t\t\t\t},\n-\t\t\t\t.iv_size = {\n-\t\t\t\t\t.min = 12,\n-\t\t\t\t\t.max = 16,\n-\t\t\t\t\t.increment = 4\n-\t\t\t\t}\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\t{\t/* AES DOCSIS BPI */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n-\t\t\t{.cipher = {\n-\t\t\t\t.algo = RTE_CRYPTO_CIPHER_AES_DOCSISBPI,\n-\t\t\t\t.block_size = 16,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 16,\n-\t\t\t\t\t.max = 16,\n-\t\t\t\t\t.increment = 0\n-\t\t\t\t},\n-\t\t\t\t.iv_size = {\n-\t\t\t\t\t.min = 16,\n-\t\t\t\t\t.max = 16,\n-\t\t\t\t\t.increment = 0\n-\t\t\t\t}\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\t{\t/* DES CBC */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n-\t\t\t{.cipher = {\n-\t\t\t\t.algo = RTE_CRYPTO_CIPHER_DES_CBC,\n-\t\t\t\t.block_size = 8,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 8,\n-\t\t\t\t\t.max = 8,\n-\t\t\t\t\t.increment = 0\n-\t\t\t\t},\n-\t\t\t\t.iv_size = {\n-\t\t\t\t\t.min = 8,\n-\t\t\t\t\t.max = 8,\n-\t\t\t\t\t.increment = 0\n-\t\t\t\t}\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\t{\t/*  3DES CBC */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n-\t\t\t{.cipher = {\n-\t\t\t\t.algo = RTE_CRYPTO_CIPHER_3DES_CBC,\n-\t\t\t\t.block_size = 8,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 8,\n-\t\t\t\t\t.max = 24,\n-\t\t\t\t\t.increment = 8\n-\t\t\t\t},\n-\t\t\t\t.iv_size = {\n-\t\t\t\t\t.min = 8,\n-\t\t\t\t\t.max = 8,\n-\t\t\t\t\t.increment = 0\n-\t\t\t\t}\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\t{\t/* DES DOCSIS BPI */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,\n-\t\t\t{.cipher = {\n-\t\t\t\t.algo = RTE_CRYPTO_CIPHER_DES_DOCSISBPI,\n-\t\t\t\t.block_size = 8,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 8,\n-\t\t\t\t\t.max = 8,\n-\t\t\t\t\t.increment = 0\n-\t\t\t\t},\n-\t\t\t\t.iv_size = {\n-\t\t\t\t\t.min = 8,\n-\t\t\t\t\t.max = 8,\n-\t\t\t\t\t.increment = 0\n-\t\t\t\t}\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\t{\t/* AES CCM */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AEAD,\n-\t\t\t{.aead = {\n-\t\t\t\t.algo = RTE_CRYPTO_AEAD_AES_CCM,\n-\t\t\t\t.block_size = 16,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 16,\n-\t\t\t\t\t.max = 16,\n-\t\t\t\t\t.increment = 0\n-\t\t\t\t},\n-\t\t\t\t.digest_size = {\n-\t\t\t\t\t.min = 4,\n-\t\t\t\t\t.max = 16,\n-\t\t\t\t\t.increment = 2\n-\t\t\t\t},\n-\t\t\t\t.aad_size = {\n-\t\t\t\t\t.min = 0,\n-\t\t\t\t\t.max = 46,\n-\t\t\t\t\t.increment = 1\n-\t\t\t\t},\n-\t\t\t\t.iv_size = {\n-\t\t\t\t\t.min = 7,\n-\t\t\t\t\t.max = 13,\n-\t\t\t\t\t.increment = 1\n-\t\t\t\t},\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\t{\t/* AES CMAC */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n-\t\t\t{.auth = {\n-\t\t\t\t.algo = RTE_CRYPTO_AUTH_AES_CMAC,\n-\t\t\t\t.block_size = 16,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 16,\n-\t\t\t\t\t.max = 16,\n-\t\t\t\t\t.increment = 0\n-\t\t\t\t},\n-\t\t\t\t.digest_size = {\n-\t\t\t\t\t.min = 1,\n-\t\t\t\t\t.max = 16,\n-\t\t\t\t\t.increment = 1\n-\t\t\t\t},\n-\t\t\t\t.iv_size = { 0 }\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\t{\t/* AES GCM */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AEAD,\n-\t\t\t{.aead = {\n-\t\t\t\t.algo = RTE_CRYPTO_AEAD_AES_GCM,\n-\t\t\t\t.block_size = 16,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 16,\n-\t\t\t\t\t.max = 32,\n-\t\t\t\t\t.increment = 8\n-\t\t\t\t},\n-\t\t\t\t.digest_size = {\n-\t\t\t\t\t.min = 8,\n-\t\t\t\t\t.max = 16,\n-\t\t\t\t\t.increment = 4\n-\t\t\t\t},\n-\t\t\t\t.aad_size = {\n-\t\t\t\t\t.min = 0,\n-\t\t\t\t\t.max = 65535,\n-\t\t\t\t\t.increment = 1\n-\t\t\t\t},\n-\t\t\t\t.iv_size = {\n-\t\t\t\t\t.min = 12,\n-\t\t\t\t\t.max = 12,\n-\t\t\t\t\t.increment = 0\n-\t\t\t\t}\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\t{\t/* AES GMAC (AUTH) */\n-\t\t.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,\n-\t\t{.sym = {\n-\t\t\t.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,\n-\t\t\t{.auth = {\n-\t\t\t\t.algo = RTE_CRYPTO_AUTH_AES_GMAC,\n-\t\t\t\t.block_size = 16,\n-\t\t\t\t.key_size = {\n-\t\t\t\t\t.min = 16,\n-\t\t\t\t\t.max = 32,\n-\t\t\t\t\t.increment = 8\n-\t\t\t\t},\n-\t\t\t\t.digest_size = {\n-\t\t\t\t\t.min = 8,\n-\t\t\t\t\t.max = 16,\n-\t\t\t\t\t.increment = 4\n-\t\t\t\t},\n-\t\t\t\t.iv_size = {\n-\t\t\t\t\t.min = 12,\n-\t\t\t\t\t.max = 12,\n-\t\t\t\t\t.increment = 0\n-\t\t\t\t}\n-\t\t\t}, }\n-\t\t}, }\n-\t},\n-\tRTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()\n-};\n-\n-\n-/** Configure device */\n-static int\n-aesni_mb_pmd_config(__rte_unused struct rte_cryptodev *dev,\n-\t\t__rte_unused struct rte_cryptodev_config *config)\n-{\n-\treturn 0;\n-}\n-\n-/** Start device */\n-static int\n-aesni_mb_pmd_start(__rte_unused struct rte_cryptodev *dev)\n-{\n-\treturn 0;\n-}\n-\n-/** Stop device */\n-static void\n-aesni_mb_pmd_stop(__rte_unused struct rte_cryptodev *dev)\n-{\n-}\n-\n-/** Close device */\n-static int\n-aesni_mb_pmd_close(__rte_unused struct rte_cryptodev *dev)\n-{\n-\treturn 0;\n-}\n-\n-\n-/** Get device statistics */\n-static void\n-aesni_mb_pmd_stats_get(struct rte_cryptodev *dev,\n-\t\tstruct rte_cryptodev_stats *stats)\n-{\n-\tint qp_id;\n-\n-\tfor (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {\n-\t\tstruct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];\n-\n-\t\tstats->enqueued_count += qp->stats.enqueued_count;\n-\t\tstats->dequeued_count += qp->stats.dequeued_count;\n-\n-\t\tstats->enqueue_err_count += qp->stats.enqueue_err_count;\n-\t\tstats->dequeue_err_count += qp->stats.dequeue_err_count;\n-\t}\n-}\n-\n-/** Reset device statistics */\n-static void\n-aesni_mb_pmd_stats_reset(struct rte_cryptodev *dev)\n-{\n-\tint qp_id;\n-\n-\tfor (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {\n-\t\tstruct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];\n-\n-\t\tmemset(&qp->stats, 0, sizeof(qp->stats));\n-\t}\n-}\n-\n-\n-/** Get device info */\n-static void\n-aesni_mb_pmd_info_get(struct rte_cryptodev *dev,\n-\t\tstruct rte_cryptodev_info *dev_info)\n-{\n-\tstruct aesni_mb_private *internals = dev->data->dev_private;\n-\n-\tif (dev_info != NULL) {\n-\t\tdev_info->driver_id = dev->driver_id;\n-\t\tdev_info->feature_flags = dev->feature_flags;\n-\t\tdev_info->capabilities = aesni_mb_pmd_capabilities;\n-\t\tdev_info->max_nb_queue_pairs = internals->max_nb_queue_pairs;\n-\t\t/* No limit of number of sessions */\n-\t\tdev_info->sym.max_nb_sessions = 0;\n-\t}\n-}\n-\n-/** Release queue pair */\n-static int\n-aesni_mb_pmd_qp_release(struct rte_cryptodev *dev, uint16_t qp_id)\n-{\n-\tstruct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];\n-\tstruct rte_ring *r = NULL;\n-\n-\tif (qp != NULL) {\n-\t\tr = rte_ring_lookup(qp->name);\n-\t\tif (r)\n-\t\t\trte_ring_free(r);\n-\t\tif (qp->mb_mgr)\n-\t\t\tfree_mb_mgr(qp->mb_mgr);\n-\t\trte_free(qp);\n-\t\tdev->data->queue_pairs[qp_id] = NULL;\n-\t}\n-\treturn 0;\n-}\n-\n-/** set a unique name for the queue pair based on it's name, dev_id and qp_id */\n-static int\n-aesni_mb_pmd_qp_set_unique_name(struct rte_cryptodev *dev,\n-\t\tstruct aesni_mb_qp *qp)\n-{\n-\tunsigned n = snprintf(qp->name, sizeof(qp->name),\n-\t\t\t\"aesni_mb_pmd_%u_qp_%u\",\n-\t\t\tdev->data->dev_id, qp->id);\n-\n-\tif (n >= sizeof(qp->name))\n-\t\treturn -1;\n-\n-\treturn 0;\n-}\n-\n-/** Create a ring to place processed operations on */\n-static struct rte_ring *\n-aesni_mb_pmd_qp_create_processed_ops_ring(struct aesni_mb_qp *qp,\n-\t\tunsigned int ring_size, int socket_id)\n-{\n-\tstruct rte_ring *r;\n-\tchar ring_name[RTE_CRYPTODEV_NAME_MAX_LEN];\n-\n-\tunsigned int n = snprintf(ring_name, sizeof(ring_name), \"%s\", qp->name);\n-\n-\tif (n >= sizeof(ring_name))\n-\t\treturn NULL;\n-\n-\tr = rte_ring_lookup(ring_name);\n-\tif (r) {\n-\t\tif (rte_ring_get_size(r) >= ring_size) {\n-\t\t\tAESNI_MB_LOG(INFO, \"Reusing existing ring %s for processed ops\",\n-\t\t\tring_name);\n-\t\t\treturn r;\n-\t\t}\n-\n-\t\tAESNI_MB_LOG(ERR, \"Unable to reuse existing ring %s for processed ops\",\n-\t\t\tring_name);\n-\t\treturn NULL;\n-\t}\n-\n-\treturn rte_ring_create(ring_name, ring_size, socket_id,\n-\t\t\tRING_F_SP_ENQ | RING_F_SC_DEQ);\n-}\n-\n-/** Setup a queue pair */\n-static int\n-aesni_mb_pmd_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n-\t\tconst struct rte_cryptodev_qp_conf *qp_conf,\n-\t\tint socket_id)\n-{\n-\tstruct aesni_mb_qp *qp = NULL;\n-\tstruct aesni_mb_private *internals = dev->data->dev_private;\n-\tint ret = -1;\n-\n-\t/* Free memory prior to re-allocation if needed. */\n-\tif (dev->data->queue_pairs[qp_id] != NULL)\n-\t\taesni_mb_pmd_qp_release(dev, qp_id);\n-\n-\t/* Allocate the queue pair data structure. */\n-\tqp = rte_zmalloc_socket(\"AES-NI PMD Queue Pair\", sizeof(*qp),\n-\t\t\t\t\tRTE_CACHE_LINE_SIZE, socket_id);\n-\tif (qp == NULL)\n-\t\treturn -ENOMEM;\n-\n-\tqp->id = qp_id;\n-\tdev->data->queue_pairs[qp_id] = qp;\n-\n-\tif (aesni_mb_pmd_qp_set_unique_name(dev, qp))\n-\t\tgoto qp_setup_cleanup;\n-\n-\n-\tqp->mb_mgr = alloc_mb_mgr(0);\n-\tif (qp->mb_mgr == NULL) {\n-\t\tret = -ENOMEM;\n-\t\tgoto qp_setup_cleanup;\n-\t}\n-\n-\tqp->op_fns = &job_ops[internals->vector_mode];\n-\n-\tqp->ingress_queue = aesni_mb_pmd_qp_create_processed_ops_ring(qp,\n-\t\t\tqp_conf->nb_descriptors, socket_id);\n-\tif (qp->ingress_queue == NULL) {\n-\t\tret = -1;\n-\t\tgoto qp_setup_cleanup;\n-\t}\n-\n-\tqp->sess_mp = qp_conf->mp_session;\n-\tqp->sess_mp_priv = qp_conf->mp_session_private;\n-\n-\tmemset(&qp->stats, 0, sizeof(qp->stats));\n-\n-\tchar mp_name[RTE_MEMPOOL_NAMESIZE];\n-\n-\tsnprintf(mp_name, RTE_MEMPOOL_NAMESIZE,\n-\t\t\t\t\"digest_mp_%u_%u\", dev->data->dev_id, qp_id);\n-\n-\t/* Initialise multi-buffer manager */\n-\t(*qp->op_fns->job.init_mgr)(qp->mb_mgr);\n-\treturn 0;\n-\n-qp_setup_cleanup:\n-\tif (qp) {\n-\t\tif (qp->mb_mgr == NULL)\n-\t\t\tfree_mb_mgr(qp->mb_mgr);\n-\t\trte_free(qp);\n-\t}\n-\n-\treturn ret;\n-}\n-\n-/** Return the number of allocated queue pairs */\n-static uint32_t\n-aesni_mb_pmd_qp_count(struct rte_cryptodev *dev)\n-{\n-\treturn dev->data->nb_queue_pairs;\n-}\n-\n-/** Returns the size of the aesni multi-buffer session structure */\n-static unsigned\n-aesni_mb_pmd_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)\n-{\n-\treturn sizeof(struct aesni_mb_session);\n-}\n-\n-/** Configure a aesni multi-buffer session from a crypto xform chain */\n-static int\n-aesni_mb_pmd_sym_session_configure(struct rte_cryptodev *dev,\n-\t\tstruct rte_crypto_sym_xform *xform,\n-\t\tstruct rte_cryptodev_sym_session *sess,\n-\t\tstruct rte_mempool *mempool)\n-{\n-\tvoid *sess_private_data;\n-\tstruct aesni_mb_private *internals = dev->data->dev_private;\n-\tint ret;\n-\n-\tif (unlikely(sess == NULL)) {\n-\t\tAESNI_MB_LOG(ERR, \"invalid session struct\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tif (rte_mempool_get(mempool, &sess_private_data)) {\n-\t\tAESNI_MB_LOG(ERR,\n-\t\t\t\t\"Couldn't get object from session mempool\");\n-\t\treturn -ENOMEM;\n-\t}\n-\n-\tret = aesni_mb_set_session_parameters(&job_ops[internals->vector_mode],\n-\t\t\tsess_private_data, xform);\n-\tif (ret != 0) {\n-\t\tAESNI_MB_LOG(ERR, \"failed configure session parameters\");\n-\n-\t\t/* Return session to mempool */\n-\t\trte_mempool_put(mempool, sess_private_data);\n-\t\treturn ret;\n-\t}\n-\n-\tset_sym_session_private_data(sess, dev->driver_id,\n-\t\t\tsess_private_data);\n-\n-\treturn 0;\n-}\n-\n-/** Clear the memory of session so it doesn't leave key material behind */\n-static void\n-aesni_mb_pmd_sym_session_clear(struct rte_cryptodev *dev,\n-\t\tstruct rte_cryptodev_sym_session *sess)\n-{\n-\tuint8_t index = dev->driver_id;\n-\tvoid *sess_priv = get_sym_session_private_data(sess, index);\n-\n-\t/* Zero out the whole structure */\n-\tif (sess_priv) {\n-\t\tmemset(sess_priv, 0, sizeof(struct aesni_mb_session));\n-\t\tstruct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);\n-\t\tset_sym_session_private_data(sess, index, NULL);\n-\t\trte_mempool_put(sess_mp, sess_priv);\n-\t}\n-}\n-\n-struct rte_cryptodev_ops aesni_mb_pmd_ops = {\n-\t\t.dev_configure\t\t= aesni_mb_pmd_config,\n-\t\t.dev_start\t\t= aesni_mb_pmd_start,\n-\t\t.dev_stop\t\t= aesni_mb_pmd_stop,\n-\t\t.dev_close\t\t= aesni_mb_pmd_close,\n-\n-\t\t.stats_get\t\t= aesni_mb_pmd_stats_get,\n-\t\t.stats_reset\t\t= aesni_mb_pmd_stats_reset,\n-\n-\t\t.dev_infos_get\t\t= aesni_mb_pmd_info_get,\n-\n-\t\t.queue_pair_setup\t= aesni_mb_pmd_qp_setup,\n-\t\t.queue_pair_release\t= aesni_mb_pmd_qp_release,\n-\t\t.queue_pair_count\t= aesni_mb_pmd_qp_count,\n-\n-\t\t.sym_session_get_size\t= aesni_mb_pmd_sym_session_get_size,\n-\t\t.sym_session_configure\t= aesni_mb_pmd_sym_session_configure,\n-\t\t.sym_session_clear\t= aesni_mb_pmd_sym_session_clear\n-};\n-\n-struct rte_cryptodev_ops *rte_aesni_mb_pmd_ops = &aesni_mb_pmd_ops;\ndiff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_private.h b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_private.h\nindex 61f419dda..4d439360f 100644\n--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_private.h\n+++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_private.h\n@@ -7,21 +7,6 @@\n \n #include <intel-ipsec-mb.h>\n \n-\n-/*\n- * IMB_VERSION_NUM macro was introduced in version Multi-buffer 0.50,\n- * so if macro is not defined, it means that the version is 0.49.\n- */\n-#if !defined(IMB_VERSION_NUM)\n-#define IMB_VERSION(a, b, c) (((a) << 16) + ((b) << 8) + (c))\n-#define IMB_VERSION_NUM IMB_VERSION(0, 49, 0)\n-#endif\n-\n-#if IMB_VERSION_NUM < IMB_VERSION(0, 52, 0)\n-#include \"aesni_mb_ops.h\"\n-#endif\n-\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 52, 0)\n enum aesni_mb_vector_mode {\n \tRTE_AESNI_MB_NOT_SUPPORTED = 0,\n \tRTE_AESNI_MB_SSE,\n@@ -29,8 +14,6 @@ enum aesni_mb_vector_mode {\n \tRTE_AESNI_MB_AVX2,\n \tRTE_AESNI_MB_AVX512\n };\n-#endif\n-\n \n #define CRYPTODEV_NAME_AESNI_MB_PMD\tcrypto_aesni_mb\n /**< AES-NI Multi buffer PMD device name */\n@@ -109,13 +92,11 @@ static const unsigned auth_digest_byte_lengths[] = {\n \t\t[AES_CMAC]\t= 16,\n \t\t[AES_GMAC]\t= 12,\n \t\t[NULL_HASH]\t= 0,\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 52, 0)\n \t\t[PLAIN_SHA1]\t= 20,\n \t\t[PLAIN_SHA_224]\t= 28,\n \t\t[PLAIN_SHA_256]\t= 32,\n \t\t[PLAIN_SHA_384]\t= 48,\n \t\t[PLAIN_SHA_512]\t= 64\n-#endif\n \t/**< Vector mode dependent pointer table of the multi-buffer APIs */\n \n };\n@@ -149,10 +130,8 @@ struct aesni_mb_private {\n \t/**< CPU vector instruction set mode */\n \tunsigned max_nb_queue_pairs;\n \t/**< Max number of queue pairs supported by device */\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 52, 0)\n \tMB_MGR *mb_mgr;\n \t/**< Multi-buffer instance */\n-#endif\n };\n \n /** AESNI Multi buffer queue pair */\n@@ -160,10 +139,6 @@ struct aesni_mb_qp {\n \tuint16_t id;\n \t/**< Queue Pair Identifier */\n \tchar name[RTE_CRYPTODEV_NAME_MAX_LEN];\n-#if IMB_VERSION_NUM < IMB_VERSION(0, 52, 0)\n-\t/**< Unique Queue Pair Name */\n-\tconst struct aesni_mb_op_fns *op_fns;\n-#endif\n \t/**< Unique Queue Pair Name */\n \tMB_MGR *mb_mgr;\n \t/**< Multi-buffer instance */\n@@ -277,22 +252,10 @@ struct aesni_mb_session {\n \t} aead;\n } __rte_cache_aligned;\n \n-\n-\n-#if IMB_VERSION_NUM >= IMB_VERSION(0, 52, 0)\n-/**\n- *\n- */\n extern int\n aesni_mb_set_session_parameters(const MB_MGR *mb_mgr,\n \t\tstruct aesni_mb_session *sess,\n \t\tconst struct rte_crypto_sym_xform *xform);\n-#else\n-extern int\n-aesni_mb_set_session_parameters(const struct aesni_mb_op_fns *mb_ops,\n-\t\tstruct aesni_mb_session *sess,\n-\t\tconst struct rte_crypto_sym_xform *xform);\n-#endif\n \n /** device specific operations function pointer structure */\n extern struct rte_cryptodev_ops *rte_aesni_mb_pmd_ops;\n",
    "prefixes": [
        "v2"
    ]
}