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GET /api/patches/49138/?format=api
{ "id": 49138, "url": "http://patches.dpdk.org/api/patches/49138/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1545242837-28585-3-git-send-email-konstantin.ananyev@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1545242837-28585-3-git-send-email-konstantin.ananyev@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1545242837-28585-3-git-send-email-konstantin.ananyev@intel.com", "date": "2018-12-19T18:07:17", "name": "[v2,2/2] test: add new test-cases for rwlock autotest", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "2445de4848dc8659d77a289546cab4a072cefc9f", "submitter": { "id": 33, "url": "http://patches.dpdk.org/api/people/33/?format=api", "name": "Ananyev, Konstantin", "email": "konstantin.ananyev@intel.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1545242837-28585-3-git-send-email-konstantin.ananyev@intel.com/mbox/", "series": [ { "id": 2878, "url": "http://patches.dpdk.org/api/series/2878/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=2878", "date": "2018-12-19T18:07:17", "name": null, "version": 2, "mbox": "http://patches.dpdk.org/series/2878/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/49138/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/49138/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 730241B5A8;\n\tWed, 19 Dec 2018 19:07:34 +0100 (CET)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 679241B586\n\tfor <dev@dpdk.org>; Wed, 19 Dec 2018 19:07:30 +0100 (CET)", "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t19 Dec 2018 10:07:30 -0800", "from sivswdev08.ir.intel.com (HELO localhost.localdomain)\n\t([10.237.217.47])\n\tby orsmga003.jf.intel.com with ESMTP; 19 Dec 2018 10:07:28 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.56,373,1539673200\"; d=\"scan'208\";a=\"111877009\"", "From": "Konstantin Ananyev <konstantin.ananyev@intel.com>", "To": "dev@dpdk.org", "Cc": "Konstantin Ananyev <konstantin.ananyev@intel.com>", "Date": "Wed, 19 Dec 2018 18:07:17 +0000", "Message-Id": "<1545242837-28585-3-git-send-email-konstantin.ananyev@intel.com>", "X-Mailer": "git-send-email 1.7.0.7", "In-Reply-To": "<1542130061-3702-1-git-send-email-konstantin.ananyev@intel.com>", "References": "<1542130061-3702-1-git-send-email-konstantin.ananyev@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 2/2] test: add new test-cases for rwlock\n\tautotest", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add few functional and perfomance tests\nfor rte_rwlock_read_trylock() and rte_rwlock_write_trylock().\n\nSigned-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>\nReviewed-by: Gavin Hu <gavin.hu@arm.com>\n---\n test/test/test_rwlock.c | 409 ++++++++++++++++++++++++++++++++++++++--\n 1 file changed, 390 insertions(+), 19 deletions(-)", "diff": "diff --git a/test/test/test_rwlock.c b/test/test/test_rwlock.c\nindex 29171c422..224f0dea8 100644\n--- a/test/test/test_rwlock.c\n+++ b/test/test/test_rwlock.c\n@@ -4,8 +4,10 @@\n \n #include <stdio.h>\n #include <stdint.h>\n+#include <inttypes.h>\n #include <unistd.h>\n #include <sys/queue.h>\n+#include <string.h>\n \n #include <rte_common.h>\n #include <rte_memory.h>\n@@ -22,29 +24,45 @@\n /*\n * rwlock test\n * ===========\n- *\n- * - There is a global rwlock and a table of rwlocks (one per lcore).\n- *\n- * - The test function takes all of these locks and launches the\n- * ``test_rwlock_per_core()`` function on each core (except the master).\n- *\n- * - The function takes the global write lock, display something,\n- * then releases the global lock.\n- * - Then, it takes the per-lcore write lock, display something, and\n- * releases the per-core lock.\n- * - Finally, a read lock is taken during 100 ms, then released.\n- *\n- * - The main function unlocks the per-lcore locks sequentially and\n- * waits between each lock. This triggers the display of a message\n- * for each core, in the correct order.\n- *\n- * Then, it tries to take the global write lock and display the last\n- * message. The autotest script checks that the message order is correct.\n+ * Provides UT for rte_rwlock API.\n+ * Main concern is on functional testing, but also provides some\n+ * performance measurements.\n+ * Obviously for proper testing need to be executed with more than one lcore.\n */\n \n+#define ITER_NUM\t0x80\n+\n+#define TEST_SEC\t5\n+\n static rte_rwlock_t sl;\n static rte_rwlock_t sl_tab[RTE_MAX_LCORE];\n \n+enum {\n+\tLC_TYPE_RDLOCK,\n+\tLC_TYPE_WRLOCK,\n+};\n+\n+static struct {\n+\trte_rwlock_t lock;\n+\tuint64_t tick;\n+\tvolatile union {\n+\t\tuint8_t u8[RTE_CACHE_LINE_SIZE];\n+\t\tuint64_t u64[RTE_CACHE_LINE_SIZE / sizeof(uint64_t)];\n+\t} data;\n+} __rte_cache_aligned try_rwlock_data;\n+\n+struct try_rwlock_lcore {\n+\tint32_t rc;\n+\tint32_t type;\n+\tstruct {\n+\t\tuint64_t tick;\n+\t\tuint64_t fail;\n+\t\tuint64_t success;\n+\t} stat;\n+} __rte_cache_aligned;\n+\n+static struct try_rwlock_lcore try_lcore_data[RTE_MAX_LCORE];\n+\n static int\n test_rwlock_per_core(__attribute__((unused)) void *arg)\n {\n@@ -65,8 +83,27 @@ test_rwlock_per_core(__attribute__((unused)) void *arg)\n \treturn 0;\n }\n \n+/*\n+ * - There is a global rwlock and a table of rwlocks (one per lcore).\n+ *\n+ * - The test function takes all of these locks and launches the\n+ * ``test_rwlock_per_core()`` function on each core (except the master).\n+ *\n+ * - The function takes the global write lock, display something,\n+ * then releases the global lock.\n+ * - Then, it takes the per-lcore write lock, display something, and\n+ * releases the per-core lock.\n+ * - Finally, a read lock is taken during 100 ms, then released.\n+ *\n+ * - The main function unlocks the per-lcore locks sequentially and\n+ * waits between each lock. This triggers the display of a message\n+ * for each core, in the correct order.\n+ *\n+ * Then, it tries to take the global write lock and display the last\n+ * message. The autotest script checks that the message order is correct.\n+ */\n static int\n-test_rwlock(void)\n+rwlock_test1(void)\n {\n \tint i;\n \n@@ -98,4 +135,338 @@ test_rwlock(void)\n \treturn 0;\n }\n \n+static int\n+try_read(uint32_t lc)\n+{\n+\tint32_t rc;\n+\tuint32_t i;\n+\n+\trc = rte_rwlock_read_trylock(&try_rwlock_data.lock);\n+\tif (rc != 0)\n+\t\treturn rc;\n+\n+\tfor (i = 0; i != RTE_DIM(try_rwlock_data.data.u64); i++) {\n+\n+\t\t/* race condition occurred, lock doesn't work properly */\n+\t\tif (try_rwlock_data.data.u64[i] != 0) {\n+\t\t\tprintf(\"%s(%u) error: unexpected data pattern\\n\",\n+\t\t\t\t__func__, lc);\n+\t\t\trte_memdump(stdout, NULL,\n+\t\t\t\t(void *)(uintptr_t)&try_rwlock_data.data,\n+\t\t\t\tsizeof(try_rwlock_data.data));\n+\t\t\trc = -EFAULT;\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\n+\trte_rwlock_read_unlock(&try_rwlock_data.lock);\n+\treturn rc;\n+}\n+\n+static int\n+try_write(uint32_t lc)\n+{\n+\tint32_t rc;\n+\tuint32_t i, v;\n+\n+\tv = RTE_MAX(lc % UINT8_MAX, 1U);\n+\n+\trc = rte_rwlock_write_trylock(&try_rwlock_data.lock);\n+\tif (rc != 0)\n+\t\treturn rc;\n+\n+\t/* update by bytes in reverese order */\n+\tfor (i = RTE_DIM(try_rwlock_data.data.u8); i-- != 0; ) {\n+\n+\t\t/* race condition occurred, lock doesn't work properly */\n+\t\tif (try_rwlock_data.data.u8[i] != 0) {\n+\t\t\tprintf(\"%s:%d(%u) error: unexpected data pattern\\n\",\n+\t\t\t\t__func__, __LINE__, lc);\n+\t\t\trte_memdump(stdout, NULL,\n+\t\t\t\t(void *)(uintptr_t)&try_rwlock_data.data,\n+\t\t\t\tsizeof(try_rwlock_data.data));\n+\t\t\trc = -EFAULT;\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\ttry_rwlock_data.data.u8[i] = v;\n+\t}\n+\n+\t/* restore by bytes in reverese order */\n+\tfor (i = RTE_DIM(try_rwlock_data.data.u8); i-- != 0; ) {\n+\n+\t\t/* race condition occurred, lock doesn't work properly */\n+\t\tif (try_rwlock_data.data.u8[i] != v) {\n+\t\t\tprintf(\"%s:%d(%u) error: unexpected data pattern\\n\",\n+\t\t\t\t__func__, __LINE__, lc);\n+\t\t\trte_memdump(stdout, NULL,\n+\t\t\t\t(void *)(uintptr_t)&try_rwlock_data.data,\n+\t\t\t\tsizeof(try_rwlock_data.data));\n+\t\t\trc = -EFAULT;\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\ttry_rwlock_data.data.u8[i] = 0;\n+\t}\n+\n+\trte_rwlock_write_unlock(&try_rwlock_data.lock);\n+\treturn rc;\n+}\n+\n+static int\n+try_read_lcore(__rte_unused void *data)\n+{\n+\tint32_t rc;\n+\tuint32_t i, lc;\n+\tuint64_t ftm, stm, tm;\n+\tstruct try_rwlock_lcore *lcd;\n+\n+\tlc = rte_lcore_id();\n+\tlcd = try_lcore_data + lc;\n+\tlcd->type = LC_TYPE_RDLOCK;\n+\n+\tftm = try_rwlock_data.tick;\n+\tstm = rte_get_timer_cycles();\n+\n+\tdo {\n+\t\tfor (i = 0; i != ITER_NUM; i++) {\n+\t\t\trc = try_read(lc);\n+\t\t\tif (rc == 0)\n+\t\t\t\tlcd->stat.success++;\n+\t\t\telse if (rc == -EBUSY)\n+\t\t\t\tlcd->stat.fail++;\n+\t\t\telse\n+\t\t\t\tbreak;\n+\t\t\trc = 0;\n+\t\t}\n+\t\ttm = rte_get_timer_cycles() - stm;\n+\t} while (tm < ftm && rc == 0);\n+\n+\tlcd->rc = rc;\n+\tlcd->stat.tick = tm;\n+\treturn rc;\n+}\n+\n+static int\n+try_write_lcore(__rte_unused void *data)\n+{\n+\tint32_t rc;\n+\tuint32_t i, lc;\n+\tuint64_t ftm, stm, tm;\n+\tstruct try_rwlock_lcore *lcd;\n+\n+\tlc = rte_lcore_id();\n+\tlcd = try_lcore_data + lc;\n+\tlcd->type = LC_TYPE_WRLOCK;\n+\n+\tftm = try_rwlock_data.tick;\n+\tstm = rte_get_timer_cycles();\n+\n+\tdo {\n+\t\tfor (i = 0; i != ITER_NUM; i++) {\n+\t\t\trc = try_write(lc);\n+\t\t\tif (rc == 0)\n+\t\t\t\tlcd->stat.success++;\n+\t\t\telse if (rc == -EBUSY)\n+\t\t\t\tlcd->stat.fail++;\n+\t\t\telse\n+\t\t\t\tbreak;\n+\t\t\trc = 0;\n+\t\t}\n+\t\ttm = rte_get_timer_cycles() - stm;\n+\t} while (tm < ftm && rc == 0);\n+\n+\tlcd->rc = rc;\n+\tlcd->stat.tick = tm;\n+\treturn rc;\n+}\n+\n+static void\n+print_try_lcore_stats(const struct try_rwlock_lcore *tlc, uint32_t lc)\n+{\n+\tuint64_t f, s;\n+\n+\tf = RTE_MAX(tlc->stat.fail, 1ULL);\n+\ts = RTE_MAX(tlc->stat.success, 1ULL);\n+\n+\tprintf(\"try_lcore_data[%u]={\\n\"\n+\t\t\"\\trc=%d,\\n\"\n+\t\t\"\\ttype=%s,\\n\"\n+\t\t\"\\tfail=%\" PRIu64 \",\\n\"\n+\t\t\"\\tsuccess=%\" PRIu64 \",\\n\"\n+\t\t\"\\tcycles=%\" PRIu64 \",\\n\"\n+\t\t\"\\tcycles/op=%#Lf,\\n\"\n+\t\t\"\\tcycles/success=%#Lf,\\n\"\n+\t\t\"\\tsuccess/fail=%#Lf,\\n\"\n+\t\t\"};\\n\",\n+\t\tlc,\n+\t\ttlc->rc,\n+\t\ttlc->type == LC_TYPE_RDLOCK ? \"RDLOCK\" : \"WRLOCK\",\n+\t\ttlc->stat.fail,\n+\t\ttlc->stat.success,\n+\t\ttlc->stat.tick,\n+\t\t(long double)tlc->stat.tick /\n+\t\t(tlc->stat.fail + tlc->stat.success),\n+\t\t(long double)tlc->stat.tick / s,\n+\t\t(long double)tlc->stat.success / f);\n+}\n+\n+static void\n+collect_try_lcore_stats(struct try_rwlock_lcore *tlc,\n+\tconst struct try_rwlock_lcore *lc)\n+{\n+\ttlc->stat.tick += lc->stat.tick;\n+\ttlc->stat.fail += lc->stat.fail;\n+\ttlc->stat.success += lc->stat.success;\n+}\n+\n+/*\n+ * Process collected results:\n+ * - check status\n+ * - collect and print statistics\n+ */\n+static int\n+process_try_lcore_stats(void)\n+{\n+\tint32_t rc;\n+\tuint32_t lc, rd, wr;\n+\tstruct try_rwlock_lcore rlc, wlc;\n+\n+\tmemset(&rlc, 0, sizeof(rlc));\n+\tmemset(&wlc, 0, sizeof(wlc));\n+\n+\trlc.type = LC_TYPE_RDLOCK;\n+\twlc.type = LC_TYPE_WRLOCK;\n+\trd = 0;\n+\twr = 0;\n+\n+\trc = 0;\n+\tRTE_LCORE_FOREACH(lc) {\n+\t\trc |= try_lcore_data[lc].rc;\n+\t\tif (try_lcore_data[lc].type == LC_TYPE_RDLOCK) {\n+\t\t\tcollect_try_lcore_stats(&rlc, try_lcore_data + lc);\n+\t\t\trd++;\n+\t\t} else {\n+\t\t\tcollect_try_lcore_stats(&wlc, try_lcore_data + lc);\n+\t\t\twr++;\n+\t\t}\n+\t}\n+\n+\tif (rc == 0) {\n+\t\tRTE_LCORE_FOREACH(lc)\n+\t\t\tprint_try_lcore_stats(try_lcore_data + lc, lc);\n+\n+\t\tif (rd != 0) {\n+\t\t\tprintf(\"aggregated stats for %u RDLOCK cores:\\n\", rd);\n+\t\t\tprint_try_lcore_stats(&rlc, rd);\n+\t\t}\n+\n+\t\tif (wr != 0) {\n+\t\t\tprintf(\"aggregated stats for %u WRLOCK cores:\\n\", wr);\n+\t\t\tprint_try_lcore_stats(&wlc, wr);\n+\t\t}\n+\t}\n+\n+\treturn rc;\n+}\n+\n+static void\n+try_test_reset(void)\n+{\n+\tmemset(&try_lcore_data, 0, sizeof(try_lcore_data));\n+\tmemset(&try_rwlock_data, 0, sizeof(try_rwlock_data));\n+\ttry_rwlock_data.tick = TEST_SEC * rte_get_tsc_hz();\n+}\n+\n+/* all lcores grab RDLOCK */\n+static int\n+try_rwlock_test_rda(void)\n+{\n+\ttry_test_reset();\n+\n+\t/* start read test on all avaialble lcores */\n+\trte_eal_mp_remote_launch(try_read_lcore, NULL, CALL_MASTER);\n+\trte_eal_mp_wait_lcore();\n+\n+\treturn process_try_lcore_stats();\n+}\n+\n+/* all slave lcores grab RDLOCK, master one grabs WRLOCK */\n+static int\n+try_rwlock_test_rds_wrm(void)\n+{\n+\ttry_test_reset();\n+\n+\trte_eal_mp_remote_launch(try_read_lcore, NULL, SKIP_MASTER);\n+\ttry_write_lcore(NULL);\n+\trte_eal_mp_wait_lcore();\n+\n+\treturn process_try_lcore_stats();\n+}\n+\n+/* master and even slave lcores grab RDLOCK, odd lcores grab WRLOCK */\n+static int\n+try_rwlock_test_rde_wro(void)\n+{\n+\tuint32_t lc, mlc;\n+\n+\ttry_test_reset();\n+\n+\tmlc = rte_get_master_lcore();\n+\n+\tRTE_LCORE_FOREACH(lc) {\n+\t\tif (lc != mlc) {\n+\t\t\tif ((lc & 1) == 0)\n+\t\t\t\trte_eal_remote_launch(try_read_lcore,\n+\t\t\t\t\t\tNULL, lc);\n+\t\t\telse\n+\t\t\t\trte_eal_remote_launch(try_write_lcore,\n+\t\t\t\t\t\tNULL, lc);\n+\t\t}\n+\t}\n+\ttry_read_lcore(NULL);\n+\trte_eal_mp_wait_lcore();\n+\n+\treturn process_try_lcore_stats();\n+}\n+\n+static int\n+test_rwlock(void)\n+{\n+\tuint32_t i;\n+\tint32_t rc, ret;\n+\n+\tstatic const struct {\n+\t\tconst char *name;\n+\t\tint (*ftst)(void);\n+\t} test[] = {\n+\t\t{\n+\t\t\t.name = \"rwlock_test1\",\n+\t\t\t.ftst = rwlock_test1,\n+\t\t},\n+\t\t{\n+\t\t\t.name = \"try_rwlock_test_rda\",\n+\t\t\t.ftst = try_rwlock_test_rda,\n+\t\t},\n+\t\t{\n+\t\t\t.name = \"try_rwlock_test_rds_wrm\",\n+\t\t\t.ftst = try_rwlock_test_rds_wrm,\n+\t\t},\n+\t\t{\n+\t\t\t.name = \"try_rwlock_test_rde_wro\",\n+\t\t\t.ftst = try_rwlock_test_rde_wro,\n+\t\t},\n+\t};\n+\n+\tret = 0;\n+\tfor (i = 0; i != RTE_DIM(test); i++) {\n+\t\tprintf(\"starting test %s;\\n\", test[i].name);\n+\t\trc = test[i].ftst();\n+\t\tprintf(\"test %s completed with status %d\\n\", test[i].name, rc);\n+\t\tret |= rc;\n+\t}\n+\n+\treturn ret;\n+}\n+\n REGISTER_TEST_COMMAND(rwlock_autotest, test_rwlock);\n", "prefixes": [ "v2", "2/2" ] }