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GET /api/patches/49067/?format=api
{ "id": 49067, "url": "http://patches.dpdk.org/api/patches/49067/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1545122800-57293-26-git-send-email-wenzhuo.lu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1545122800-57293-26-git-send-email-wenzhuo.lu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1545122800-57293-26-git-send-email-wenzhuo.lu@intel.com", "date": "2018-12-18T08:46:34", "name": "[v6,25/31] net/ice: support RSS", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "e1edef232d221f3131e9e27ca0feaba032929149", "submitter": { "id": 258, "url": "http://patches.dpdk.org/api/people/258/?format=api", "name": "Wenzhuo Lu", "email": "wenzhuo.lu@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1545122800-57293-26-git-send-email-wenzhuo.lu@intel.com/mbox/", "series": [ { "id": 2842, "url": "http://patches.dpdk.org/api/series/2842/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=2842", "date": "2018-12-18T08:46:09", "name": "A new net PMD - ICE", "version": 6, "mbox": "http://patches.dpdk.org/series/2842/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/49067/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/49067/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 8D3971BCE7;\n\tTue, 18 Dec 2018 09:42:52 +0100 (CET)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby dpdk.org (Postfix) with ESMTP id 65C441BC9A\n\tfor <dev@dpdk.org>; Tue, 18 Dec 2018 09:42:26 +0100 (CET)", "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t18 Dec 2018 00:42:25 -0800", "from dpdk26.sh.intel.com ([10.67.110.164])\n\tby orsmga003.jf.intel.com with ESMTP; 18 Dec 2018 00:42:24 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.56,367,1539673200\"; d=\"scan'208\";a=\"111449600\"", "From": "Wenzhuo Lu <wenzhuo.lu@intel.com>", "To": "dev@dpdk.org", "Cc": "Wenzhuo Lu <wenzhuo.lu@intel.com>, Qiming Yang <qiming.yang@intel.com>, \n\tXiaoyun Li <xiaoyun.li@intel.com>, Jingjing Wu <jingjing.wu@intel.com>", "Date": "Tue, 18 Dec 2018 16:46:34 +0800", "Message-Id": "<1545122800-57293-26-git-send-email-wenzhuo.lu@intel.com>", "X-Mailer": "git-send-email 1.9.3", "In-Reply-To": "<1545122800-57293-1-git-send-email-wenzhuo.lu@intel.com>", "References": "<1542956179-80951-1-git-send-email-wenzhuo.lu@intel.com>\n\t<1545122800-57293-1-git-send-email-wenzhuo.lu@intel.com>", "Subject": "[dpdk-dev] [PATCH v6 25/31] net/ice: support RSS", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add below ops,\nreta_update\nreta_query\nrss_hash_update\nrss_hash_conf_get\n\nSigned-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>\nSigned-off-by: Qiming Yang <qiming.yang@intel.com>\nSigned-off-by: Xiaoyun Li <xiaoyun.li@intel.com>\nSigned-off-by: Jingjing Wu <jingjing.wu@intel.com>\n---\n doc/guides/nics/features/ice.ini | 3 +\n drivers/net/ice/ice_ethdev.c | 243 +++++++++++++++++++++++++++++++++++++++\n drivers/net/ice/ice_ethdev.h | 13 +++\n drivers/net/ice/ice_rxtx.c | 20 ++++\n 4 files changed, 279 insertions(+)", "diff": "diff --git a/doc/guides/nics/features/ice.ini b/doc/guides/nics/features/ice.ini\nindex b76cae3..b492ccd 100644\n--- a/doc/guides/nics/features/ice.ini\n+++ b/doc/guides/nics/features/ice.ini\n@@ -13,6 +13,9 @@ Jumbo frame = Y\n TSO = Y\n Unicast MAC filter = Y\n Multicast MAC filter = Y\n+RSS hash = Y\n+RSS key update = Y\n+RSS reta update = Y\n VLAN filter = Y\n CRC offload = Y\n VLAN offload = Y\ndiff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex 67ab06c..a5e8da6 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -28,6 +28,16 @@ static int ice_link_update(struct rte_eth_dev *dev,\n static int ice_vlan_tpid_set(struct rte_eth_dev *dev,\n \t\t\t enum rte_vlan_type vlan_type,\n \t\t\t uint16_t tpid);\n+static int ice_rss_reta_update(struct rte_eth_dev *dev,\n+\t\t\t struct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t\t uint16_t reta_size);\n+static int ice_rss_reta_query(struct rte_eth_dev *dev,\n+\t\t\t struct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t\t uint16_t reta_size);\n+static int ice_rss_hash_update(struct rte_eth_dev *dev,\n+\t\t\t struct rte_eth_rss_conf *rss_conf);\n+static int ice_rss_hash_conf_get(struct rte_eth_dev *dev,\n+\t\t\t\t struct rte_eth_rss_conf *rss_conf);\n static int ice_vlan_filter_set(struct rte_eth_dev *dev,\n \t\t\t uint16_t vlan_id,\n \t\t\t int on);\n@@ -72,6 +82,10 @@ static int ice_vlan_pvid_set(struct rte_eth_dev *dev,\n \t.vlan_filter_set = ice_vlan_filter_set,\n \t.vlan_offload_set = ice_vlan_offload_set,\n \t.vlan_tpid_set = ice_vlan_tpid_set,\n+\t.reta_update = ice_rss_reta_update,\n+\t.reta_query = ice_rss_reta_query,\n+\t.rss_hash_update = ice_rss_hash_update,\n+\t.rss_hash_conf_get = ice_rss_hash_conf_get,\n \t.vlan_pvid_set = ice_vlan_pvid_set,\n \t.rxq_info_get = ice_rxq_info_get,\n \t.txq_info_get = ice_txq_info_get,\n@@ -1526,6 +1540,7 @@ static int ice_init_rss(struct ice_pf *pf)\n \n \tdev_info->reta_size = hw->func_caps.common_cap.rss_table_size;\n \tdev_info->hash_key_size = (VSIQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);\n+\tdev_info->flow_type_rss_offloads = ICE_RSS_OFFLOAD_ALL;\n \n \tdev_info->default_rxconf = (struct rte_eth_rxconf) {\n \t\t.rx_thresh = {\n@@ -2010,6 +2025,234 @@ static int ice_macaddr_set(struct rte_eth_dev *dev,\n }\n \n static int\n+ice_get_rss_lut(struct ice_vsi *vsi, uint8_t *lut, uint16_t lut_size)\n+{\n+\tstruct ice_pf *pf = ICE_VSI_TO_PF(vsi);\n+\tstruct ice_hw *hw = ICE_VSI_TO_HW(vsi);\n+\tint ret;\n+\n+\tif (!lut)\n+\t\treturn -EINVAL;\n+\n+\tif (pf->flags & ICE_FLAG_RSS_AQ_CAPABLE) {\n+\t\tret = ice_aq_get_rss_lut(hw, vsi->idx, TRUE,\n+\t\t\t\t\t lut, lut_size);\n+\t\tif (ret) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Failed to get RSS lookup table\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t} else {\n+\t\tuint64_t *lut_dw = (uint64_t *)lut;\n+\t\tuint16_t i, lut_size_dw = lut_size / 4;\n+\n+\t\tfor (i = 0; i < lut_size_dw; i++)\n+\t\t\tlut_dw[i] = ICE_READ_REG(hw, PFQF_HLUT(i));\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+ice_set_rss_lut(struct ice_vsi *vsi, uint8_t *lut, uint16_t lut_size)\n+{\n+\tstruct ice_pf *pf = ICE_VSI_TO_PF(vsi);\n+\tstruct ice_hw *hw = ICE_VSI_TO_HW(vsi);\n+\tint ret;\n+\n+\tif (!vsi || !lut)\n+\t\treturn -EINVAL;\n+\n+\tif (pf->flags & ICE_FLAG_RSS_AQ_CAPABLE) {\n+\t\tret = ice_aq_set_rss_lut(hw, vsi->idx, TRUE,\n+\t\t\t\t\t lut, lut_size);\n+\t\tif (ret) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Failed to set RSS lookup table\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t} else {\n+\t\tuint64_t *lut_dw = (uint64_t *)lut;\n+\t\tuint16_t i, lut_size_dw = lut_size / 4;\n+\n+\t\tfor (i = 0; i < lut_size_dw; i++)\n+\t\t\tICE_WRITE_REG(hw, PFQF_HLUT(i), lut_dw[i]);\n+\n+\t\tice_flush(hw);\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+ice_rss_reta_update(struct rte_eth_dev *dev,\n+\t\t struct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t uint16_t reta_size)\n+{\n+\tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n+\tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tuint16_t i, lut_size = hw->func_caps.common_cap.rss_table_size;\n+\tuint16_t idx, shift;\n+\tuint8_t *lut;\n+\tint ret;\n+\n+\tif (reta_size != lut_size ||\n+\t reta_size > ETH_RSS_RETA_SIZE_512) {\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t \"The size of hash lookup table configured (%d)\"\n+\t\t\t \"doesn't match the number hardware can \"\n+\t\t\t \"supported (%d)\",\n+\t\t\t reta_size, lut_size);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tlut = rte_zmalloc(NULL, reta_size, 0);\n+\tif (!lut) {\n+\t\tPMD_DRV_LOG(ERR, \"No memory can be allocated\");\n+\t\treturn -ENOMEM;\n+\t}\n+\tret = ice_get_rss_lut(pf->main_vsi, lut, reta_size);\n+\tif (ret)\n+\t\tgoto out;\n+\n+\tfor (i = 0; i < reta_size; i++) {\n+\t\tidx = i / RTE_RETA_GROUP_SIZE;\n+\t\tshift = i % RTE_RETA_GROUP_SIZE;\n+\t\tif (reta_conf[idx].mask & (1ULL << shift))\n+\t\t\tlut[i] = reta_conf[idx].reta[shift];\n+\t}\n+\tret = ice_set_rss_lut(pf->main_vsi, lut, reta_size);\n+\n+out:\n+\trte_free(lut);\n+\n+\treturn ret;\n+}\n+\n+static int\n+ice_rss_reta_query(struct rte_eth_dev *dev,\n+\t\t struct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t uint16_t reta_size)\n+{\n+\tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n+\tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tuint16_t i, lut_size = hw->func_caps.common_cap.rss_table_size;\n+\tuint16_t idx, shift;\n+\tuint8_t *lut;\n+\tint ret;\n+\n+\tif (reta_size != lut_size ||\n+\t reta_size > ETH_RSS_RETA_SIZE_512) {\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t \"The size of hash lookup table configured (%d)\"\n+\t\t\t \"doesn't match the number hardware can \"\n+\t\t\t \"supported (%d)\",\n+\t\t\t reta_size, lut_size);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tlut = rte_zmalloc(NULL, reta_size, 0);\n+\tif (!lut) {\n+\t\tPMD_DRV_LOG(ERR, \"No memory can be allocated\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tret = ice_get_rss_lut(pf->main_vsi, lut, reta_size);\n+\tif (ret)\n+\t\tgoto out;\n+\n+\tfor (i = 0; i < reta_size; i++) {\n+\t\tidx = i / RTE_RETA_GROUP_SIZE;\n+\t\tshift = i % RTE_RETA_GROUP_SIZE;\n+\t\tif (reta_conf[idx].mask & (1ULL << shift))\n+\t\t\treta_conf[idx].reta[shift] = lut[i];\n+\t}\n+\n+out:\n+\trte_free(lut);\n+\n+\treturn ret;\n+}\n+\n+static int\n+ice_set_rss_key(struct ice_vsi *vsi, uint8_t *key, uint8_t key_len)\n+{\n+\tstruct ice_hw *hw = ICE_VSI_TO_HW(vsi);\n+\tint ret = 0;\n+\n+\tif (!key || key_len == 0) {\n+\t\tPMD_DRV_LOG(DEBUG, \"No key to be configured\");\n+\t\treturn 0;\n+\t} else if (key_len != (VSIQF_HKEY_MAX_INDEX + 1) *\n+\t\t sizeof(uint32_t)) {\n+\t\tPMD_DRV_LOG(ERR, \"Invalid key length %u\", key_len);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tstruct ice_aqc_get_set_rss_keys *key_dw =\n+\t\t(struct ice_aqc_get_set_rss_keys *)key;\n+\n+\tret = ice_aq_set_rss_key(hw, vsi->idx, key_dw);\n+\tif (ret) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to configure RSS key via AQ\");\n+\t\tret = -EINVAL;\n+\t}\n+\n+\treturn ret;\n+}\n+\n+static int\n+ice_get_rss_key(struct ice_vsi *vsi, uint8_t *key, uint8_t *key_len)\n+{\n+\tstruct ice_hw *hw = ICE_VSI_TO_HW(vsi);\n+\tint ret;\n+\n+\tif (!key || !key_len)\n+\t\treturn -EINVAL;\n+\n+\tret = ice_aq_get_rss_key\n+\t\t(hw, vsi->idx,\n+\t\t (struct ice_aqc_get_set_rss_keys *)key);\n+\tif (ret) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to get RSS key via AQ\");\n+\t\treturn -EINVAL;\n+\t}\n+\t*key_len = (VSIQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);\n+\n+\treturn 0;\n+}\n+\n+static int\n+ice_rss_hash_update(struct rte_eth_dev *dev,\n+\t\t struct rte_eth_rss_conf *rss_conf)\n+{\n+\tenum ice_status status = ICE_SUCCESS;\n+\tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n+\tstruct ice_vsi *vsi = pf->main_vsi;\n+\n+\t/* set hash key */\n+\tstatus = ice_set_rss_key(vsi, rss_conf->rss_key, rss_conf->rss_key_len);\n+\tif (status)\n+\t\treturn status;\n+\n+\t/* TODO: hash enable config, ice_add_rss_cfg */\n+\treturn 0;\n+}\n+\n+static int\n+ice_rss_hash_conf_get(struct rte_eth_dev *dev,\n+\t\t struct rte_eth_rss_conf *rss_conf)\n+{\n+\tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n+\tstruct ice_vsi *vsi = pf->main_vsi;\n+\n+\tice_get_rss_key(vsi, rss_conf->rss_key,\n+\t\t\t&rss_conf->rss_key_len);\n+\n+\t/* TODO: default set to 0 as hf config is not supported now */\n+\trss_conf->rss_hf = 0;\n+\treturn 0;\n+}\n+\n+static int\n ice_vsi_vlan_pvid_set(struct ice_vsi *vsi, struct ice_vsi_vlan_pvid_info *info)\n {\n \tstruct ice_hw *hw;\ndiff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h\nindex 94e45c8..3cefa5b 100644\n--- a/drivers/net/ice/ice_ethdev.h\n+++ b/drivers/net/ice/ice_ethdev.h\n@@ -102,6 +102,19 @@\n \t\t ICE_FLAG_RSS_AQ_CAPABLE | \\\n \t\t ICE_FLAG_VF_MAC_BY_PF)\n \n+#define ICE_RSS_OFFLOAD_ALL ( \\\n+\tETH_RSS_FRAG_IPV4 | \\\n+\tETH_RSS_NONFRAG_IPV4_TCP | \\\n+\tETH_RSS_NONFRAG_IPV4_UDP | \\\n+\tETH_RSS_NONFRAG_IPV4_SCTP | \\\n+\tETH_RSS_NONFRAG_IPV4_OTHER | \\\n+\tETH_RSS_FRAG_IPV6 | \\\n+\tETH_RSS_NONFRAG_IPV6_TCP | \\\n+\tETH_RSS_NONFRAG_IPV6_UDP | \\\n+\tETH_RSS_NONFRAG_IPV6_SCTP | \\\n+\tETH_RSS_NONFRAG_IPV6_OTHER | \\\n+\tETH_RSS_L2_PAYLOAD)\n+\n struct ice_adapter;\n \n /**\ndiff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c\nindex 67bbd08..f88e733 100644\n--- a/drivers/net/ice/ice_rxtx.c\n+++ b/drivers/net/ice/ice_rxtx.c\n@@ -946,6 +946,20 @@\n \treturn desc;\n }\n \n+/* Translate the rx descriptor status to pkt flags */\n+static inline uint64_t\n+ice_rxd_status_to_pkt_flags(uint64_t qword)\n+{\n+\tuint64_t flags;\n+\n+\t/* Check if RSS_HASH */\n+\tflags = (((qword >> ICE_RX_DESC_STATUS_FLTSTAT_S) &\n+\t\t ICE_RX_DESC_FLTSTAT_RSS_HASH) ==\n+\t\t ICE_RX_DESC_FLTSTAT_RSS_HASH) ? PKT_RX_RSS_HASH : 0;\n+\n+\treturn flags;\n+}\n+\n /* Rx L3/L4 checksum */\n static inline uint64_t\n ice_rxd_error_to_pkt_flags(uint64_t qword)\n@@ -1094,6 +1108,7 @@\n \tstruct ice_rx_queue *rxq = rx_queue;\n \tvolatile union ice_rx_desc *rx_ring = rxq->rx_ring;\n \tvolatile union ice_rx_desc *rxdp;\n+\tunion ice_rx_desc rxd;\n \tstruct ice_rx_entry *sw_ring = rxq->sw_ring;\n \tstruct ice_rx_entry *rxe;\n \tstruct rte_mbuf *nmb; /* new allocated mbuf */\n@@ -1126,6 +1141,7 @@\n \t\t\tdev->data->rx_mbuf_alloc_failed++;\n \t\t\tbreak;\n \t\t}\n+\t\trxd = *rxdp; /* copy descriptor in ring to temp variable*/\n \n \t\tnb_hold++;\n \t\trxe = &sw_ring[rx_id]; /* get corresponding mbuf in SW ring */\n@@ -1160,7 +1176,11 @@\n \t\trxm->packet_type = ptype_tbl[(uint8_t)((qword1 &\n \t\t\t\t\t\t\tICE_RXD_QW1_PTYPE_M) >>\n \t\t\t\t\t\t ICE_RXD_QW1_PTYPE_S)];\n+\t\tpkt_flags = ice_rxd_status_to_pkt_flags(qword1);\n \t\tpkt_flags |= ice_rxd_error_to_pkt_flags(qword1);\n+\t\tif (pkt_flags & PKT_RX_RSS_HASH)\n+\t\t\trxm->hash.rss =\n+\t\t\t\trte_le_to_cpu_32(rxd.wb.qword0.hi_dword.rss);\n \t\trxm->ol_flags |= pkt_flags;\n \t\t/* copy old mbuf to rx_pkts */\n \t\trx_pkts[nb_rx++] = rxm;\n", "prefixes": [ "v6", "25/31" ] }