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GET /api/patches/48880/?format=api
{ "id": 48880, "url": "http://patches.dpdk.org/api/patches/48880/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20181214133137.23516-2-david.hunt@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20181214133137.23516-2-david.hunt@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20181214133137.23516-2-david.hunt@intel.com", "date": "2018-12-14T13:31:34", "name": "[v3,1/4] examples/power: change 64-bit masks to arrays", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "7b2e10a227a99bd8381953217f048076e082918c", "submitter": { "id": 342, "url": "http://patches.dpdk.org/api/people/342/?format=api", "name": "Hunt, David", "email": "david.hunt@intel.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20181214133137.23516-2-david.hunt@intel.com/mbox/", "series": [ { "id": 2784, "url": "http://patches.dpdk.org/api/series/2784/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=2784", "date": "2018-12-14T13:31:33", "name": "examples/power: allow use of more than 64 cores", "version": 3, "mbox": "http://patches.dpdk.org/series/2784/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/48880/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/48880/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E689A1BBE2;\n\tFri, 14 Dec 2018 14:31:44 +0100 (CET)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n\tby dpdk.org (Postfix) with ESMTP id 02DE61BB09\n\tfor <dev@dpdk.org>; Fri, 14 Dec 2018 14:31:41 +0100 (CET)", "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t14 Dec 2018 05:31:41 -0800", "from silpixa00399952.ir.intel.com (HELO\n\tsilpixa00399952.ger.corp.intel.com) ([10.237.223.64])\n\tby orsmga003.jf.intel.com with ESMTP; 14 Dec 2018 05:31:40 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.56,353,1539673200\"; d=\"scan'208\";a=\"110383978\"", "From": "David Hunt <david.hunt@intel.com>", "To": "dev@dpdk.org", "Cc": "lei.a.yao@intel.com, anatoly.burakov@intel.com,\n\tDavid Hunt <david.hunt@intel.com>", "Date": "Fri, 14 Dec 2018 13:31:34 +0000", "Message-Id": "<20181214133137.23516-2-david.hunt@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20181214133137.23516-1-david.hunt@intel.com>", "References": "<20181214114946.21570-1-david.hunt@intel.com>\n\t<20181214133137.23516-1-david.hunt@intel.com>", "Subject": "[dpdk-dev] [PATCH v3 1/4] examples/power: change 64-bit masks to\n\tarrays", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "vm_power_manager currently makes use of uint64_t masks to keep track of\ncores in use, limiting use of the app to only being able to manage the\nfirst 64 cores in a multi-core system. Many modern systems have core\ncounts greater than 64, so this limitation needs to be removed.\n\nThis patch converts the relevant 64-bit masks to character arrays.\n\nSigned-off-by: David Hunt <david.hunt@intel.com>\n---\n examples/vm_power_manager/channel_manager.c | 89 ++++++++++++---------\n examples/vm_power_manager/channel_manager.h | 2 +-\n examples/vm_power_manager/vm_power_cli.c | 6 +-\n 3 files changed, 55 insertions(+), 42 deletions(-)", "diff": "diff --git a/examples/vm_power_manager/channel_manager.c b/examples/vm_power_manager/channel_manager.c\nindex 4fac099df..71f4a0ccf 100644\n--- a/examples/vm_power_manager/channel_manager.c\n+++ b/examples/vm_power_manager/channel_manager.c\n@@ -29,14 +29,11 @@\n #include \"channel_manager.h\"\n #include \"channel_commands.h\"\n #include \"channel_monitor.h\"\n+#include \"power_manager.h\"\n \n \n #define RTE_LOGTYPE_CHANNEL_MANAGER RTE_LOGTYPE_USER1\n \n-#define ITERATIVE_BITMASK_CHECK_64(mask_u64b, i) \\\n-\t\tfor (i = 0; mask_u64b; mask_u64b &= ~(1ULL << i++)) \\\n-\t\tif ((mask_u64b >> i) & 1) \\\n-\n /* Global pointer to libvirt connection */\n static virConnectPtr global_vir_conn_ptr;\n \n@@ -54,7 +51,7 @@ struct virtual_machine_info {\n \tchar name[CHANNEL_MGR_MAX_NAME_LEN];\n \trte_atomic64_t pcpu_mask[CHANNEL_CMDS_MAX_CPUS];\n \tstruct channel_info *channels[CHANNEL_CMDS_MAX_VM_CHANNELS];\n-\tuint64_t channel_mask;\n+\tchar channel_mask[POWER_MGR_MAX_CPUS];\n \tuint8_t num_channels;\n \tenum vm_status status;\n \tvirDomainPtr domainPtr;\n@@ -135,12 +132,14 @@ update_pcpus_mask(struct virtual_machine_info *vm_info)\n }\n \n int\n-set_pcpus_mask(char *vm_name, unsigned vcpu, uint64_t core_mask)\n+set_pcpus_mask(char *vm_name, unsigned int vcpu, char *core_mask)\n {\n \tunsigned i = 0;\n \tint flags = VIR_DOMAIN_AFFECT_LIVE|VIR_DOMAIN_AFFECT_CONFIG;\n \tstruct virtual_machine_info *vm_info;\n-\tuint64_t mask = core_mask;\n+\tchar mask[POWER_MGR_MAX_CPUS];\n+\n+\tmemcpy(mask, core_mask, POWER_MGR_MAX_CPUS);\n \n \tif (vcpu >= CHANNEL_CMDS_MAX_CPUS) {\n \t\tRTE_LOG(ERR, CHANNEL_MANAGER, \"vCPU(%u) exceeds max allowable(%d)\\n\",\n@@ -156,8 +155,8 @@ set_pcpus_mask(char *vm_name, unsigned vcpu, uint64_t core_mask)\n \n \tif (!virDomainIsActive(vm_info->domainPtr)) {\n \t\tRTE_LOG(ERR, CHANNEL_MANAGER, \"Unable to set vCPU(%u) to pCPU \"\n-\t\t\t\t\"mask(0x%\"PRIx64\") for VM '%s', VM is not active\\n\",\n-\t\t\t\tvcpu, core_mask, vm_info->name);\n+\t\t\t\t\" for VM '%s', VM is not active\\n\",\n+\t\t\t\tvcpu, vm_info->name);\n \t\treturn -1;\n \t}\n \n@@ -167,22 +166,27 @@ set_pcpus_mask(char *vm_name, unsigned vcpu, uint64_t core_mask)\n \t\treturn -1;\n \t}\n \tmemset(global_cpumaps, 0 , CHANNEL_CMDS_MAX_CPUS * global_maplen);\n-\tITERATIVE_BITMASK_CHECK_64(mask, i) {\n+\tfor (i = 0; i < POWER_MGR_MAX_CPUS; i++) {\n+\t\tif (mask[i] != 1)\n+\t\t\tcontinue;\n \t\tVIR_USE_CPU(global_cpumaps, i);\n \t\tif (i >= global_n_host_cpus) {\n \t\t\tRTE_LOG(ERR, CHANNEL_MANAGER, \"CPU(%u) exceeds the available \"\n-\t\t\t\t\t\"number of CPUs(%u)\\n\", i, global_n_host_cpus);\n+\t\t\t\t\t\"number of CPUs(%u)\\n\",\n+\t\t\t\t\ti, global_n_host_cpus);\n \t\t\treturn -1;\n \t\t}\n \t}\n \tif (virDomainPinVcpuFlags(vm_info->domainPtr, vcpu, global_cpumaps,\n \t\t\tglobal_maplen, flags) < 0) {\n \t\tRTE_LOG(ERR, CHANNEL_MANAGER, \"Unable to set vCPU(%u) to pCPU \"\n-\t\t\t\t\"mask(0x%\"PRIx64\") for VM '%s'\\n\", vcpu, core_mask,\n+\t\t\t\t\" for VM '%s'\\n\", vcpu,\n \t\t\t\tvm_info->name);\n \t\treturn -1;\n \t}\n-\trte_atomic64_set(&vm_info->pcpu_mask[vcpu], core_mask);\n+\trte_spinlock_lock(&(vm_info->config_spinlock));\n+\tmemcpy(&vm_info->pcpu_mask[vcpu], mask, POWER_MGR_MAX_CPUS);\n+\trte_spinlock_unlock(&(vm_info->config_spinlock));\n \treturn 0;\n \n }\n@@ -190,7 +194,11 @@ set_pcpus_mask(char *vm_name, unsigned vcpu, uint64_t core_mask)\n int\n set_pcpu(char *vm_name, unsigned vcpu, unsigned core_num)\n {\n-\tuint64_t mask = 1ULL << core_num;\n+\tchar mask[POWER_MGR_MAX_CPUS];\n+\n+\tmemset(mask, 0, POWER_MGR_MAX_CPUS);\n+\n+\tmask[core_num] = 1;\n \n \treturn set_pcpus_mask(vm_name, vcpu, mask);\n }\n@@ -211,7 +219,7 @@ static inline int\n channel_exists(struct virtual_machine_info *vm_info, unsigned channel_num)\n {\n \trte_spinlock_lock(&(vm_info->config_spinlock));\n-\tif (vm_info->channel_mask & (1ULL << channel_num)) {\n+\tif (vm_info->channel_mask[channel_num] == 1) {\n \t\trte_spinlock_unlock(&(vm_info->config_spinlock));\n \t\treturn 1;\n \t}\n@@ -343,7 +351,7 @@ setup_channel_info(struct virtual_machine_info **vm_info_dptr,\n \t}\n \trte_spinlock_lock(&(vm_info->config_spinlock));\n \tvm_info->num_channels++;\n-\tvm_info->channel_mask |= 1ULL << channel_num;\n+\tvm_info->channel_mask[channel_num] = 1;\n \tvm_info->channels[channel_num] = chan_info;\n \tchan_info->status = CHANNEL_MGR_CHANNEL_CONNECTED;\n \trte_spinlock_unlock(&(vm_info->config_spinlock));\n@@ -590,7 +598,7 @@ remove_channel(struct channel_info **chan_info_dptr)\n \tvm_info = (struct virtual_machine_info *)chan_info->priv_info;\n \n \trte_spinlock_lock(&(vm_info->config_spinlock));\n-\tvm_info->channel_mask &= ~(1ULL << chan_info->channel_num);\n+\tvm_info->channel_mask[chan_info->channel_num] = 0;\n \tvm_info->num_channels--;\n \trte_spinlock_unlock(&(vm_info->config_spinlock));\n \n@@ -603,7 +611,7 @@ set_channel_status_all(const char *vm_name, enum channel_status status)\n {\n \tstruct virtual_machine_info *vm_info;\n \tunsigned i;\n-\tuint64_t mask;\n+\tchar mask[POWER_MGR_MAX_CPUS];\n \tint num_channels_changed = 0;\n \n \tif (!(status == CHANNEL_MGR_CHANNEL_CONNECTED ||\n@@ -619,8 +627,10 @@ set_channel_status_all(const char *vm_name, enum channel_status status)\n \t}\n \n \trte_spinlock_lock(&(vm_info->config_spinlock));\n-\tmask = vm_info->channel_mask;\n-\tITERATIVE_BITMASK_CHECK_64(mask, i) {\n+\tmemcpy(mask, (char *)vm_info->channel_mask, POWER_MGR_MAX_CPUS);\n+\tfor (i = 0; i < POWER_MGR_MAX_CPUS; i++) {\n+\t\tif (mask[i] != 1)\n+\t\t\tcontinue;\n \t\tvm_info->channels[i]->status = status;\n \t\tnum_channels_changed++;\n \t}\n@@ -665,8 +675,7 @@ get_all_vm(int *num_vm, int *num_vcpu)\n \n \tvirNodeInfo node_info;\n \tvirDomainPtr *domptr;\n-\tuint64_t mask;\n-\tint i, ii, numVcpus[MAX_VCPUS], cpu, n_vcpus;\n+\tint i, ii, numVcpus[MAX_VCPUS], n_vcpus;\n \tunsigned int jj;\n \tconst char *vm_name;\n \tunsigned int domain_flags = VIR_CONNECT_LIST_DOMAINS_RUNNING |\n@@ -714,16 +723,12 @@ get_all_vm(int *num_vm, int *num_vcpu)\n \n \t\t/* Save pcpu in use by libvirt VMs */\n \t\tfor (ii = 0; ii < n_vcpus; ii++) {\n-\t\t\tmask = 0;\n \t\t\tfor (jj = 0; jj < global_n_host_cpus; jj++) {\n \t\t\t\tif (VIR_CPU_USABLE(global_cpumaps,\n \t\t\t\t\t\tglobal_maplen, ii, jj) > 0) {\n-\t\t\t\t\tmask |= 1ULL << jj;\n+\t\t\t\t\tlvm_info[i].pcpus[ii] = jj;\n \t\t\t\t}\n \t\t\t}\n-\t\t\tITERATIVE_BITMASK_CHECK_64(mask, cpu) {\n-\t\t\t\tlvm_info[i].pcpus[ii] = cpu;\n-\t\t\t}\n \t\t}\n \t}\n }\n@@ -733,7 +738,7 @@ get_info_vm(const char *vm_name, struct vm_info *info)\n {\n \tstruct virtual_machine_info *vm_info;\n \tunsigned i, channel_num = 0;\n-\tuint64_t mask;\n+\tchar mask[POWER_MGR_MAX_CPUS];\n \n \tvm_info = find_domain_by_name(vm_name);\n \tif (vm_info == NULL) {\n@@ -746,13 +751,18 @@ get_info_vm(const char *vm_name, struct vm_info *info)\n \n \trte_spinlock_lock(&(vm_info->config_spinlock));\n \n-\tmask = vm_info->channel_mask;\n-\tITERATIVE_BITMASK_CHECK_64(mask, i) {\n+\tmemcpy(mask, (char *)vm_info->channel_mask, POWER_MGR_MAX_CPUS);\n+\tfor (i = 0; i < POWER_MGR_MAX_CPUS; i++) {\n+\t\tif (mask[i] != 1)\n+\t\t\tcontinue;\n \t\tinfo->channels[channel_num].channel_num = i;\n \t\tmemcpy(info->channels[channel_num].channel_path,\n-\t\t\t\tvm_info->channels[i]->channel_path, UNIX_PATH_MAX);\n-\t\tinfo->channels[channel_num].status = vm_info->channels[i]->status;\n-\t\tinfo->channels[channel_num].fd = vm_info->channels[i]->fd;\n+\t\t\t\tvm_info->channels[i]->channel_path,\n+\t\t\t\tUNIX_PATH_MAX);\n+\t\tinfo->channels[channel_num].status =\n+\t\t\t\tvm_info->channels[i]->status;\n+\t\tinfo->channels[channel_num].fd =\n+\t\t\t\tvm_info->channels[i]->fd;\n \t\tchannel_num++;\n \t}\n \n@@ -822,7 +832,7 @@ add_vm(const char *vm_name)\n \t}\n \tstrncpy(new_domain->name, vm_name, sizeof(new_domain->name));\n \tnew_domain->name[sizeof(new_domain->name) - 1] = '\\0';\n-\tnew_domain->channel_mask = 0;\n+\tmemset(new_domain->channel_mask, 0, POWER_MGR_MAX_CPUS);\n \tnew_domain->num_channels = 0;\n \n \tif (!virDomainIsActive(dom_ptr))\n@@ -940,16 +950,19 @@ void\n channel_manager_exit(void)\n {\n \tunsigned i;\n-\tuint64_t mask;\n+\tchar mask[POWER_MGR_MAX_CPUS];\n \tstruct virtual_machine_info *vm_info;\n \n \tLIST_FOREACH(vm_info, &vm_list_head, vms_info) {\n \n \t\trte_spinlock_lock(&(vm_info->config_spinlock));\n \n-\t\tmask = vm_info->channel_mask;\n-\t\tITERATIVE_BITMASK_CHECK_64(mask, i) {\n-\t\t\tremove_channel_from_monitor(vm_info->channels[i]);\n+\t\tmemcpy(mask, (char *)vm_info->channel_mask, POWER_MGR_MAX_CPUS);\n+\t\tfor (i = 0; i < POWER_MGR_MAX_CPUS; i++) {\n+\t\t\tif (mask[i] != 1)\n+\t\t\t\tcontinue;\n+\t\t\tremove_channel_from_monitor(\n+\t\t\t\t\tvm_info->channels[i]);\n \t\t\tclose(vm_info->channels[i]->fd);\n \t\t\trte_free(vm_info->channels[i]);\n \t\t}\ndiff --git a/examples/vm_power_manager/channel_manager.h b/examples/vm_power_manager/channel_manager.h\nindex d948b304c..c2520ab6f 100644\n--- a/examples/vm_power_manager/channel_manager.h\n+++ b/examples/vm_power_manager/channel_manager.h\n@@ -149,7 +149,7 @@ uint64_t get_pcpus_mask(struct channel_info *chan_info, unsigned vcpu);\n * - 0 on success.\n * - Negative on error.\n */\n-int set_pcpus_mask(char *vm_name, unsigned vcpu, uint64_t core_mask);\n+int set_pcpus_mask(char *vm_name, unsigned int vcpu, char *core_mask);\n \n /**\n * Set the Physical CPU for the specified vCPU.\ndiff --git a/examples/vm_power_manager/vm_power_cli.c b/examples/vm_power_manager/vm_power_cli.c\nindex d588d38aa..101e67c9c 100644\n--- a/examples/vm_power_manager/vm_power_cli.c\n+++ b/examples/vm_power_manager/vm_power_cli.c\n@@ -128,7 +128,7 @@ struct cmd_set_pcpu_mask_result {\n \tcmdline_fixed_string_t set_pcpu_mask;\n \tcmdline_fixed_string_t vm_name;\n \tuint8_t vcpu;\n-\tuint64_t core_mask;\n+\tchar core_mask[POWER_MGR_MAX_CPUS];\n };\n \n static void\n@@ -139,10 +139,10 @@ cmd_set_pcpu_mask_parsed(void *parsed_result, struct cmdline *cl,\n \n \tif (set_pcpus_mask(res->vm_name, res->vcpu, res->core_mask) == 0)\n \t\tcmdline_printf(cl, \"Pinned vCPU(%\"PRId8\") to pCPU core \"\n-\t\t\t\t\"mask(0x%\"PRIx64\")\\n\", res->vcpu, res->core_mask);\n+\t\t\t\t\"\\n\", res->vcpu);\n \telse\n \t\tcmdline_printf(cl, \"Unable to pin vCPU(%\"PRId8\") to pCPU core \"\n-\t\t\t\t\"mask(0x%\"PRIx64\")\\n\", res->vcpu, res->core_mask);\n+\t\t\t\t\"\\n\", res->vcpu);\n }\n \n cmdline_parse_token_string_t cmd_set_pcpu_mask =\n", "prefixes": [ "v3", "1/4" ] }