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GET /api/patches/46331/?format=api
{ "id": 46331, "url": "http://patches.dpdk.org/api/patches/46331/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1539076076-19786-11-git-send-email-anoob.joseph@caviumnetworks.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1539076076-19786-11-git-send-email-anoob.joseph@caviumnetworks.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1539076076-19786-11-git-send-email-anoob.joseph@caviumnetworks.com", "date": "2018-10-09T09:07:43", "name": "[v4,10/23] crypto/octeontx: add session management ops", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "852df7a7f2f2ff24914af28b19211e4d75115532", "submitter": { "id": 893, "url": "http://patches.dpdk.org/api/people/893/?format=api", "name": "Anoob Joseph", "email": "anoob.joseph@caviumnetworks.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1539076076-19786-11-git-send-email-anoob.joseph@caviumnetworks.com/mbox/", "series": [ { "id": 1770, "url": "http://patches.dpdk.org/api/series/1770/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=1770", "date": "2018-10-09T09:07:33", "name": "Adding Cavium's OCTEON TX crypto PMD", "version": 4, "mbox": "http://patches.dpdk.org/series/1770/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/46331/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/46331/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 2C3361B17F;\n\tTue, 9 Oct 2018 11:09:23 +0200 (CEST)", "from NAM05-CO1-obe.outbound.protection.outlook.com\n\t(mail-eopbgr720058.outbound.protection.outlook.com [40.107.72.58])\n\tby dpdk.org (Postfix) with ESMTP id A48731B111\n\tfor <dev@dpdk.org>; Tue, 9 Oct 2018 11:09:21 +0200 (CEST)", "from ajoseph83.caveonetworks.com.com (115.113.156.2) by\n\tBN7PR07MB4897.namprd07.prod.outlook.com (2603:10b6:406:ef::26) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n\t15.20.1207.28; Tue, 9 Oct 2018 09:09:16 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=pNsGo1vzUzWUvj9sehy8mYXagQMbpdMVIAK+8L3LzRE=;\n\tb=CHO/KVTPkF13kjFr3d0fytOLA7q7EorDYNoQ7S+aTFaqGKA52UUXlmIkU95OX1Rd5zqQpscD/xLp76vhYDrpKcK0J9h9V/ChoEOCRYyaKWXkFUDZ6lY8Ce4PS9/o2iVhcITD/t8J/JRI2tVGZUjZcgU+uPVBw3XLiqBcWBeBrXA=", "Authentication-Results": "spf=none (sender IP is )\n\tsmtp.mailfrom=Anoob.Joseph@cavium.com; ", "From": "Anoob Joseph <anoob.joseph@caviumnetworks.com>", "To": "Akhil Goyal <akhil.goyal@nxp.com>,\n\tPablo de Lara <pablo.de.lara.guarch@intel.com>,\n\tThomas Monjalon <thomas@monjalon.net>", "Cc": "Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>,\n\tJerin Jacob <jerin.jacob@caviumnetworks.com>,\n\tNarayana Prasad <narayanaprasad.athreya@caviumnetworks.com>,\n\tAnkur Dwivedi <ankur.dwivedi@caviumnetworks.com>,\n\tAnoob Joseph <anoob.joseph@caviumnetworks.com>,\n\tMurthy NSSR <nidadavolu.murthy@caviumnetworks.com>,\n\tRagothaman Jayaraman <rjayaraman@caviumnetworks.com>,\n\tSrisivasubramanian S <ssrinivasan@caviumnetworks.com>,\n\tTejasree Kondoj <kondoj.tejasree@caviumnetworks.com>, dev@dpdk.org", "Date": "Tue, 9 Oct 2018 14:37:43 +0530", "Message-Id": "<1539076076-19786-11-git-send-email-anoob.joseph@caviumnetworks.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1539076076-19786-1-git-send-email-anoob.joseph@caviumnetworks.com>", "References": "<1538744363-30340-1-git-send-email-anoob.joseph@caviumnetworks.com>\n\t<1539076076-19786-1-git-send-email-anoob.joseph@caviumnetworks.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[115.113.156.2]", "X-ClientProxiedBy": "PN1PR0101CA0004.INDPRD01.PROD.OUTLOOK.COM\n\t(2603:1096:c00:e::14) To BN7PR07MB4897.namprd07.prod.outlook.com\n\t(2603:10b6:406:ef::26)", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "edcb8c33-f4d8-4bbc-e7d3-08d62dc6e5af", "X-Microsoft-Antispam": "BCL:0; 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"RSyMuimX3OEngB/CmNoc1SnvdaNqz8kFRoqWYyWubM7F/1YeZ+qphQShhVfmgTJ6KpvqA5Cs0iI71CGpq6sFyc2SianUzSQLNRx1eIeFCsB2dX5gf4GgHNRDjI17yI/9iVY6u3/YgLHyMQ+1OYmFsHO39jwleibUlaPPnLTCwUsem6Xs3gqNsCyuiFd13k4qqIjmcxdx5RIU8iWcp7s1BEbWIR+mYr8AC/iyvT4d0wYdln60wgMxaS686LETEe0eN+fjWkWKYct5bx33tEbWtgintj/wp5uoKhtH0Y6BfQFTPb18jjMg3ZcmZV4tZ3cUxFbjlQL6hbmhRTGBCnY270gX17i9SkilGeyWwPbc5vQ=", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-OriginatorOrg": "caviumnetworks.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "09 Oct 2018 09:09:16.5284\n\t(UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "edcb8c33-f4d8-4bbc-e7d3-08d62dc6e5af", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "711e4ccf-2e9b-4bcf-a551-4094005b6194", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN7PR07MB4897", "Subject": "[dpdk-dev] [PATCH v4 10/23] crypto/octeontx: add session management\n\tops", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>\n\nAdding routines for session configure, session clear and get session\nsize ops.\n\nSigned-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>\nSigned-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>\nSigned-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>\nSigned-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>\nSigned-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>\nSigned-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>\nSigned-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>\n---\n drivers/common/cpt/cpt_mcode_defines.h | 119 ++++++++++++++++++++++++++++\n drivers/common/cpt/cpt_request_mgr.h | 32 ++++++++\n drivers/common/cpt/cpt_ucode.h | 47 +++++++++++\n drivers/crypto/octeontx/otx_cryptodev_ops.c | 84 +++++++++++++++++++-\n 4 files changed, 279 insertions(+), 3 deletions(-)\n create mode 100644 drivers/common/cpt/cpt_request_mgr.h\n create mode 100644 drivers/common/cpt/cpt_ucode.h", "diff": "diff --git a/drivers/common/cpt/cpt_mcode_defines.h b/drivers/common/cpt/cpt_mcode_defines.h\nindex 83a8a42..235320c 100644\n--- a/drivers/common/cpt/cpt_mcode_defines.h\n+++ b/drivers/common/cpt/cpt_mcode_defines.h\n@@ -5,6 +5,9 @@\n #ifndef _CPT_MCODE_DEFINES_H_\n #define _CPT_MCODE_DEFINES_H_\n \n+#include <rte_byteorder.h>\n+#include <rte_memory.h>\n+\n /*\n * This file defines macros and structures according to microcode spec\n *\n@@ -35,4 +38,120 @@ typedef struct sglist_comp {\n \tuint64_t ptr[4];\n } sg_comp_t;\n \n+struct cpt_sess_misc {\n+\t/** CPT opcode */\n+\tuint16_t cpt_op:4;\n+\t/** ZUC, SNOW3G & KASUMI flags */\n+\tuint16_t zsk_flag:4;\n+\t/** Flag for AES GCM */\n+\tuint16_t aes_gcm:1;\n+\t/** Flag for AES CTR */\n+\tuint16_t aes_ctr:1;\n+\t/** Flag for NULL cipher/auth */\n+\tuint16_t is_null:1;\n+\t/** Flag for GMAC */\n+\tuint16_t is_gmac:1;\n+\t/** AAD length */\n+\tuint16_t aad_length;\n+\t/** MAC len in bytes */\n+\tuint8_t mac_len;\n+\t/** IV length in bytes */\n+\tuint8_t iv_length;\n+\t/** Auth IV length in bytes */\n+\tuint8_t auth_iv_length;\n+\t/** Reserved field */\n+\tuint8_t rsvd1;\n+\t/** IV offset in bytes */\n+\tuint16_t iv_offset;\n+\t/** Auth IV offset in bytes */\n+\tuint16_t auth_iv_offset;\n+\t/** Salt */\n+\tuint32_t salt;\n+\t/** Context DMA address */\n+\tphys_addr_t ctx_dma_addr;\n+};\n+\n+typedef union {\n+\tuint64_t flags;\n+\tstruct {\n+#if RTE_BYTE_ORDER == RTE_BIG_ENDIAN\n+\t\tuint64_t enc_cipher : 4;\n+\t\tuint64_t reserved1 : 1;\n+\t\tuint64_t aes_key : 2;\n+\t\tuint64_t iv_source : 1;\n+\t\tuint64_t hash_type : 4;\n+\t\tuint64_t reserved2 : 3;\n+\t\tuint64_t auth_input_type : 1;\n+\t\tuint64_t mac_len : 8;\n+\t\tuint64_t reserved3 : 8;\n+\t\tuint64_t encr_offset : 16;\n+\t\tuint64_t iv_offset : 8;\n+\t\tuint64_t auth_offset : 8;\n+#else\n+\t\tuint64_t auth_offset : 8;\n+\t\tuint64_t iv_offset : 8;\n+\t\tuint64_t encr_offset : 16;\n+\t\tuint64_t reserved3 : 8;\n+\t\tuint64_t mac_len : 8;\n+\t\tuint64_t auth_input_type : 1;\n+\t\tuint64_t reserved2 : 3;\n+\t\tuint64_t hash_type : 4;\n+\t\tuint64_t iv_source : 1;\n+\t\tuint64_t aes_key : 2;\n+\t\tuint64_t reserved1 : 1;\n+\t\tuint64_t enc_cipher : 4;\n+#endif\n+\t} e;\n+} encr_ctrl_t;\n+\n+typedef struct {\n+\tencr_ctrl_t enc_ctrl;\n+\tuint8_t encr_key[32];\n+\tuint8_t encr_iv[16];\n+} mc_enc_context_t;\n+\n+typedef struct {\n+\tuint8_t ipad[64];\n+\tuint8_t opad[64];\n+} mc_fc_hmac_context_t;\n+\n+typedef struct {\n+\tmc_enc_context_t enc;\n+\tmc_fc_hmac_context_t hmac;\n+} mc_fc_context_t;\n+\n+typedef struct {\n+\tuint8_t encr_auth_iv[16];\n+\tuint8_t ci_key[16];\n+\tuint8_t zuc_const[32];\n+} mc_zuc_snow3g_ctx_t;\n+\n+typedef struct {\n+\tuint8_t reg_A[8];\n+\tuint8_t ci_key[16];\n+} mc_kasumi_ctx_t;\n+\n+struct cpt_ctx {\n+\t/* Below fields are accessed by sw */\n+\tuint64_t enc_cipher\t:8;\n+\tuint64_t hash_type\t:8;\n+\tuint64_t mac_len\t:8;\n+\tuint64_t auth_key_len\t:8;\n+\tuint64_t fc_type\t:4;\n+\tuint64_t hmac\t\t:1;\n+\tuint64_t zsk_flags\t:3;\n+\tuint64_t k_ecb\t\t:1;\n+\tuint64_t snow3g\t\t:1;\n+\tuint64_t rsvd\t\t:22;\n+\t/* Below fields are accessed by hardware */\n+\tunion {\n+\t\tmc_fc_context_t fctx;\n+\t\tmc_zuc_snow3g_ctx_t zs_ctx;\n+\t\tmc_kasumi_ctx_t k_ctx;\n+\t};\n+\tuint8_t auth_key[64];\n+};\n+\n+#define CPT_P_ENC_CTRL(fctx) fctx->enc.enc_ctrl.e\n+\n #endif /* _CPT_MCODE_DEFINES_H_ */\ndiff --git a/drivers/common/cpt/cpt_request_mgr.h b/drivers/common/cpt/cpt_request_mgr.h\nnew file mode 100644\nindex 0000000..fe184fe\n--- /dev/null\n+++ b/drivers/common/cpt/cpt_request_mgr.h\n@@ -0,0 +1,32 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Cavium, Inc\n+ */\n+\n+#ifndef _CPT_REQUEST_MGR_H_\n+#define _CPT_REQUEST_MGR_H_\n+\n+#include \"cpt_mcode_defines.h\"\n+\n+/*\n+ * This file defines the agreement between the common layer and the individual\n+ * crypto drivers for OCTEON TX series. Datapath in otx* directory include this\n+ * file and all these functions are static inlined for better performance.\n+ *\n+ */\n+\n+/*\n+ * Get the session size\n+ *\n+ * This function is used in the data path.\n+ *\n+ * @return\n+ * - session size\n+ */\n+static __rte_always_inline unsigned int\n+cpt_get_session_size(void)\n+{\n+\tunsigned int ctx_len = sizeof(struct cpt_ctx);\n+\treturn (sizeof(struct cpt_sess_misc) + RTE_ALIGN_CEIL(ctx_len, 8));\n+}\n+\n+#endif /* _CPT_REQUEST_MGR_H_ */\ndiff --git a/drivers/common/cpt/cpt_ucode.h b/drivers/common/cpt/cpt_ucode.h\nnew file mode 100644\nindex 0000000..e4f16fe\n--- /dev/null\n+++ b/drivers/common/cpt/cpt_ucode.h\n@@ -0,0 +1,47 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Cavium, Inc\n+ */\n+\n+#ifndef _CPT_UCODE_H_\n+#define _CPT_UCODE_H_\n+\n+#include \"cpt_mcode_defines.h\"\n+\n+/*\n+ * This file defines functions that are interfaces to microcode spec.\n+ *\n+ */\n+\n+static __rte_always_inline int\n+cpt_is_algo_supported(struct rte_crypto_sym_xform *xform)\n+{\n+\t/*\n+\t * Microcode only supports the following combination.\n+\t * Encryption followed by authentication\n+\t * Authentication followed by decryption\n+\t */\n+\tif (xform->next) {\n+\t\tif ((xform->type == RTE_CRYPTO_SYM_XFORM_AUTH) &&\n+\t\t (xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) &&\n+\t\t (xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)) {\n+\t\t\t/* Unsupported as of now by microcode */\n+\t\t\tCPT_LOG_DP_ERR(\"Unsupported combination\");\n+\t\t\treturn -1;\n+\t\t}\n+\t\tif ((xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER) &&\n+\t\t (xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) &&\n+\t\t (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_DECRYPT)) {\n+\t\t\t/* For GMAC auth there is no cipher operation */\n+\t\t\tif (xform->aead.algo != RTE_CRYPTO_AEAD_AES_GCM ||\n+\t\t\t xform->next->auth.algo !=\n+\t\t\t RTE_CRYPTO_AUTH_AES_GMAC) {\n+\t\t\t\t/* Unsupported as of now by microcode */\n+\t\t\t\tCPT_LOG_DP_ERR(\"Unsupported combination\");\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t}\n+\t}\n+\treturn 0;\n+}\n+\n+#endif /*_CPT_UCODE_H_ */\ndiff --git a/drivers/crypto/octeontx/otx_cryptodev_ops.c b/drivers/crypto/octeontx/otx_cryptodev_ops.c\nindex ed33334..653f372 100644\n--- a/drivers/crypto/octeontx/otx_cryptodev_ops.c\n+++ b/drivers/crypto/octeontx/otx_cryptodev_ops.c\n@@ -10,6 +10,8 @@\n \n #include \"cpt_pmd_logs.h\"\n #include \"cpt_pmd_ops_helper.h\"\n+#include \"cpt_ucode.h\"\n+#include \"cpt_request_mgr.h\"\n \n #include \"otx_cryptodev.h\"\n #include \"otx_cryptodev_capabilities.h\"\n@@ -246,6 +248,82 @@ otx_cpt_que_pair_release(struct rte_cryptodev *dev, uint16_t que_pair_id)\n \treturn 0;\n }\n \n+static unsigned int\n+otx_cpt_get_session_size(struct rte_cryptodev *dev __rte_unused)\n+{\n+\treturn cpt_get_session_size();\n+}\n+\n+static void\n+otx_cpt_session_init(void *sym_sess, uint8_t driver_id)\n+{\n+\tstruct rte_cryptodev_sym_session *sess = sym_sess;\n+\tstruct cpt_sess_misc *cpt_sess =\n+\t (struct cpt_sess_misc *) get_sym_session_private_data(sess, driver_id);\n+\n+\tCPT_PMD_INIT_FUNC_TRACE();\n+\tcpt_sess->ctx_dma_addr = rte_mempool_virt2iova(cpt_sess) +\n+\t\t\tsizeof(struct cpt_sess_misc);\n+}\n+\n+static int\n+otx_cpt_session_cfg(struct rte_cryptodev *dev,\n+\t\t struct rte_crypto_sym_xform *xform,\n+\t\t struct rte_cryptodev_sym_session *sess,\n+\t\t struct rte_mempool *mempool)\n+{\n+\tstruct rte_crypto_sym_xform *chain;\n+\tvoid *sess_private_data = NULL;\n+\n+\tCPT_PMD_INIT_FUNC_TRACE();\n+\n+\tif (cpt_is_algo_supported(xform))\n+\t\tgoto err;\n+\n+\tif (unlikely(sess == NULL)) {\n+\t\tCPT_LOG_ERR(\"invalid session struct\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (rte_mempool_get(mempool, &sess_private_data)) {\n+\t\tCPT_LOG_ERR(\"Could not allocate sess_private_data\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tchain = xform;\n+\twhile (chain) {\n+\t\tswitch (chain->type) {\n+\t\tdefault:\n+\t\t\tCPT_LOG_ERR(\"Invalid crypto xform type\");\n+\t\t\tbreak;\n+\t\t}\n+\t\tchain = chain->next;\n+\t}\n+\tset_sym_session_private_data(sess, dev->driver_id, sess_private_data);\n+\totx_cpt_session_init(sess, dev->driver_id);\n+\treturn 0;\n+\n+err:\n+\tif (sess_private_data)\n+\t\trte_mempool_put(mempool, sess_private_data);\n+\treturn -EPERM;\n+}\n+\n+static void\n+otx_cpt_session_clear(struct rte_cryptodev *dev,\n+\t\t struct rte_cryptodev_sym_session *sess)\n+{\n+\tvoid *sess_priv = get_sym_session_private_data(sess, dev->driver_id);\n+\n+\tCPT_PMD_INIT_FUNC_TRACE();\n+\tif (sess_priv) {\n+\t\tmemset(sess_priv, 0, otx_cpt_get_session_size(dev));\n+\t\tstruct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);\n+\t\tset_sym_session_private_data(sess, dev->driver_id, NULL);\n+\t\trte_mempool_put(sess_mp, sess_priv);\n+\t}\n+}\n+\n static struct rte_cryptodev_ops cptvf_ops = {\n \t/* Device related operations */\n \t.dev_configure = otx_cpt_dev_config,\n@@ -261,9 +339,9 @@ static struct rte_cryptodev_ops cptvf_ops = {\n \t.queue_pair_count = NULL,\n \n \t/* Crypto related operations */\n-\t.sym_session_get_size = NULL,\n-\t.sym_session_configure = NULL,\n-\t.sym_session_clear = NULL\n+\t.sym_session_get_size = otx_cpt_get_session_size,\n+\t.sym_session_configure = otx_cpt_session_cfg,\n+\t.sym_session_clear = otx_cpt_session_clear\n };\n \n static void\n", "prefixes": [ "v4", "10/23" ] }