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{
    "id": 458,
    "url": "http://patches.dpdk.org/api/patches/458/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1411470497-10209-3-git-send-email-bruce.richardson@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1411470497-10209-3-git-send-email-bruce.richardson@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1411470497-10209-3-git-send-email-bruce.richardson@intel.com",
    "date": "2014-09-23T11:08:14",
    "name": "[dpdk-dev,v2,2/5] ixgbe: add prefetch to improve slow-path tx perf",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "42ea264c2e05f86a01dfa1dea3930e6c5b5ffac7",
    "submitter": {
        "id": 20,
        "url": "http://patches.dpdk.org/api/people/20/?format=api",
        "name": "Bruce Richardson",
        "email": "bruce.richardson@intel.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1411470497-10209-3-git-send-email-bruce.richardson@intel.com/mbox/",
    "series": [],
    "comments": "http://patches.dpdk.org/api/patches/458/comments/",
    "check": "pending",
    "checks": "http://patches.dpdk.org/api/patches/458/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
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            "(from bricha3@localhost)\n\tby sivswdev02.ir.intel.com with  id s8NB8IGs010423;\n\tTue, 23 Sep 2014 12:08:18 +0100"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.04,579,1406617200\"; d=\"scan'208\";a=\"603959842\"",
        "From": "Bruce Richardson <bruce.richardson@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Tue, 23 Sep 2014 12:08:14 +0100",
        "Message-Id": "<1411470497-10209-3-git-send-email-bruce.richardson@intel.com>",
        "X-Mailer": "git-send-email 1.7.4.1",
        "In-Reply-To": "<1411470497-10209-1-git-send-email-bruce.richardson@intel.com>",
        "References": "<1410948102-12740-1-git-send-email-bruce.richardson@intel.com>\n\t<1411470497-10209-1-git-send-email-bruce.richardson@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v2 2/5] ixgbe: add prefetch to improve slow-path\n\ttx perf",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
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        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Make a small improvement to slow path TX performance by adding in a\nprefetch for the second mbuf cache line.\nAlso move assignment of l2/l3 length values only when needed.\n\nWhat I've done with the prefetches is two-fold:\n1) changed it from prefetching the mbuf (first cache line) to prefetching\nthe mbuf pool pointer (second cache line) so that when we go to access\nthe pool pointer to free transmitted mbufs we don't get a cache miss. When\nclearing the ring and freeing mbufs, the pool pointer is the only mbuf\nfield used, so we don't need that first cache line.\n2) changed the code to prefetch earlier - in effect to prefetch one mbuf\nahead. The original code prefetched the mbuf to be freed as soon as it\nstarted processing the mbuf to replace it. Instead now, every time we\ncalculate what the next mbuf position is going to be we prefetch the mbuf\nin that position (i.e. the mbuf pool pointer we are going to free the mbuf\nto), even while we are still updating the previous mbuf slot on the ring.\nThis gives the prefetch much more time to resolve and get the data we need\nin the cache before we need it.\n\nIn terms of performance difference, a quick sanity test using testpmd\non a Xeon (Sandy Bridge uarch) platform showed performance increases\nbetween approx 8-18%, depending on the particular RX path used in\nconjuntion with this TX path code.\n\nChanges in V2:\n* Expanded commit message with extra details of change.\n\nSigned-off-by: Bruce Richardson <bruce.richardson@intel.com>\n---\n lib/librte_pmd_ixgbe/ixgbe_rxtx.c | 12 +++++++-----\n 1 file changed, 7 insertions(+), 5 deletions(-)",
    "diff": "diff --git a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c\nindex 6f702b3..c0bb49f 100644\n--- a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c\n+++ b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c\n@@ -565,25 +565,26 @@ ixgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\tixgbe_xmit_cleanup(txq);\n \t}\n \n+\trte_prefetch0(&txe->mbuf->pool);\n+\n \t/* TX loop */\n \tfor (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {\n \t\tnew_ctx = 0;\n \t\ttx_pkt = *tx_pkts++;\n \t\tpkt_len = tx_pkt->pkt_len;\n \n-\t\tRTE_MBUF_PREFETCH_TO_FREE(txe->mbuf);\n-\n \t\t/*\n \t\t * Determine how many (if any) context descriptors\n \t\t * are needed for offload functionality.\n \t\t */\n \t\tol_flags = tx_pkt->ol_flags;\n-\t\tvlan_macip_lens.f.vlan_tci = tx_pkt->vlan_tci;\n-\t\tvlan_macip_lens.f.l2_l3_len = tx_pkt->l2_l3_len;\n \n \t\t/* If hardware offload required */\n \t\ttx_ol_req = ol_flags & PKT_TX_OFFLOAD_MASK;\n \t\tif (tx_ol_req) {\n+\t\t\tvlan_macip_lens.f.vlan_tci = tx_pkt->vlan_tci;\n+\t\t\tvlan_macip_lens.f.l2_l3_len = tx_pkt->l2_l3_len;\n+\n \t\t\t/* If new context need be built or reuse the exist ctx. */\n \t\t\tctx = what_advctx_update(txq, tx_ol_req,\n \t\t\t\tvlan_macip_lens.data);\n@@ -720,7 +721,7 @@ ixgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\t\t    &txr[tx_id];\n \n \t\t\t\ttxn = &sw_ring[txe->next_id];\n-\t\t\t\tRTE_MBUF_PREFETCH_TO_FREE(txn->mbuf);\n+\t\t\t\trte_prefetch0(&txn->mbuf->pool);\n \n \t\t\t\tif (txe->mbuf != NULL) {\n \t\t\t\t\trte_pktmbuf_free_seg(txe->mbuf);\n@@ -749,6 +750,7 @@ ixgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\tdo {\n \t\t\ttxd = &txr[tx_id];\n \t\t\ttxn = &sw_ring[txe->next_id];\n+\t\t\trte_prefetch0(&txn->mbuf->pool);\n \n \t\t\tif (txe->mbuf != NULL)\n \t\t\t\trte_pktmbuf_free_seg(txe->mbuf);\n",
    "prefixes": [
        "dpdk-dev",
        "v2",
        "2/5"
    ]
}