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GET /api/patches/45266/?format=api
{ "id": 45266, "url": "http://patches.dpdk.org/api/patches/45266/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20180925023442.134705-8-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20180925023442.134705-8-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20180925023442.134705-8-qi.z.zhang@intel.com", "date": "2018-09-25T02:34:29", "name": "[07/20] net/i40e/base: improve the polling mechanism", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "9b339073e025518dad9a17779eba378420a5a8c9", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20180925023442.134705-8-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 1477, "url": "http://patches.dpdk.org/api/series/1477/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=1477", "date": "2018-09-25T02:34:22", "name": "base code update", "version": 1, "mbox": "http://patches.dpdk.org/series/1477/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/45266/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/45266/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 6ECED1B19E;\n\tTue, 25 Sep 2018 04:34:22 +0200 (CEST)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby dpdk.org (Postfix) with ESMTP id 8F2C11B147;\n\tTue, 25 Sep 2018 04:34:10 +0200 (CEST)", "from orsmga005.jf.intel.com ([10.7.209.41])\n\tby orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t24 Sep 2018 19:34:08 -0700", "from dpdk51.sh.intel.com ([10.67.110.190])\n\tby orsmga005.jf.intel.com with ESMTP; 24 Sep 2018 19:33:51 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.54,300,1534834800\"; d=\"scan'208\";a=\"259958523\"", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "beilei.xing@intel.com", "Cc": "dev@dpdk.org, ferruh.yigit@intel.com, helin.zhang@intel.com,\n\tQi Zhang <qi.z.zhang@intel.com>, stable@dpdk.org", "Date": "Tue, 25 Sep 2018 10:34:29 +0800", "Message-Id": "<20180925023442.134705-8-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20180925023442.134705-1-qi.z.zhang@intel.com>", "References": "<20180925023442.134705-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH 07/20] net/i40e/base: improve the polling\n\tmechanism", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch fixes the polling mechanism of GLGEN_RSTAT.DEVSTATE\nin the PF Reset path when Global Reset is in progress.\nWhile the driver is polling for the end of the PF Reset and\nthe Global Reset is triggered, abandon the PF Reset path and\nprepare for the upcoming Global Reset.\n\nCc: stable@dpdk.org\n\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/i40e/base/i40e_common.c | 35 +++++++++++++++++++++++++++++------\n 1 file changed, 29 insertions(+), 6 deletions(-)", "diff": "diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c\nindex 18009be3b..0affa98ac 100644\n--- a/drivers/net/i40e/base/i40e_common.c\n+++ b/drivers/net/i40e/base/i40e_common.c\n@@ -1296,6 +1296,29 @@ STATIC enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)\n \treturn media;\n }\n \n+/**\n+ * i40e_poll_globr - Poll for Global Reset completion\n+ * @hw: pointer to the hardware structure\n+ * @retry_limit: how many times to retry before failure\n+ **/\n+STATIC enum i40e_status_code i40e_poll_globr(struct i40e_hw *hw,\n+\t\t\t\t\t u32 retry_limit)\n+{\n+\tu32 cnt, reg = 0;\n+\n+\tfor (cnt = 0; cnt < retry_limit; cnt++) {\n+\t\treg = rd32(hw, I40E_GLGEN_RSTAT);\n+\t\tif (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))\n+\t\t\treturn I40E_SUCCESS;\n+\t\ti40e_msec_delay(100);\n+\t}\n+\n+\tDEBUGOUT(\"Global reset failed.\\n\");\n+\tDEBUGOUT1(\"I40E_GLGEN_RSTAT = 0x%x\\n\", reg);\n+\n+\treturn I40E_ERR_RESET_FAILED;\n+}\n+\n #define I40E_PF_RESET_WAIT_COUNT\t200\n /**\n * i40e_pf_reset - Reset the PF\n@@ -1365,14 +1388,14 @@ enum i40e_status_code i40e_pf_reset(struct i40e_hw *hw)\n \t\t\tif (!(reg & I40E_PFGEN_CTRL_PFSWR_MASK))\n \t\t\t\tbreak;\n \t\t\treg2 = rd32(hw, I40E_GLGEN_RSTAT);\n-\t\t\tif (reg2 & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {\n-\t\t\t\tDEBUGOUT(\"Core reset upcoming. Skipping PF reset request.\\n\");\n-\t\t\t\tDEBUGOUT1(\"I40E_GLGEN_RSTAT = 0x%x\\n\", reg2);\n-\t\t\t\treturn I40E_ERR_NOT_READY;\n-\t\t\t}\n+\t\t\tif (reg2 & I40E_GLGEN_RSTAT_DEVSTATE_MASK)\n+\t\t\t\tbreak;\n \t\t\ti40e_msec_delay(1);\n \t\t}\n-\t\tif (reg & I40E_PFGEN_CTRL_PFSWR_MASK) {\n+\t\tif (reg2 & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {\n+\t\t\tif (i40e_poll_globr(hw, grst_del) != I40E_SUCCESS)\n+\t\t\t\treturn I40E_ERR_RESET_FAILED;\n+\t\t} else if (reg & I40E_PFGEN_CTRL_PFSWR_MASK) {\n \t\t\tDEBUGOUT(\"PF reset polling failed to complete.\\n\");\n \t\t\treturn I40E_ERR_RESET_FAILED;\n \t\t}\n", "prefixes": [ "07/20" ] }