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GET /api/patches/44177/?format=api
{ "id": 44177, "url": "http://patches.dpdk.org/api/patches/44177/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1536033560-21541-4-git-send-email-ajoseph@caviumnetworks.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1536033560-21541-4-git-send-email-ajoseph@caviumnetworks.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1536033560-21541-4-git-send-email-ajoseph@caviumnetworks.com", "date": "2018-09-04T03:58:50", "name": "[v2,03/33] crypto/octeontx: add PCI probe and remove", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "6dc1252f4308d237d42a91315f5b68240d762d35", "submitter": { "id": 891, "url": "http://patches.dpdk.org/api/people/891/?format=api", "name": "Anoob Joseph", "email": "ajoseph@caviumnetworks.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1536033560-21541-4-git-send-email-ajoseph@caviumnetworks.com/mbox/", "series": [ { "id": 1164, "url": "http://patches.dpdk.org/api/series/1164/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=1164", "date": "2018-09-04T03:58:47", "name": "Adding Cavium's OcteonTX crypto PMD", "version": 2, "mbox": "http://patches.dpdk.org/series/1164/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/44177/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/44177/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 651FD2C4F;\n\tTue, 4 Sep 2018 06:03:08 +0200 (CEST)", "from NAM01-SN1-obe.outbound.protection.outlook.com\n\t(mail-sn1nam01on0082.outbound.protection.outlook.com [104.47.32.82])\n\tby dpdk.org (Postfix) with ESMTP id 121841BE0\n\tfor <dev@dpdk.org>; Tue, 4 Sep 2018 06:03:05 +0200 (CEST)", "from ajoseph83.caveonetworks.com.com (115.113.156.2) by\n\tBYAPR07MB4902.namprd07.prod.outlook.com (2603:10b6:a02:ef::25) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n\t15.20.1101.15; Tue, 4 Sep 2018 04:01:53 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=IzSeT5pOcDyoYevVdcu9TGkPd/Mci3BqMMll6cYeebs=;\n\tb=UukYBQQs8XsJI5kwJAvgUeMOCjq9on68FrglpWKNxcd4p1WzyjBFODq50pSfRfwCpazuUmMCsqGZ1BZnMNRL6i3h4rnCBew89jR4MvkxKnLZP8duSTsp2D9xjNZV8z64xV/VIhfYv25knFMPIjqQHbdPIfofHNr2TUCEnZ9BXzg=", "Authentication-Results": "spf=none (sender IP is )\n\tsmtp.mailfrom=Anoob.Joseph@cavium.com; ", "From": "Anoob Joseph <ajoseph@caviumnetworks.com>", "To": "Akhil Goyal <akhil.goyal@nxp.com>,\n\tPablo de Lara <pablo.de.lara.guarch@intel.com>,\n\tThomas Monjalon <thomas@monjalon.net>", "Cc": "Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>,\n\tJerin Jacob <jerin.jacob@caviumnetworks.com>,\n\tNarayana Prasad <narayanaprasad.athreya@caviumnetworks.com>,\n\tdev@dpdk.org, Anoob Joseph <anoob.joseph@caviumnetworks.com>,\n\tMurthy NSSR <nidadavolu.murthy@caviumnetworks.com>,\n\tNithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>,\n\tRagothaman Jayaraman <rjayaraman@caviumnetworks.com>,\n\tSrisivasubramanian S <ssrinivasan@caviumnetworks.com>,\n\tTejasree Kondoj <kondoj.tejasree@caviumnetworks.com>", "Date": "Tue, 4 Sep 2018 09:28:50 +0530", "Message-Id": "<1536033560-21541-4-git-send-email-ajoseph@caviumnetworks.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1536033560-21541-1-git-send-email-ajoseph@caviumnetworks.com>", "References": "<1528476325-15585-1-git-send-email-anoob.joseph@caviumnetworks.com>\n\t<1536033560-21541-1-git-send-email-ajoseph@caviumnetworks.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[115.113.156.2]", "X-ClientProxiedBy": "BMXPR01CA0023.INDPRD01.PROD.OUTLOOK.COM\n\t(2603:1096:b00:d::33) To BYAPR07MB4902.namprd07.prod.outlook.com\n\t(2603:10b6:a02:ef::25)", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "cdcbd2d8-ddbc-4797-8df2-08d6121b28c0", "X-Microsoft-Antispam": "BCL:0; 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"FH7De+eDs7HA4k4dg61mHb1zfTioCFBjrcOH/ihXFlIDFSKkEAkpx3qtEI+H7siXuKRQagbs10qqt/z0KbwCapE+ggxsI8VxAUQ82D3b8IW8g+TlRQBWiUlc+8QGyk3AwYIioqz+h1QZ5cDUtYZs+HxQ4rC19tFJIFP6UpkWk2j0nLLBySp4VcvtKNXgdZbH+55p7Bb1TBowyJ8fcee5DLXqdWlHZZ+t1j1GRswUzpYTDdAy/6Ilh16/xcom/1R75XSifTM270+0zebjk+bQIpQg9ebDmKhLDZhCMx9Wd8dMHB57Awn4tt5NF8GQL3YjMsnqwo9TP1vKpjXYUFZtqz9BB+5Tp0FPgC/llBDOClM=", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-OriginatorOrg": "caviumnetworks.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "04 Sep 2018 04:01:53.7878\n\t(UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "cdcbd2d8-ddbc-4797-8df2-08d6121b28c0", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "711e4ccf-2e9b-4bcf-a551-4094005b6194", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BYAPR07MB4902", "Subject": "[dpdk-dev] [PATCH v2 03/33] crypto/octeontx: add PCI probe and\n\tremove", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>\n\nAdding basic PCI probe/remove functions for OcteonTX crypto device.\nInitialization function for logging is also added.\n\nSigned-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>\nSigned-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>\nSigned-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>\nSigned-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>\nSigned-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>\nSigned-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>\nSigned-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>\n---\n drivers/crypto/octeontx/Makefile | 5 ++\n drivers/crypto/octeontx/meson.build | 4 +-\n drivers/crypto/octeontx/otx_cryptodev.c | 132 ++++++++++++++++++++++++++++\n drivers/crypto/octeontx/otx_cryptodev.h | 20 +++++\n drivers/crypto/octeontx/otx_cryptodev_ops.c | 15 ++++\n drivers/crypto/octeontx/otx_cryptodev_ops.h | 11 +++\n 6 files changed, 186 insertions(+), 1 deletion(-)\n create mode 100644 drivers/crypto/octeontx/otx_cryptodev.c\n create mode 100644 drivers/crypto/octeontx/otx_cryptodev.h\n create mode 100644 drivers/crypto/octeontx/otx_cryptodev_ops.c\n create mode 100644 drivers/crypto/octeontx/otx_cryptodev_ops.h", "diff": "diff --git a/drivers/crypto/octeontx/Makefile b/drivers/crypto/octeontx/Makefile\nindex 65bd02f..12fec75 100644\n--- a/drivers/crypto/octeontx/Makefile\n+++ b/drivers/crypto/octeontx/Makefile\n@@ -20,6 +20,11 @@ LDLIBS += -lrte_pci -lrte_bus_pci\n VPATH += $(RTE_SDK)/drivers/crypto/octeontx\n \n CFLAGS += -O3 -DCPT_MODEL=CRYPTO_OCTEONTX\n+CFLAGS += -I$(RTE_SDK)/drivers/common/cpt\n+\n+# PMD code\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += otx_cryptodev.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += otx_cryptodev_ops.c\n \n # export include files\n SYMLINK-y-include +=\ndiff --git a/drivers/crypto/octeontx/meson.build b/drivers/crypto/octeontx/meson.build\nindex 261bb77..6564090 100644\n--- a/drivers/crypto/octeontx/meson.build\n+++ b/drivers/crypto/octeontx/meson.build\n@@ -7,6 +7,8 @@ endif\n deps += ['bus_pci']\n name = 'octeontx_crypto'\n \n-sources = files()\n+sources = files('otx_cryptodev.c',\n+\t\t'otx_cryptodev_ops.c')\n \n cflags += '-DCPT_MODEL=CRYPTO_OCTEONTX'\n+includes += include_directories('../../common/cpt')\ndiff --git a/drivers/crypto/octeontx/otx_cryptodev.c b/drivers/crypto/octeontx/otx_cryptodev.c\nnew file mode 100644\nindex 0000000..df88a84\n--- /dev/null\n+++ b/drivers/crypto/octeontx/otx_cryptodev.c\n@@ -0,0 +1,132 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Cavium, Inc\n+ */\n+\n+#include <rte_bus_pci.h>\n+#include <rte_common.h>\n+#include <rte_cryptodev.h>\n+#include <rte_cryptodev_pmd.h>\n+#include <rte_log.h>\n+#include <rte_pci.h>\n+\n+/* CPT common headers */\n+#include \"cpt_pmd_logs.h\"\n+\n+#include \"otx_cryptodev.h\"\n+#include \"otx_cryptodev_ops.h\"\n+\n+static int otx_cryptodev_logtype;\n+\n+static struct rte_pci_id pci_id_cpt_table[] = {\n+\t{\n+\t\tRTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, CPT_81XX_PCI_VF_DEVICE_ID),\n+\t},\n+\t/* sentinel */\n+\t{\n+\t.device_id = 0\n+\t},\n+};\n+\n+static void\n+otx_cpt_init_log(void)\n+{\n+\t/* Bus level logs */\n+\totx_cryptodev_logtype = rte_log_register(\"pmd.crypto.octeontx\");\n+\tif (otx_cryptodev_logtype >= 0)\n+\t\trte_log_set_level(otx_cryptodev_logtype, RTE_LOG_NOTICE);\n+}\n+\n+static void\n+otx_cpt_logtype_init(void)\n+{\n+\tcpt_logtype = otx_cryptodev_logtype;\n+}\n+\n+static int\n+otx_cpt_pci_probe(struct rte_pci_driver *pci_drv,\n+\t\t\tstruct rte_pci_device *pci_dev)\n+{\n+\tstruct rte_cryptodev *cryptodev;\n+\tchar name[RTE_CRYPTODEV_NAME_MAX_LEN];\n+\tint retval;\n+\n+\tif (pci_drv == NULL)\n+\t\treturn -ENODEV;\n+\n+\trte_pci_device_name(&pci_dev->addr, name, sizeof(name));\n+\n+\tcryptodev = rte_cryptodev_pmd_allocate(name, rte_socket_id());\n+\tif (cryptodev == NULL)\n+\t\treturn -ENOMEM;\n+\n+\tcryptodev->device = &pci_dev->device;\n+\tcryptodev->device->driver = &pci_drv->driver;\n+\tcryptodev->driver_id = otx_cryptodev_driver_id;\n+\n+\t/* init user callbacks */\n+\tTAILQ_INIT(&(cryptodev->link_intr_cbs));\n+\n+\t/* init logtype used in common */\n+\totx_cpt_logtype_init();\n+\n+\t/* Invoke PMD device initialization function */\n+\tretval = otx_cpt_dev_create(cryptodev);\n+\tif (retval == 0)\n+\t\treturn 0;\n+\n+\tCPT_LOG_ERR(\"[DRV %s]: Failed to create device \"\n+\t\t\t\"(vendor_id: 0x%x device_id: 0x%x\",\n+\t\t\tpci_drv->driver.name,\n+\t\t\t(unsigned int) pci_dev->id.vendor_id,\n+\t\t\t(unsigned int) pci_dev->id.device_id);\n+\n+\tcryptodev->attached = RTE_CRYPTODEV_DETACHED;\n+\n+\treturn -ENXIO;\n+}\n+\n+static int\n+otx_cpt_pci_remove(struct rte_pci_device *pci_dev)\n+{\n+\tstruct rte_cryptodev *cryptodev;\n+\tchar name[RTE_CRYPTODEV_NAME_MAX_LEN];\n+\n+\tif (pci_dev == NULL)\n+\t\treturn -EINVAL;\n+\n+\trte_pci_device_name(&pci_dev->addr, name, sizeof(name));\n+\n+\tcryptodev = rte_cryptodev_pmd_get_named_dev(name);\n+\tif (cryptodev == NULL)\n+\t\treturn -ENODEV;\n+\n+\tif (pci_dev->driver == NULL)\n+\t\treturn -ENODEV;\n+\n+\t/* free crypto device */\n+\trte_cryptodev_pmd_release_device(cryptodev);\n+\n+\tif (rte_eal_process_type() == RTE_PROC_PRIMARY)\n+\t\trte_free(cryptodev->data->dev_private);\n+\n+\tcryptodev->device = NULL;\n+\tcryptodev->device->driver = NULL;\n+\tcryptodev->data = NULL;\n+\n+\treturn 0;\n+}\n+\n+static struct rte_pci_driver otx_cryptodev_pmd = {\n+\t\t.id_table = pci_id_cpt_table,\n+\t\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING,\n+\t\t.probe = otx_cpt_pci_probe,\n+\t\t.remove = otx_cpt_pci_remove,\n+};\n+\n+static struct cryptodev_driver otx_cryptodev_drv;\n+\n+RTE_INIT(otx_cpt_init_log);\n+RTE_PMD_REGISTER_PCI(CRYPTODEV_NAME_OCTEONTX_PMD, otx_cryptodev_pmd);\n+RTE_PMD_REGISTER_PCI_TABLE(CRYPTODEV_NAME_OCTEONTX_PMD, pci_id_cpt_table);\n+RTE_PMD_REGISTER_CRYPTO_DRIVER(otx_cryptodev_drv, otx_cryptodev_pmd.driver,\n+\t\totx_cryptodev_driver_id);\ndiff --git a/drivers/crypto/octeontx/otx_cryptodev.h b/drivers/crypto/octeontx/otx_cryptodev.h\nnew file mode 100644\nindex 0000000..99d3346\n--- /dev/null\n+++ b/drivers/crypto/octeontx/otx_cryptodev.h\n@@ -0,0 +1,20 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Cavium, Inc\n+ */\n+\n+#ifndef _OTX_CRYPTODEV_H_\n+#define _OTX_CRYPTODEV_H_\n+\n+/* Cavium OcteonTX Crypto PMD device name */\n+#define CRYPTODEV_NAME_OCTEONTX_PMD\tcrypto_octeontx\n+\n+/* Device ID */\n+#define PCI_VENDOR_ID_CAVIUM\t\t 0x177d\n+#define CPT_81XX_PCI_VF_DEVICE_ID\t 0xa041\n+\n+/*\n+ * Crypto device driver ID\n+ */\n+uint8_t otx_cryptodev_driver_id;\n+\n+#endif /* _OTX_CRYPTODEV_H_ */\ndiff --git a/drivers/crypto/octeontx/otx_cryptodev_ops.c b/drivers/crypto/octeontx/otx_cryptodev_ops.c\nnew file mode 100644\nindex 0000000..1b5f108\n--- /dev/null\n+++ b/drivers/crypto/octeontx/otx_cryptodev_ops.c\n@@ -0,0 +1,15 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Cavium, Inc\n+ */\n+\n+#include <rte_cryptodev.h>\n+\n+#include \"otx_cryptodev.h\"\n+#include \"otx_cryptodev_ops.h\"\n+\n+int\n+otx_cpt_dev_create(struct rte_cryptodev *c_dev)\n+{\n+\tRTE_SET_USED(c_dev);\n+\treturn 0;\n+}\ndiff --git a/drivers/crypto/octeontx/otx_cryptodev_ops.h b/drivers/crypto/octeontx/otx_cryptodev_ops.h\nnew file mode 100644\nindex 0000000..3f2d829\n--- /dev/null\n+++ b/drivers/crypto/octeontx/otx_cryptodev_ops.h\n@@ -0,0 +1,11 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Cavium, Inc\n+ */\n+\n+#ifndef _OTX_CRYPTODEV_OPS_H_\n+#define _OTX_CRYPTODEV_OPS_H_\n+\n+int\n+otx_cpt_dev_create(struct rte_cryptodev *c_dev);\n+\n+#endif /* _OTX_CRYPTODEV_OPS_H_ */\n", "prefixes": [ "v2", "03/33" ] }