Patch Detail

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{
    "id": 42390,
    "url": "http://patches.dpdk.org/api/patches/42390/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1530806060-31227-2-git-send-email-shally.verma@caviumnetworks.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
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        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1530806060-31227-2-git-send-email-shally.verma@caviumnetworks.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1530806060-31227-2-git-send-email-shally.verma@caviumnetworks.com",
    "date": "2018-07-05T15:54:19",
    "name": "[v4,1/2] test/crypto: add rsa and mod test application",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "5d748109151e06c8f4a9e8ca12e72db8ed080d17",
    "submitter": {
        "id": 960,
        "url": "http://patches.dpdk.org/api/people/960/?format=api",
        "name": "Shally Verma",
        "email": "shally.verma@caviumnetworks.com"
    },
    "delegate": {
        "id": 22,
        "url": "http://patches.dpdk.org/api/users/22/?format=api",
        "username": "pdelarag",
        "first_name": "Pablo",
        "last_name": "de Lara Guarch",
        "email": "pablo.de.lara.guarch@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1530806060-31227-2-git-send-email-shally.verma@caviumnetworks.com/mbox/",
    "series": [
        {
            "id": 422,
            "url": "http://patches.dpdk.org/api/series/422/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=422",
            "date": "2018-07-05T15:54:18",
            "name": "test/crypto: add testcase for asym crypto",
            "version": 4,
            "mbox": "http://patches.dpdk.org/series/422/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/42390/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/42390/checks/",
    "tags": {},
    "related": [],
    "headers": {
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            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 412351BF29;\n\tThu,  5 Jul 2018 17:54:52 +0200 (CEST)",
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        "Authentication-Results": "spf=none (sender IP is )\n\tsmtp.mailfrom=Shally.Verma@cavium.com; ",
        "From": "Shally Verma <shally.verma@caviumnetworks.com>",
        "To": "pablo.de.lara.guarch@intel.com",
        "Cc": "dev@dpdk.org, pathreya@caviumnetworks.com,\n\tSunila Sahu <sunila.sahu@caviumnetworks.com>,\n\tAshish Gupta <ashish.gupta@caviumnetworks.com>",
        "Date": "Thu,  5 Jul 2018 21:24:19 +0530",
        "Message-Id": "<1530806060-31227-2-git-send-email-shally.verma@caviumnetworks.com>",
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        "Subject": "[dpdk-dev] [PATCH v4 1/2] test/crypto: add rsa and mod test\n\tapplication",
        "X-BeenThere": "dev@dpdk.org",
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        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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    },
    "content": "From: Sunila Sahu <sunila.sahu@caviumnetworks.com>\n\nTest application include test case for :\n- RSA encrypt, decrypt, sign and verify\n- Modular Inversion and Exponentiation\n\nTest cases uses predefined test vectors.\n\nSigned-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>\nSigned-off-by: Shally Verma <shally.verma@caviumnetworks.com>\nSigned-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>\n---\n test/test/Makefile                          |   1 +\n test/test/meson.build                       |   1 +\n test/test/test_cryptodev_asym.c             | 836 ++++++++++++++++++++++++++++\n test/test/test_cryptodev_asym_util.h        |  45 ++\n test/test/test_cryptodev_mod_test_vectors.h | 103 ++++\n test/test/test_cryptodev_rsa_test_vectors.h |  90 +++\n 6 files changed, 1076 insertions(+)",
    "diff": "diff --git a/test/test/Makefile b/test/test/Makefile\nindex eccc8ef..d6fb88f 100644\n--- a/test/test/Makefile\n+++ b/test/test/Makefile\n@@ -179,6 +179,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_PMD_RING) += test_pmd_ring_perf.c\n \n SRCS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += test_cryptodev_blockcipher.c\n SRCS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += test_cryptodev.c\n+SRCS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += test_cryptodev_asym.c\n \n ifeq ($(CONFIG_RTE_COMPRESSDEV_TEST),y)\n SRCS-$(CONFIG_RTE_LIBRTE_COMPRESSDEV) += test_compressdev.c\ndiff --git a/test/test/meson.build b/test/test/meson.build\nindex a907fd2..06cd6f7 100644\n--- a/test/test/meson.build\n+++ b/test/test/meson.build\n@@ -22,6 +22,7 @@ test_sources = files('commands.c',\n \t'test_cpuflags.c',\n \t'test_crc.c',\n \t'test_cryptodev.c',\n+\t'test_cryptodev_asym.c',\n \t'test_cryptodev_blockcipher.c',\n \t'test_cycles.c',\n \t'test_debug.c',\ndiff --git a/test/test/test_cryptodev_asym.c b/test/test/test_cryptodev_asym.c\nnew file mode 100644\nindex 0000000..9b6ffac\n--- /dev/null\n+++ b/test/test/test_cryptodev_asym.c\n@@ -0,0 +1,836 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Cavium Networks\n+ */\n+\n+#include <rte_bus_vdev.h>\n+#include <rte_common.h>\n+#include <rte_hexdump.h>\n+#include <rte_mbuf.h>\n+#include <rte_malloc.h>\n+#include <rte_memcpy.h>\n+#include <rte_pause.h>\n+\n+#include <rte_cryptodev.h>\n+#include <rte_cryptodev_pmd.h>\n+#include <rte_crypto.h>\n+\n+#include \"test_cryptodev.h\"\n+#include \"test_cryptodev_mod_test_vectors.h\"\n+#include \"test_cryptodev_rsa_test_vectors.h\"\n+#include \"test_cryptodev_asym_util.h\"\n+#include \"test.h\"\n+\n+#define TEST_NUM_BUFS 10\n+#define TEST_NUM_SESSIONS 4\n+#define ASYM_TEST_MSG_LEN\t256\n+\n+static int gbl_driver_id;\n+struct crypto_testsuite_params {\n+\tstruct rte_mempool *op_mpool;\n+\tstruct rte_mempool *session_mpool;\n+\tstruct rte_cryptodev_config conf;\n+\tstruct rte_cryptodev_qp_conf qp_conf;\n+\tuint8_t valid_devs[RTE_CRYPTO_MAX_DEVS];\n+\tuint8_t valid_dev_count;\n+};\n+\n+struct crypto_unittest_params {\n+\tstruct rte_cryptodev_asym_session *sess;\n+\tstruct rte_crypto_op *op;\n+};\n+\n+static struct crypto_testsuite_params testsuite_params = { NULL };\n+\n+static int\n+test_rsa_sign_verify(void)\n+{\n+\tstruct crypto_testsuite_params *ts_params = &testsuite_params;\n+\tstruct rte_mempool *op_mpool = ts_params->op_mpool;\n+\tstruct rte_mempool *sess_mpool = ts_params->session_mpool;\n+\tuint8_t dev_id = ts_params->valid_devs[0];\n+\tstruct rte_crypto_asym_op *asym_op = NULL;\n+\tstruct rte_crypto_op *op = NULL, *result_op = NULL;\n+\tstruct rte_cryptodev_asym_session *sess = NULL;\n+\tint status = TEST_SUCCESS;\n+\tuint8_t output_buf[TEST_DATA_SIZE] = {0};\n+\tuint8_t input_buf[TEST_DATA_SIZE] = {0};\n+\tchar test_msg[ASYM_TEST_MSG_LEN + 1];\n+\n+\tsess = rte_cryptodev_asym_session_create(sess_mpool);\n+\n+\tif (!sess) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN, \"line %u \"\n+\t\t\t\t\"FAILED: %s\", __LINE__,\n+\t\t\t\t\"Session creation failed\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\tif (rte_cryptodev_asym_session_init(dev_id, sess, &rsa_xform,\n+\t\t\t\tsess_mpool) < 0) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__, \"unabled to config sym session\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\t/* set up crypto op data structure */\n+\top = rte_crypto_op_alloc(op_mpool, RTE_CRYPTO_OP_TYPE_ASYMMETRIC);\n+\tif (!op) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__,\n+\t\t\t\t\"Failed to allocate asymmetric crypto \"\n+\t\t\t\t\"operation struct\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\tasym_op = op->asym;\n+\t/* Compute sign on the test vector */\n+\tasym_op->rsa.op_type = RTE_CRYPTO_ASYM_OP_SIGN;\n+\n+\tmemcpy(input_buf, &rsaplaintext.data,\n+\t\t\trsaplaintext.len);\n+\tasym_op->rsa.message.data = input_buf;\n+\tasym_op->rsa.message.length = rsaplaintext.len;\n+\tasym_op->rsa.sign.data = output_buf;\n+\tasym_op->rsa.pad = RTE_CRYPTO_RSA_PKCS1_V1_5_BT1;\n+\n+\tdebug_hexdump(stdout, \"message\", asym_op->rsa.message.data,\n+\t\t\tasym_op->rsa.message.length);\n+\n+\t/* attach asymmetric crypto session to crypto operations */\n+\trte_crypto_op_attach_asym_session(op, sess);\n+\n+\tsnprintf(test_msg, ASYM_TEST_MSG_LEN, \"Process ASYM operation\");\n+\n+\t/* Process crypto operation */\n+\tif (rte_cryptodev_enqueue_burst(dev_id, 0, &op, 1) != 1) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__, \"Error sending packet for operation\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\twhile (rte_cryptodev_dequeue_burst(dev_id, 0, &result_op, 1) == 0)\n+\t\trte_pause();\n+\n+\tif (result_op == NULL) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__, \"Failed to process asym crypto op\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\tdebug_hexdump(stdout, \"signed message\", asym_op->rsa.sign.data,\n+\t\t\tasym_op->rsa.sign.length);\n+\tasym_op = result_op->asym;\n+\n+\t/* Verify sign */\n+\tasym_op->rsa.op_type = RTE_CRYPTO_ASYM_OP_VERIFY;\n+\tasym_op->rsa.pad = RTE_CRYPTO_RSA_PKCS1_V1_5_BT2;\n+\n+\t/* Process crypto operation */\n+\tif (rte_cryptodev_enqueue_burst(dev_id, 0, &op, 1) != 1) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__, \"Error sending packet for operation\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\twhile (rte_cryptodev_dequeue_burst(dev_id, 0, &result_op, 1) == 0)\n+\t\trte_pause();\n+\n+\tif (result_op == NULL) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__, \"Failed to process asym crypto op\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\tstatus = TEST_SUCCESS;\n+\tint ret = 0;\n+\tret = rsa_verify(&rsaplaintext, result_op);\n+\tif (ret)\n+\t\tstatus = TEST_FAILED;\n+\n+error_exit:\n+\n+\tif (sess) {\n+\t\trte_cryptodev_asym_session_clear(dev_id, sess);\n+\t\trte_cryptodev_asym_session_free(sess);\n+\t}\n+\n+\tif (op)\n+\t\trte_crypto_op_free(op);\n+\tif (status == TEST_SUCCESS)\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN, \"PASS\");\n+\telse\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN, \"FAILED\");\n+\n+\treturn status;\n+}\n+\n+static int\n+test_rsa_enc_dec(void)\n+{\n+\tstruct crypto_testsuite_params *ts_params = &testsuite_params;\n+\tstruct rte_mempool *op_mpool = ts_params->op_mpool;\n+\tstruct rte_mempool *sess_mpool = ts_params->session_mpool;\n+\tuint8_t dev_id = ts_params->valid_devs[0];\n+\tstruct rte_crypto_asym_op *asym_op = NULL;\n+\tstruct rte_crypto_op *op = NULL, *result_op = NULL;\n+\tstruct rte_cryptodev_asym_session *sess = NULL;\n+\tint status = TEST_SUCCESS;\n+\tuint8_t input_buf[TEST_DATA_SIZE] = {0};\n+\tchar test_msg[ASYM_TEST_MSG_LEN + 1];\n+\n+\tsess = rte_cryptodev_asym_session_create(sess_mpool);\n+\n+\tif (!sess) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN, \"line %u \"\n+\t\t\t\t\"FAILED: %s\", __LINE__,\n+\t\t\t\t\"Session creation failed\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\tif (rte_cryptodev_asym_session_init(dev_id, sess, &rsa_xform,\n+\t\t\t\tsess_mpool) < 0) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__, \"unabled to config sym session\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\t/* set up crypto op data structure */\n+\top = rte_crypto_op_alloc(op_mpool, RTE_CRYPTO_OP_TYPE_ASYMMETRIC);\n+\tif (!op) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__,\n+\t\t\t\t\"Failed to allocate asymmetric crypto \"\n+\t\t\t\t\"operation struct\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\tasym_op = op->asym;\n+\t/*Compute encryption on the test vector */\n+\tasym_op->rsa.op_type = RTE_CRYPTO_ASYM_OP_ENCRYPT;\n+\n+\tmemcpy(input_buf, rsaplaintext.data,\n+\t\t\trsaplaintext.len);\n+\tasym_op->rsa.message.data = input_buf;\n+\tasym_op->rsa.message.length = rsaplaintext.len;\n+\tasym_op->rsa.pad = RTE_CRYPTO_RSA_PKCS1_V1_5_BT2;\n+\n+\tdebug_hexdump(stdout, \"message\", asym_op->rsa.message.data,\n+\t\t\tasym_op->rsa.message.length);\n+\n+\t/* attach asymmetric crypto session to crypto operations */\n+\trte_crypto_op_attach_asym_session(op, sess);\n+\n+\tsnprintf(test_msg, ASYM_TEST_MSG_LEN, \"Process ASYM operation\");\n+\n+\t/* Process crypto operation */\n+\tif (rte_cryptodev_enqueue_burst(dev_id, 0, &op, 1) != 1) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__, \"Error sending packet for operation\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\twhile (rte_cryptodev_dequeue_burst(dev_id, 0, &result_op, 1) == 0)\n+\t\trte_pause();\n+\n+\tif (result_op == NULL) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__, \"Failed to process asym crypto op\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\tdebug_hexdump(stdout, \"encrypted message\", asym_op->rsa.message.data,\n+\t\t\tasym_op->rsa.message.length);\n+\t/* Use the resulted output as decryption Input vector*/\n+\tasym_op = result_op->asym;\n+\tasym_op->rsa.op_type = RTE_CRYPTO_ASYM_OP_DECRYPT;\n+\tasym_op->rsa.pad = RTE_CRYPTO_RSA_PKCS1_V1_5_BT1;\n+\n+\t/* Process crypto operation */\n+\tif (rte_cryptodev_enqueue_burst(dev_id, 0, &op, 1) != 1) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__, \"Error sending packet for operation\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\twhile (rte_cryptodev_dequeue_burst(dev_id, 0, &result_op, 1) == 0)\n+\t\trte_pause();\n+\n+\tif (result_op == NULL) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__, \"Failed to process asym crypto op\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\tstatus = TEST_SUCCESS;\n+\tint ret = 0;\n+\tret = rsa_verify(&rsaplaintext, result_op);\n+\tif (ret)\n+\t\tstatus = TEST_FAILED;\n+\n+error_exit:\n+\n+\tif (sess) {\n+\t\trte_cryptodev_asym_session_clear(dev_id, sess);\n+\t\trte_cryptodev_asym_session_free(sess);\n+\t}\n+\n+\tif (op)\n+\t\trte_crypto_op_free(op);\n+\tif (status == TEST_SUCCESS)\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN, \"PASS\");\n+\telse\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN, \"FAILED\");\n+\n+\treturn status;\n+}\n+\n+static int\n+testsuite_setup(void)\n+{\n+\tstruct crypto_testsuite_params *ts_params = &testsuite_params;\n+\tstruct rte_cryptodev_info info;\n+\tuint32_t i = 0, nb_devs, dev_id;\n+\tint ret;\n+\tuint16_t qp_id;\n+\n+\tmemset(ts_params, 0, sizeof(*ts_params));\n+\n+\tts_params->op_mpool = rte_crypto_op_pool_create(\n+\t\t\t\"CRYPTO_ASYM_OP_POOL\",\n+\t\t\tRTE_CRYPTO_OP_TYPE_ASYMMETRIC,\n+\t\t\tTEST_NUM_BUFS, 0,\n+\t\t\t0,\n+\t\t\trte_socket_id());\n+\tif (ts_params->op_mpool == NULL) {\n+\t\tRTE_LOG(ERR, USER1, \"Can't create ASYM_CRYPTO_OP_POOL\\n\");\n+\t\treturn TEST_FAILED;\n+\t}\n+\n+\t/* Create an OPENSSL device if required */\n+\tif (gbl_driver_id == rte_cryptodev_driver_id_get(\n+\t\t\tRTE_STR(CRYPTODEV_NAME_OPENSSL_PMD))) {\n+\t\tnb_devs = rte_cryptodev_device_count_by_driver(\n+\t\t\t\trte_cryptodev_driver_id_get(\n+\t\t\t\tRTE_STR(CRYPTODEV_NAME_OPENSSL_PMD)));\n+\t\tif (nb_devs < 1) {\n+\t\t\tret = rte_vdev_init(\n+\t\t\t\tRTE_STR(CRYPTODEV_NAME_OPENSSL_PMD),\n+\t\t\t\tNULL);\n+\n+\t\t\tTEST_ASSERT(ret == 0, \"Failed to create \"\n+\t\t\t\t\"instance of pmd : %s\",\n+\t\t\t\tRTE_STR(CRYPTODEV_NAME_OPENSSL_PMD));\n+\t\t}\n+\t}\n+\n+\tnb_devs = rte_cryptodev_count();\n+\tif (nb_devs < 1) {\n+\t\tRTE_LOG(ERR, USER1, \"No crypto devices found?\\n\");\n+\t\treturn TEST_FAILED;\n+\t}\n+\n+\t/* Create list of valid crypto devs */\n+\tfor (i = 0; i < nb_devs; i++) {\n+\t\trte_cryptodev_info_get(i, &info);\n+\t\tif (info.driver_id == gbl_driver_id)\n+\t\t\tts_params->valid_devs[ts_params->valid_dev_count++] = i;\n+\t}\n+\n+\tif (ts_params->valid_dev_count < 1)\n+\t\treturn TEST_FAILED;\n+\n+\t/* Set up all the qps on the first of the valid devices found */\n+\n+\tdev_id = ts_params->valid_devs[0];\n+\n+\trte_cryptodev_info_get(dev_id, &info);\n+\n+\t/* check if device support asymmetric, skip if not */\n+\tif (!(info.feature_flags &\n+\t\t\t\tRTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO)) {\n+\t\tRTE_LOG(ERR, USER1, \"Device doesn't support asymmetric. \"\n+\t\t\t\t\"Test Skipped.\\n\");\n+\t\treturn TEST_FAILED;\n+\t}\n+\n+\t/* configure device with num qp */\n+\tts_params->conf.nb_queue_pairs = info.max_nb_queue_pairs;\n+\tts_params->conf.socket_id = SOCKET_ID_ANY;\n+\tTEST_ASSERT_SUCCESS(rte_cryptodev_configure(dev_id,\n+\t\t\t&ts_params->conf),\n+\t\t\t\"Failed to configure cryptodev %u with %u qps\",\n+\t\t\tdev_id, ts_params->conf.nb_queue_pairs);\n+\n+\t/* configure qp */\n+\tts_params->qp_conf.nb_descriptors = DEFAULT_NUM_OPS_INFLIGHT;\n+\tfor (qp_id = 0; qp_id < info.max_nb_queue_pairs; qp_id++) {\n+\t\tTEST_ASSERT_SUCCESS(rte_cryptodev_queue_pair_setup(\n+\t\t\tdev_id, qp_id, &ts_params->qp_conf,\n+\t\t\trte_cryptodev_socket_id(dev_id),\n+\t\t\tts_params->session_mpool),\n+\t\t\t\"Failed to setup queue pair %u on cryptodev %u ASYM\",\n+\t\t\tqp_id, dev_id);\n+\t}\n+\n+\t/* setup asym session pool */\n+\tunsigned int session_size =\n+\t\trte_cryptodev_asym_get_private_session_size(dev_id);\n+\t/*\n+\t * Create mempool with TEST_NUM_SESSIONS * 2,\n+\t * to include the session headers\n+\t */\n+\tts_params->session_mpool = rte_mempool_create(\n+\t\t\t\t\"test_asym_sess_mp\",\n+\t\t\t\tTEST_NUM_SESSIONS * 2,\n+\t\t\t\tsession_size,\n+\t\t\t\t0, 0, NULL, NULL, NULL,\n+\t\t\t\tNULL, SOCKET_ID_ANY,\n+\t\t\t\t0);\n+\n+\tTEST_ASSERT_NOT_NULL(ts_params->session_mpool,\n+\t\t\t\"session mempool allocation failed\");\n+\n+\treturn TEST_SUCCESS;\n+}\n+\n+static void\n+testsuite_teardown(void)\n+{\n+\tstruct crypto_testsuite_params *ts_params = &testsuite_params;\n+\n+\tif (ts_params->op_mpool != NULL) {\n+\t\tRTE_LOG(DEBUG, USER1, \"CRYPTO_OP_POOL count %u\\n\",\n+\t\trte_mempool_avail_count(ts_params->op_mpool));\n+\t}\n+\n+\t/* Free session mempools */\n+\tif (ts_params->session_mpool != NULL) {\n+\t\trte_mempool_free(ts_params->session_mpool);\n+\t\tts_params->session_mpool = NULL;\n+\t}\n+}\n+\n+static int\n+ut_setup(void)\n+{\n+\tstruct crypto_testsuite_params *ts_params = &testsuite_params;\n+\n+\tuint16_t qp_id;\n+\n+\t/* Reconfigure device to default parameters */\n+\tts_params->conf.socket_id = SOCKET_ID_ANY;\n+\n+\tTEST_ASSERT_SUCCESS(rte_cryptodev_configure(ts_params->valid_devs[0],\n+\t\t\t&ts_params->conf),\n+\t\t\t\"Failed to configure cryptodev %u\",\n+\t\t\tts_params->valid_devs[0]);\n+\n+\tfor (qp_id = 0; qp_id < ts_params->conf.nb_queue_pairs ; qp_id++) {\n+\t\tTEST_ASSERT_SUCCESS(rte_cryptodev_queue_pair_setup(\n+\t\t\tts_params->valid_devs[0], qp_id,\n+\t\t\t&ts_params->qp_conf,\n+\t\t\trte_cryptodev_socket_id(ts_params->valid_devs[0]),\n+\t\t\tts_params->session_mpool),\n+\t\t\t\"Failed to setup queue pair %u on cryptodev %u\",\n+\t\t\tqp_id, ts_params->valid_devs[0]);\n+\t}\n+\n+\trte_cryptodev_stats_reset(ts_params->valid_devs[0]);\n+\n+\t/* Start the device */\n+\tTEST_ASSERT_SUCCESS(rte_cryptodev_start(ts_params->valid_devs[0]),\n+\t\t\t\t\t\t\"Failed to start cryptodev %u\",\n+\t\t\t\t\t\tts_params->valid_devs[0]);\n+\n+\treturn TEST_SUCCESS;\n+}\n+\n+static void\n+ut_teardown(void)\n+{\n+\tstruct crypto_testsuite_params *ts_params = &testsuite_params;\n+\tstruct rte_cryptodev_stats stats;\n+\n+\trte_cryptodev_stats_get(ts_params->valid_devs[0], &stats);\n+\n+\t/* Stop the device */\n+\trte_cryptodev_stop(ts_params->valid_devs[0]);\n+}\n+\n+static inline void print_asym_capa(\n+\t\tconst struct rte_cryptodev_asymmetric_xform_capability *capa)\n+{\n+\tint i = 0;\n+\n+\tprintf(\"\\nxform type: %s\\n===================\\n\",\n+\t\t\trte_crypto_asym_xform_strings[capa->xform_type]);\n+\tprintf(\"operation supported -\");\n+\n+\tfor (i = 0; i < RTE_CRYPTO_ASYM_OP_LIST_END; i++) {\n+\t\t/* check supported operations */\n+\t\tif (rte_cryptodev_asym_xform_capability_check_optype(capa, i))\n+\t\t\tprintf(\" %s\",\n+\t\t\t\t\trte_crypto_asym_op_strings[i]);\n+\t\t}\n+\t\tswitch (capa->xform_type) {\n+\t\tcase RTE_CRYPTO_ASYM_XFORM_RSA:\n+\t\tcase RTE_CRYPTO_ASYM_XFORM_MODINV:\n+\t\tcase RTE_CRYPTO_ASYM_XFORM_MODEX:\n+\t\tcase RTE_CRYPTO_ASYM_XFORM_DH:\n+\t\tcase RTE_CRYPTO_ASYM_XFORM_DSA:\n+\t\t\tprintf(\" modlen: min %d max %d increment %d\\n\",\n+\t\t\t\t\tcapa->modlen.min,\n+\t\t\t\t\tcapa->modlen.max,\n+\t\t\t\t\tcapa->modlen.increment);\n+\t\tbreak;\n+\t\tdefault:\n+\t\t\tbreak;\n+\t\t}\n+}\n+\n+static int\n+test_capability(void)\n+{\n+\tstruct crypto_testsuite_params *ts_params = &testsuite_params;\n+\tuint8_t dev_id = ts_params->valid_devs[0];\n+\tstruct rte_cryptodev_info dev_info;\n+\tconst struct rte_cryptodev_capabilities *dev_capa;\n+\tint i = 0;\n+\tstruct rte_cryptodev_asym_capability_idx idx;\n+\tconst struct rte_cryptodev_asymmetric_xform_capability *capa;\n+\n+\trte_cryptodev_info_get(dev_id, &dev_info);\n+\tif (!(dev_info.feature_flags &\n+\t\t\t\tRTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO)) {\n+\t\tRTE_LOG(INFO, USER1,\n+\t\t\t\t\"Device doesn't support asymmetric. Test Skipped\\n\");\n+\t\treturn TEST_SUCCESS;\n+\t}\n+\n+\t/* print xfrm capability */\n+\tfor (i = 0;\n+\t\tdev_info.capabilities[i].op != RTE_CRYPTO_OP_TYPE_UNDEFINED;\n+\t\ti++) {\n+\t\tdev_capa = &(dev_info.capabilities[i]);\n+\t\tif (dev_info.capabilities[i].op ==\n+\t\t\t\tRTE_CRYPTO_OP_TYPE_ASYMMETRIC) {\n+\t\t\tidx.type = dev_capa->asym.xform_capa.xform_type;\n+\n+\t\t\tcapa = rte_cryptodev_asym_capability_get(dev_id,\n+\t\t\t\t(const struct\n+\t\t\t\trte_cryptodev_asym_capability_idx *) &idx);\n+\t\t\tprint_asym_capa(capa);\n+\t\t\t}\n+\t}\n+\treturn TEST_SUCCESS;\n+}\n+\n+static int\n+test_mod_inv(void)\n+{\n+\tstruct crypto_testsuite_params *ts_params = &testsuite_params;\n+\tstruct rte_mempool *op_mpool = ts_params->op_mpool;\n+\tstruct rte_mempool *sess_mpool = ts_params->session_mpool;\n+\tuint8_t dev_id = ts_params->valid_devs[0];\n+\tstruct rte_crypto_asym_op *asym_op = NULL;\n+\tstruct rte_crypto_op *op = NULL, *result_op = NULL;\n+\tstruct rte_cryptodev_asym_session *sess = NULL;\n+\tint status = TEST_SUCCESS;\n+\tchar test_msg[ASYM_TEST_MSG_LEN + 1];\n+\tstruct rte_cryptodev_asym_capability_idx cap_idx;\n+\tconst struct rte_cryptodev_asymmetric_xform_capability *capability;\n+\tuint8_t input[TEST_DATA_SIZE] = {0};\n+\tint ret = 0;\n+\n+\tif (rte_cryptodev_asym_get_xform_enum(\n+\t\t&modinv_xform.xform_type, \"modinv\") < 0) {\n+\t\tsnprintf(test_msg,\n+\t\t\t\t ASYM_TEST_MSG_LEN,\n+\t\t\t\t \"Invalid ASYNC algorithm specified\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tcap_idx.type = modinv_xform.xform_type;\n+\tcapability = rte_cryptodev_asym_capability_get(dev_id,\n+\t\t\t\t\t&cap_idx);\n+\n+\tif (rte_cryptodev_asym_xform_capability_check_modlen(\n+\t\tcapability,\n+\t\tmodinv_xform.modinv.modulus.length)) {\n+\t\tsnprintf(test_msg,\n+\t\t\t\t ASYM_TEST_MSG_LEN,\n+\t\t\t\t \"Invalid MODULOUS length specified\\n\");\n+\t\t\t\treturn -1;\n+\t\t}\n+\n+\tsess = rte_cryptodev_asym_session_create(sess_mpool);\n+\tif (!sess) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN, \"line %u \"\n+\t\t\t\t\"FAILED: %s\", __LINE__,\n+\t\t\t\t\"Session creation failed\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\tif (rte_cryptodev_asym_session_init(dev_id, sess, &modinv_xform,\n+\t\t\tsess_mpool) < 0) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__, \"unabled to config sym session\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\t/* generate crypto op data structure */\n+\top = rte_crypto_op_alloc(op_mpool, RTE_CRYPTO_OP_TYPE_ASYMMETRIC);\n+\tif (!op) {\n+\t\tsnprintf(test_msg,\n+\t\t\tASYM_TEST_MSG_LEN,\n+\t\t\t\"line %u FAILED: %s\",\n+\t\t\t__LINE__, \"Failed to allocate asymmetric crypto \"\n+\t\t\t\"operation struct\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\tasym_op = op->asym;\n+\tmemcpy(input, base, sizeof(base));\n+\tasym_op->modinv.base.data = input;\n+\tasym_op->modinv.base.length = sizeof(base);\n+\n+\t/* attach asymmetric crypto session to crypto operations */\n+\trte_crypto_op_attach_asym_session(op, sess);\n+\n+\tsnprintf(test_msg, ASYM_TEST_MSG_LEN, \"Process ASYM operation\");\n+\n+\t/* Process crypto operation */\n+\tif (rte_cryptodev_enqueue_burst(dev_id, 0, &op, 1) != 1) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN,\n+\t\t\t\"line %u FAILED: %s\",\n+\t\t\t__LINE__, \"Error sending packet for operation\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\twhile (rte_cryptodev_dequeue_burst(dev_id, 0, &result_op, 1) == 0)\n+\t\trte_pause();\n+\n+\tif (result_op == NULL) {\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__, \"Failed to process asym crypto op\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\tsnprintf(test_msg,\n+\t\t\tASYM_TEST_MSG_LEN,\n+\t\t\t\"Modinv :%s length:%lu\\n\",\n+\t\t\tasym_op->modinv.base.data,\n+\t\t\tasym_op->modinv.base.length);\n+\n+\tret = verify_modinv(mod_inv, result_op);\n+\tif (ret) {\n+\t\tsnprintf(test_msg,\n+\t\t\t ASYM_TEST_MSG_LEN,\n+\t\t\t \"operation verification failed\\n\");\n+\t\tstatus = TEST_FAILED;\n+\t}\n+\n+error_exit:\n+\tif (sess) {\n+\t\trte_cryptodev_asym_session_clear(dev_id, sess);\n+\t\trte_cryptodev_asym_session_free(sess);\n+\t}\n+\n+\tif (op)\n+\t\trte_crypto_op_free(op);\n+\n+\tif (status == TEST_SUCCESS)\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN, \"PASS\");\n+\telse\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN, \"FAILED\");\n+\n+\treturn status;\n+}\n+\n+static int\n+test_mod_exp(void)\n+{\n+\tstruct crypto_testsuite_params *ts_params = &testsuite_params;\n+\tstruct rte_mempool *op_mpool = ts_params->op_mpool;\n+\tstruct rte_mempool *sess_mpool = ts_params->session_mpool;\n+\tuint8_t dev_id = ts_params->valid_devs[0];\n+\tstruct rte_crypto_asym_op *asym_op = NULL;\n+\tstruct rte_crypto_op *op = NULL, *result_op = NULL;\n+\tstruct rte_cryptodev_asym_session *sess = NULL;\n+\tint status = TEST_SUCCESS;\n+\tchar test_msg[ASYM_TEST_MSG_LEN + 1];\n+\tstruct rte_cryptodev_asym_capability_idx cap_idx;\n+\tconst struct rte_cryptodev_asymmetric_xform_capability *capability;\n+\tuint8_t input[TEST_DATA_SIZE] = {0};\n+\tint ret = 0;\n+\n+\tif (rte_cryptodev_asym_get_xform_enum(&modex_xform.xform_type,\n+\t\t\"modexp\")\n+\t\t< 0) {\n+\t\tsnprintf(test_msg,\n+\t\t\t\tASYM_TEST_MSG_LEN,\n+\t\t\t\t\"Invalid ASYNC algorithm specified\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\t/* check for modlen capability */\n+\tcap_idx.type = modex_xform.xform_type;\n+\tcapability = rte_cryptodev_asym_capability_get(dev_id, &cap_idx);\n+\n+\tif (rte_cryptodev_asym_xform_capability_check_modlen(\n+\t\t\tcapability, modex_xform.modex.modulus.length)) {\n+\t\tsnprintf(test_msg,\n+\t\t\t\tASYM_TEST_MSG_LEN,\n+\t\t\t\t\"Invalid MODULOUS length specified\\n\");\n+\t\t\t\treturn -1;\n+\t\t}\n+\n+\t/* generate crypto op data structure */\n+\top = rte_crypto_op_alloc(op_mpool, RTE_CRYPTO_OP_TYPE_ASYMMETRIC);\n+\tif (!op) {\n+\t\tsnprintf(test_msg,\n+\t\t\tASYM_TEST_MSG_LEN,\n+\t\t\t\"line %u FAILED: %s\",\n+\t\t\t__LINE__, \"Failed to allocate asymmetric crypto \"\n+\t\t\t\"operation struct\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\tsess = rte_cryptodev_asym_session_create(sess_mpool);\n+\tif (!sess) {\n+\t\tsnprintf(test_msg,\n+\t\t\t\t ASYM_TEST_MSG_LEN,\n+\t\t\t\t \"line %u \"\n+\t\t\t\t\"FAILED: %s\", __LINE__,\n+\t\t\t\t\"Session creation failed\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\tif (rte_cryptodev_asym_session_init(dev_id, sess, &modex_xform,\n+\t\t\tsess_mpool) < 0) {\n+\t\tsnprintf(test_msg,\n+\t\t\t\t ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__, \"unabled to config sym session\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\tasym_op = op->asym;\n+\tmemcpy(input, base, sizeof(base));\n+\tasym_op->modex.base.data = input;\n+\tasym_op->modex.base.length = sizeof(base);\n+\t/* attach asymmetric crypto session to crypto operations */\n+\trte_crypto_op_attach_asym_session(op, sess);\n+\n+\tsnprintf(test_msg, ASYM_TEST_MSG_LEN, \"Process ASYM operation\");\n+\t/* Process crypto operation */\n+\tif (rte_cryptodev_enqueue_burst(dev_id, 0, &op, 1) != 1) {\n+\t\tsnprintf(test_msg,\n+\t\t\t\t ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__, \"Error sending packet for operation\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\twhile (rte_cryptodev_dequeue_burst(dev_id, 0, &result_op, 1) == 0)\n+\t\trte_pause();\n+\n+\tif (result_op == NULL) {\n+\t\tsnprintf(test_msg,\n+\t\t\t\t ASYM_TEST_MSG_LEN,\n+\t\t\t\t\"line %u FAILED: %s\",\n+\t\t\t\t__LINE__, \"Failed to process asym crypto op\");\n+\t\tstatus = TEST_FAILED;\n+\t\tgoto error_exit;\n+\t}\n+\n+\tret = verify_modexp(mod_exp, result_op);\n+\tif (ret) {\n+\t\tsnprintf(test_msg,\n+\t\t\t ASYM_TEST_MSG_LEN,\n+\t\t\t \"operation verification failed\\n\");\n+\t\tstatus = TEST_FAILED;\n+\t}\n+\n+error_exit:\n+\tif (sess != NULL) {\n+\t\trte_cryptodev_asym_session_clear(dev_id, sess);\n+\t\trte_cryptodev_asym_session_free(sess);\n+\t}\n+\n+\tif (op != NULL)\n+\t\trte_crypto_op_free(op);\n+\n+\tif (status == TEST_SUCCESS)\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN, \"PASS\");\n+\telse\n+\t\tsnprintf(test_msg, ASYM_TEST_MSG_LEN, \"FAILED\");\n+\n+\treturn status;\n+}\n+\n+static struct unit_test_suite cryptodev_openssl_asym_testsuite  = {\n+\t.suite_name = \"Crypto Device OPENSSL ASYM Unit Test Suite\",\n+\t.setup = testsuite_setup,\n+\t.teardown = testsuite_teardown,\n+\t.unit_test_cases = {\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown, test_capability),\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown, test_rsa_enc_dec),\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown, test_rsa_sign_verify),\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown, test_mod_inv),\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown, test_mod_exp),\n+\t\tTEST_CASES_END() /**< NULL terminate unit test array */\n+\t}\n+};\n+\n+static int\n+test_cryptodev_openssl_asym(void)\n+{\n+\tgbl_driver_id = rte_cryptodev_driver_id_get(\n+\t\t\tRTE_STR(CRYPTODEV_NAME_OPENSSL_PMD));\n+\n+\tif (gbl_driver_id == -1) {\n+\t\tRTE_LOG(ERR, USER1, \"OPENSSL PMD must be loaded. Check if \"\n+\t\t\t\t\"CONFIG_RTE_LIBRTE_PMD_OPENSSL is enabled \"\n+\t\t\t\t\"in config file to run this testsuite.\\n\");\n+\t\treturn TEST_FAILED;\n+\t}\n+\n+\treturn unit_test_suite_runner(&cryptodev_openssl_asym_testsuite);\n+}\n+\n+REGISTER_TEST_COMMAND(cryptodev_openssl_asym_autotest,\n+\t\t\t\t\t  test_cryptodev_openssl_asym);\ndiff --git a/test/test/test_cryptodev_asym_util.h b/test/test/test_cryptodev_asym_util.h\nnew file mode 100644\nindex 0000000..9aac2a3\n--- /dev/null\n+++ b/test/test/test_cryptodev_asym_util.h\n@@ -0,0 +1,45 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Cavium Networks\n+ */\n+\n+#ifndef TEST_CRYPTODEV_ASYM_TEST_UTIL_H__\n+#define TEST_CRYPTODEV_ASYM_TEST_UTIL_H__\n+\n+/* Below Apis compare resulted buffer to original test vector */\n+\n+static inline int rsa_verify(struct rsa_test_data *rsa_param,\n+\t\tstruct rte_crypto_op *result_op)\n+{\n+\tint ret = 0;\n+\tif (memcmp(rsa_param->data,\n+\t\t\t\tresult_op->asym->rsa.message.data,\n+\t\t\t\tresult_op->asym->rsa.message.length))\n+\t\tret = -1;\n+\treturn ret;\n+}\n+\n+static inline int verify_modinv(uint8_t *mod_inv,\n+\t\tstruct rte_crypto_op *result_op)\n+{\n+\tint ret = 0;\n+\tif (memcmp(mod_inv, result_op->asym->modinv.base.data,\n+\t\t\t\tresult_op->asym->modinv.base.length))\n+\t\tret = -1;\n+\treturn ret;\n+}\n+\n+static inline int verify_modexp(uint8_t *mod_exp,\n+\t\tstruct rte_crypto_op *result_op)\n+{\n+\tint ret = 0;\n+\tif (memcmp(mod_exp, result_op->asym->modex.base.data,\n+\t\t\t\tresult_op->asym->modex.base.length))\n+\t\tret = -1;\n+\treturn ret;\n+}\n+\n+#endif /* TEST_CRYPTODEV_ASYM_TEST_UTIL_H__ */\n+\n+\n+\n+\ndiff --git a/test/test/test_cryptodev_mod_test_vectors.h b/test/test/test_cryptodev_mod_test_vectors.h\nnew file mode 100644\nindex 0000000..a25c676\n--- /dev/null\n+++ b/test/test/test_cryptodev_mod_test_vectors.h\n@@ -0,0 +1,103 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Cavium Networks\n+ */\n+\n+#ifndef TEST_CRYPTODEV_MOD_TEST_VECTORS_H_\n+#define TEST_CRYPTODEV_MOD_TEST_VECTORS_H_\n+\n+/* modular operation test data */\n+uint8_t base[] = {\n+\t0xF8, 0xBA, 0x1A, 0x55, 0xD0, 0x2F, 0x85,\n+\t0xAE, 0x96, 0x7B, 0xB6, 0x2F, 0xB6, 0xCD,\n+\t0xA8, 0xEB, 0x7E, 0x78, 0xA0, 0x50\n+};\n+\n+uint8_t mod_p[] = {\n+\t0x00, 0xb3, 0xa1, 0xaf, 0xb7, 0x13, 0x08, 0x00,\n+\t0x0a, 0x35, 0xdc, 0x2b, 0x20, 0x8d, 0xa1, 0xb5,\n+\t0xce, 0x47, 0x8a, 0xc3, 0x80, 0xf4, 0x7d, 0x4a,\n+\t0xa2, 0x62, 0xfd, 0x61, 0x7f, 0xb5, 0xa8, 0xde,\n+\t0x0a, 0x17, 0x97, 0xa0, 0xbf, 0xdf, 0x56, 0x5a,\n+\t0x3d, 0x51, 0x56, 0x4f, 0x70, 0x70, 0x3f, 0x63,\n+\t0x6a, 0x44, 0x5b, 0xad, 0x84, 0x0d, 0x3f, 0x27,\n+\t0x6e, 0x3b, 0x34, 0x91, 0x60, 0x14, 0xb9, 0xaa,\n+\t0x72, 0xfd, 0xa3, 0x64, 0xd2, 0x03, 0xa7, 0x53,\n+\t0x87, 0x9e, 0x88, 0x0b, 0xc1, 0x14, 0x93, 0x1a,\n+\t0x62, 0xff, 0xb1, 0x5d, 0x74, 0xcd, 0x59, 0x63,\n+\t0x18, 0x11, 0x3d, 0x4f, 0xba, 0x75, 0xd4, 0x33,\n+\t0x4e, 0x23, 0x6b, 0x7b, 0x57, 0x44, 0xe1, 0xd3,\n+\t0x03, 0x13, 0xa6, 0xf0, 0x8b, 0x60, 0xb0, 0x9e,\n+\t0xee, 0x75, 0x08, 0x9d, 0x71, 0x63, 0x13, 0xcb,\n+\t0xa6, 0x81, 0x92, 0x14, 0x03, 0x22, 0x2d, 0xde,\n+\t0x55\n+};\n+\n+uint8_t mod_e[] = {0x01, 0x00, 0x01};\n+\n+/* Precomputed modular exponentiation for verification */\n+uint8_t mod_exp[] = {\n+\t0x2C, 0x60, 0x75, 0x45, 0x98, 0x9D, 0xE0, 0x72,\n+\t0xA0, 0x9D, 0x3A, 0x9E, 0x03, 0x38, 0x73, 0x3C,\n+\t0x31, 0x83, 0x04, 0xFE, 0x75, 0x43, 0xE6, 0x17,\n+\t0x5C, 0x01, 0x29, 0x51, 0x69, 0x33, 0x62, 0x2D,\n+\t0x78, 0xBE, 0xAE, 0xC4, 0xBC, 0xDE, 0x7E, 0x2C,\n+\t0x77, 0x84, 0xF2, 0xC5, 0x14, 0xB5, 0x2F, 0xF7,\n+\t0xC5, 0x94, 0xEF, 0x86, 0x75, 0x75, 0xB5, 0x11,\n+\t0xE5, 0x0E, 0x0A, 0x29, 0x76, 0xE2, 0xEA, 0x32,\n+\t0x0E, 0x43, 0x77, 0x7E, 0x2C, 0x27, 0xAC, 0x3B,\n+\t0x86, 0xA5, 0xDB, 0xC9, 0x48, 0x40, 0xE8, 0x99,\n+\t0x9A, 0x0A, 0x3D, 0xD6, 0x74, 0xFA, 0x2E, 0x2E,\n+\t0x5B, 0xAF, 0x8C, 0x99, 0x44, 0x2A, 0x67, 0x38,\n+\t0x27, 0x41, 0x59, 0x9D, 0xB8, 0x51, 0xC9, 0xF7,\n+\t0x43, 0x61, 0x31, 0x6E, 0xF1, 0x25, 0x38, 0x7F,\n+\t0xAE, 0xC6, 0xD0, 0xBB, 0x29, 0x76, 0x3F, 0x46,\n+\t0x2E, 0x1B, 0xE4, 0x67, 0x71, 0xE3, 0x87, 0x5A\n+};\n+\n+/* Precomputed modular inverse for verification */\n+uint8_t mod_inv[] = {\n+\t0x52, 0xb1, 0xa3, 0x8c, 0xc5, 0x8a, 0xb9, 0x1f,\n+\t0xb6, 0x82, 0xf5, 0x6a, 0x9a, 0xde, 0x8d, 0x2e,\n+\t0x62, 0x4b, 0xac, 0x49, 0x21, 0x1d, 0x30, 0x4d,\n+\t0x32, 0xac, 0x1f, 0x40, 0x6d, 0x52, 0xc7, 0x9b,\n+\t0x6c, 0x0a, 0x82, 0x3a, 0x2c, 0xaf, 0x6b, 0x6d,\n+\t0x17, 0xbe, 0x43, 0xed, 0x97, 0x78, 0xeb, 0x4c,\n+\t0x92, 0x6f, 0xcf, 0xed, 0xb1, 0x09, 0xcb, 0x27,\n+\t0xc2, 0xde, 0x62, 0xfd, 0x21, 0xe6, 0xbd, 0x4f,\n+\t0xfe, 0x7a, 0x1b, 0x50, 0xfe, 0x10, 0x4a, 0xb0,\n+\t0xb7, 0xcf, 0xdb, 0x7d, 0xca, 0xc2, 0xf0, 0x1c,\n+\t0x39, 0x48, 0x6a, 0xb5, 0x4d, 0x8c, 0xfe, 0x63,\n+\t0x91, 0x9c, 0x21, 0xc3, 0x0e, 0x76, 0xad, 0x44,\n+\t0x8d, 0x54, 0x33, 0x99, 0xe1, 0x80, 0x19, 0xba,\n+\t0xb5, 0xac, 0x7d, 0x9c, 0xce, 0x91, 0x2a, 0xd9,\n+\t0x2c, 0xe1, 0x16, 0xd6, 0xd7, 0xcf, 0x9d, 0x05,\n+\t0x9a, 0x66, 0x9a, 0x3a, 0xc1, 0xb8, 0x4b, 0xc3\n+};\n+\n+struct rte_crypto_asym_xform modex_xform = {\n+\t.next = NULL,\n+\t.xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX,\n+\t.modex = {\n+\t\t.modulus = {\n+\t\t\t.data = mod_p,\n+\t\t\t.length = sizeof(mod_p)\n+\t\t},\n+\t\t.exponent = {\n+\t\t\t.data = mod_e,\n+\t\t\t.length = sizeof(mod_e)\n+\t\t}\n+\t}\n+};\n+\n+struct rte_crypto_asym_xform modinv_xform = {\n+\t.next = NULL,\n+\t.xform_type = RTE_CRYPTO_ASYM_XFORM_MODINV,\n+\t.modinv = {\n+\t\t.modulus = {\n+\t\t\t.data = mod_p,\n+\t\t\t.length = sizeof(mod_p)\n+\t\t}\n+\t}\n+};\n+\n+#endif /* TEST_CRYPTODEV_MOD_TEST_VECTORS_H__ */\ndiff --git a/test/test/test_cryptodev_rsa_test_vectors.h b/test/test/test_cryptodev_rsa_test_vectors.h\nnew file mode 100644\nindex 0000000..1de3e2c\n--- /dev/null\n+++ b/test/test/test_cryptodev_rsa_test_vectors.h\n@@ -0,0 +1,90 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018 Cavium Networks\n+ */\n+\n+#ifndef TEST_CRYPTODEV_RSA_TEST_VECTORS_H__\n+#define TEST_CRYPTODEV_RSA_TEST_VECTORS_H__\n+\n+#include \"rte_crypto_asym.h\"\n+\n+#define TEST_DATA_SIZE 4096\n+\n+struct rsa_test_data {\n+\tuint8_t data[TEST_DATA_SIZE];\n+\tunsigned int len;\n+};\n+\n+struct rsa_test_data rsaplaintext = {\n+\t.data = {\n+\t\t0xf8, 0xba, 0x1a, 0x55, 0xd0, 0x2f, 0x85, 0xae,\n+\t\t0x96, 0x7b, 0xb6, 0x2f, 0xb6, 0xcd, 0xa8, 0xeb,\n+\t\t0x7e, 0x78, 0xa0, 0x50\n+\t},\n+\t.len = 20\n+};\n+\n+uint8_t rsa_n[] = {\n+\t0xb3, 0xa1, 0xaf, 0xb7, 0x13, 0x08, 0x00,\n+\t0x0a, 0x35, 0xdc, 0x2b, 0x20, 0x8d, 0xa1, 0xb5,\n+\t0xce, 0x47, 0x8a, 0xc3, 0x80, 0xf4, 0x7d, 0x4a,\n+\t0xa2, 0x62, 0xfd, 0x61, 0x7f, 0xb5, 0xa8, 0xde,\n+\t0x0a, 0x17, 0x97, 0xa0, 0xbf, 0xdf, 0x56, 0x5a,\n+\t0x3d, 0x51, 0x56, 0x4f, 0x70, 0x70, 0x3f, 0x63,\n+\t0x6a, 0x44, 0x5b, 0xad, 0x84, 0x0d, 0x3f, 0x27,\n+\t0x6e, 0x3b, 0x34, 0x91, 0x60, 0x14, 0xb9, 0xaa,\n+\t0x72, 0xfd, 0xa3, 0x64, 0xd2, 0x03, 0xa7, 0x53,\n+\t0x87, 0x9e, 0x88, 0x0b, 0xc1, 0x14, 0x93, 0x1a,\n+\t0x62, 0xff, 0xb1, 0x5d, 0x74, 0xcd, 0x59, 0x63,\n+\t0x18, 0x11, 0x3d, 0x4f, 0xba, 0x75, 0xd4, 0x33,\n+\t0x4e, 0x23, 0x6b, 0x7b, 0x57, 0x44, 0xe1, 0xd3,\n+\t0x03, 0x13, 0xa6, 0xf0, 0x8b, 0x60, 0xb0, 0x9e,\n+\t0xee, 0x75, 0x08, 0x9d, 0x71, 0x63, 0x13, 0xcb,\n+\t0xa6, 0x81, 0x92, 0x14, 0x03, 0x22, 0x2d, 0xde,\n+\t0x55\n+};\n+\n+uint8_t rsa_d[] = {\n+\t0x24, 0xd7, 0xea, 0xf4, 0x7f, 0xe0, 0xca, 0x31,\n+\t0x4d, 0xee, 0xc4, 0xa1, 0xbe, 0xab, 0x06, 0x61,\n+\t0x32, 0xe7, 0x51, 0x46, 0x27, 0xdf, 0x72, 0xe9,\n+\t0x6f, 0xa8, 0x4c, 0xd1, 0x26, 0xef, 0x65, 0xeb,\n+\t0x67, 0xff, 0x5f, 0xa7, 0x3b, 0x25, 0xb9, 0x08,\n+\t0x8e, 0xa0, 0x47, 0x56, 0xe6, 0x8e, 0xf9, 0xd3,\n+\t0x18, 0x06, 0x3d, 0xc6, 0xb1, 0xf8, 0xdc, 0x1b,\n+\t0x8d, 0xe5, 0x30, 0x54, 0x26, 0xac, 0x16, 0x3b,\n+\t0x7b, 0xad, 0x46, 0x9e, 0x21, 0x6a, 0x57, 0xe6,\n+\t0x81, 0x56, 0x1d, 0x2a, 0xc4, 0x39, 0x63, 0x67,\n+\t0x81, 0x2c, 0xca, 0xcc, 0xf8, 0x42, 0x04, 0xbe,\n+\t0xcf, 0x8f, 0x6c, 0x5b, 0x81, 0x46, 0xb9, 0xc7,\n+\t0x62, 0x90, 0x87, 0x35, 0x03, 0x9b, 0x89, 0xcb,\n+\t0x37, 0xbd, 0xf1, 0x1b, 0x99, 0xa1, 0x9a, 0x78,\n+\t0xd5, 0x4c, 0xdd, 0x3f, 0x41, 0x0c, 0xb7, 0x1a,\n+\t0xd9, 0x7b, 0x87, 0x5f, 0xbe, 0xb1, 0x83, 0x41\n+};\n+\n+uint8_t rsa_e[] = {0x01, 0x00, 0x01};\n+\n+/** rsa xform using exponent key */\n+struct rte_crypto_asym_xform rsa_xform = {\n+\t.next = NULL,\n+\t.xform_type = RTE_CRYPTO_ASYM_XFORM_RSA,\n+\t.rsa = {\n+\t\t.n = {\n+\t\t\t.data = rsa_n,\n+\t\t\t.length = sizeof(rsa_n)\n+\t\t},\n+\t\t.e = {\n+\t\t\t.data = rsa_e,\n+\t\t\t.length = sizeof(rsa_e)\n+\t\t},\n+\t\t.key_type = RTE_RSA_KEY_TYPE_EXP,\n+\t\t{\n+\t\t\t.d = {\n+\t\t\t\t.data = rsa_d,\n+\t\t\t\t.length = sizeof(rsa_d)\n+\t\t\t},\n+\t\t}\n+\t}\n+};\n+\n+#endif /* TEST_CRYPTODEV_RSA_TEST_VECTORS_H__ */\n",
    "prefixes": [
        "v4",
        "1/2"
    ]
}