Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/4047/?format=api
http://patches.dpdk.org/api/patches/4047/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1426698495-5322-1-git-send-email-konstantin.ananyev@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1426698495-5322-1-git-send-email-konstantin.ananyev@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1426698495-5322-1-git-send-email-konstantin.ananyev@intel.com", "date": "2015-03-18T17:08:15", "name": "[dpdk-dev,PATCHv2] EAL: rename rte_common_vect.h into arch/x86/rte_vect.h", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "5498fcd0199a5bdcac6b574be18283274665e8a2", "submitter": { "id": 33, "url": "http://patches.dpdk.org/api/people/33/?format=api", "name": "Ananyev, Konstantin", "email": "konstantin.ananyev@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1426698495-5322-1-git-send-email-konstantin.ananyev@intel.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/4047/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/4047/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 13D27592B;\n\tWed, 18 Mar 2015 18:08:29 +0100 (CET)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id DBB8111A2\n\tfor <dev@dpdk.org>; Wed, 18 Mar 2015 18:08:26 +0100 (CET)", "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga102.jf.intel.com with ESMTP; 18 Mar 2015 10:08:24 -0700", "from irvmail001.ir.intel.com ([163.33.26.43])\n\tby orsmga001.jf.intel.com with ESMTP; 18 Mar 2015 10:08:23 -0700", "from sivswdev02.ir.intel.com (sivswdev02.ir.intel.com\n\t[10.237.217.46])\n\tby irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id\n\tt2IH8Mwc025289; Wed, 18 Mar 2015 17:08:22 GMT", "from sivswdev02.ir.intel.com (localhost [127.0.0.1])\n\tby sivswdev02.ir.intel.com with ESMTP id t2IH8MOH005519;\n\tWed, 18 Mar 2015 17:08:22 GMT", "(from kananye1@localhost)\n\tby sivswdev02.ir.intel.com with id t2IH8MXl005515;\n\tWed, 18 Mar 2015 17:08:22 GMT" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.11,423,1422950400\"; d=\"scan'208\";a=\"667057151\"", "From": "Konstantin Ananyev <konstantin.ananyev@intel.com>", "To": "dev@dpdk.org", "Date": "Wed, 18 Mar 2015 17:08:15 +0000", "Message-Id": "<1426698495-5322-1-git-send-email-konstantin.ananyev@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "Subject": "[dpdk-dev] [PATCHv2] EAL: rename rte_common_vect.h into\n\tarch/x86/rte_vect.h", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>\n---\n examples/l3fwd/main.c | 2 +-\n lib/librte_acl/rte_acl_osdep.h | 2 +-\n lib/librte_eal/common/Makefile | 1 -\n .../common/include/arch/x86/rte_memcpy.h | 2 +-\n lib/librte_eal/common/include/arch/x86/rte_vect.h | 128 +++++++++++++++++++++\n lib/librte_eal/common/include/rte_common_vect.h | 128 ---------------------\n lib/librte_lpm/rte_lpm.h | 2 +-\n 7 files changed, 132 insertions(+), 133 deletions(-)\n create mode 100644 lib/librte_eal/common/include/arch/x86/rte_vect.h\n delete mode 100644 lib/librte_eal/common/include/rte_common_vect.h", "diff": "diff --git a/examples/l3fwd/main.c b/examples/l3fwd/main.c\nindex 3edb250..90e177f 100644\n--- a/examples/l3fwd/main.c\n+++ b/examples/l3fwd/main.c\n@@ -43,7 +43,7 @@\n #include <getopt.h>\n \n #include <rte_common.h>\n-#include <rte_common_vect.h>\n+#include <rte_vect.h>\n #include <rte_byteorder.h>\n #include <rte_log.h>\n #include <rte_memory.h>\ndiff --git a/lib/librte_acl/rte_acl_osdep.h b/lib/librte_acl/rte_acl_osdep.h\nindex 6287c84..81fdefb 100644\n--- a/lib/librte_acl/rte_acl_osdep.h\n+++ b/lib/librte_acl/rte_acl_osdep.h\n@@ -61,7 +61,7 @@\n #define DIM(x) RTE_DIM(x)\n \n #include <rte_common.h>\n-#include <rte_common_vect.h>\n+#include <rte_vect.h>\n #include <rte_memory.h>\n #include <rte_log.h>\n #include <rte_memcpy.h>\ndiff --git a/lib/librte_eal/common/Makefile b/lib/librte_eal/common/Makefile\nindex cf961a7..3ea3bbf 100644\n--- a/lib/librte_eal/common/Makefile\n+++ b/lib/librte_eal/common/Makefile\n@@ -39,7 +39,6 @@ INC += rte_rwlock.h rte_tailq.h rte_interrupts.h rte_alarm.h\n INC += rte_string_fns.h rte_version.h\n INC += rte_eal_memconfig.h rte_malloc_heap.h\n INC += rte_hexdump.h rte_devargs.h rte_dev.h\n-INC += rte_common_vect.h\n INC += rte_pci_dev_feature_defs.h rte_pci_dev_features.h\n \n ifeq ($(CONFIG_RTE_INSECURE_FUNCTION_WARNING),y)\ndiff --git a/lib/librte_eal/common/include/arch/x86/rte_memcpy.h b/lib/librte_eal/common/include/arch/x86/rte_memcpy.h\nindex 82ea7c3..6a57426 100644\n--- a/lib/librte_eal/common/include/arch/x86/rte_memcpy.h\n+++ b/lib/librte_eal/common/include/arch/x86/rte_memcpy.h\n@@ -43,7 +43,7 @@\n #include <stdio.h>\n #include <stdint.h>\n #include <string.h>\n-#include <rte_common_vect.h>\n+#include <rte_vect.h>\n \n #ifdef __cplusplus\n extern \"C\" {\ndiff --git a/lib/librte_eal/common/include/arch/x86/rte_vect.h b/lib/librte_eal/common/include/arch/x86/rte_vect.h\nnew file mode 100644\nindex 0000000..d5bcdb9\n--- /dev/null\n+++ b/lib/librte_eal/common/include/arch/x86/rte_vect.h\n@@ -0,0 +1,128 @@\n+/*-\n+ * BSD LICENSE\n+ *\n+ * Copyright(c) 2010-2015 Intel Corporation. All rights reserved.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ * * Neither the name of Intel Corporation nor the names of its\n+ * contributors may be used to endorse or promote products derived\n+ * from this software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#ifndef _RTE_VECT_H_\n+#define _RTE_VECT_H_\n+\n+/**\n+ * @file\n+ *\n+ * RTE SSE/AVX related header.\n+ */\n+\n+#if (defined(__ICC) || (__GNUC__ == 4 && __GNUC_MINOR__ < 4))\n+\n+#ifdef __SSE__\n+#include <xmmintrin.h>\n+#endif\n+\n+#ifdef __SSE2__\n+#include <emmintrin.h>\n+#endif\n+\n+#if defined(__SSE4_2__) || defined(__SSE4_1__)\n+#include <smmintrin.h>\n+#endif\n+\n+#if defined(__AVX__)\n+#include <immintrin.h>\n+#endif\n+\n+#else\n+\n+#include <x86intrin.h>\n+\n+#endif\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+typedef __m128i xmm_t;\n+\n+#define\tXMM_SIZE\t(sizeof(xmm_t))\n+#define\tXMM_MASK\t(XMM_SIZE - 1)\n+\n+typedef union rte_xmm {\n+\txmm_t x;\n+\tuint8_t u8[XMM_SIZE / sizeof(uint8_t)];\n+\tuint16_t u16[XMM_SIZE / sizeof(uint16_t)];\n+\tuint32_t u32[XMM_SIZE / sizeof(uint32_t)];\n+\tuint64_t u64[XMM_SIZE / sizeof(uint64_t)];\n+\tdouble pd[XMM_SIZE / sizeof(double)];\n+} rte_xmm_t;\n+\n+#ifdef __AVX__\n+\n+typedef __m256i ymm_t;\n+\n+#define\tYMM_SIZE\t(sizeof(ymm_t))\n+#define\tYMM_MASK\t(YMM_SIZE - 1)\n+\n+typedef union rte_ymm {\n+\tymm_t y;\n+\txmm_t x[YMM_SIZE / sizeof(xmm_t)];\n+\tuint8_t u8[YMM_SIZE / sizeof(uint8_t)];\n+\tuint16_t u16[YMM_SIZE / sizeof(uint16_t)];\n+\tuint32_t u32[YMM_SIZE / sizeof(uint32_t)];\n+\tuint64_t u64[YMM_SIZE / sizeof(uint64_t)];\n+\tdouble pd[YMM_SIZE / sizeof(double)];\n+} rte_ymm_t;\n+\n+#endif /* __AVX__ */\n+\n+#ifdef RTE_ARCH_I686\n+#define _mm_cvtsi128_si64(a) ({ \\\n+\trte_xmm_t m; \\\n+\tm.x = (a); \\\n+\t(m.u64[0]); \\\n+})\n+#endif\n+\n+/*\n+ * Prior to version 12.1 icc doesn't support _mm_set_epi64x.\n+ */\n+#if (defined(__ICC) && __ICC < 1210)\n+#define _mm_set_epi64x(a, b) ({ \\\n+\trte_xmm_t m; \\\n+\tm.u64[0] = b; \\\n+\tm.u64[1] = a; \\\n+\t(m.x); \\\n+})\n+#endif /* (defined(__ICC) && __ICC < 1210) */\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* _RTE_VECT_H_ */\ndiff --git a/lib/librte_eal/common/include/rte_common_vect.h b/lib/librte_eal/common/include/rte_common_vect.h\ndeleted file mode 100644\nindex 54ec70f..0000000\n--- a/lib/librte_eal/common/include/rte_common_vect.h\n+++ /dev/null\n@@ -1,128 +0,0 @@\n-/*-\n- * BSD LICENSE\n- *\n- * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * * Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- * * Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- * * Neither the name of Intel Corporation nor the names of its\n- * contributors may be used to endorse or promote products derived\n- * from this software without specific prior written permission.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n- */\n-\n-#ifndef _RTE_COMMON_VECT_H_\n-#define _RTE_COMMON_VECT_H_\n-\n-/**\n- * @file\n- *\n- * RTE SSE/AVX related header.\n- */\n-\n-#if (defined(__ICC) || (__GNUC__ == 4 && __GNUC_MINOR__ < 4))\n-\n-#ifdef __SSE__\n-#include <xmmintrin.h>\n-#endif\n-\n-#ifdef __SSE2__\n-#include <emmintrin.h>\n-#endif\n-\n-#if defined(__SSE4_2__) || defined(__SSE4_1__)\n-#include <smmintrin.h>\n-#endif\n-\n-#if defined(__AVX__)\n-#include <immintrin.h>\n-#endif\n-\n-#else\n-\n-#include <x86intrin.h>\n-\n-#endif\n-\n-#ifdef __cplusplus\n-extern \"C\" {\n-#endif\n-\n-typedef __m128i xmm_t;\n-\n-#define\tXMM_SIZE\t(sizeof(xmm_t))\n-#define\tXMM_MASK\t(XMM_SIZE - 1)\n-\n-typedef union rte_xmm {\n-\txmm_t x;\n-\tuint8_t u8[XMM_SIZE / sizeof(uint8_t)];\n-\tuint16_t u16[XMM_SIZE / sizeof(uint16_t)];\n-\tuint32_t u32[XMM_SIZE / sizeof(uint32_t)];\n-\tuint64_t u64[XMM_SIZE / sizeof(uint64_t)];\n-\tdouble pd[XMM_SIZE / sizeof(double)];\n-} rte_xmm_t;\n-\n-#ifdef __AVX__\n-\n-typedef __m256i ymm_t;\n-\n-#define\tYMM_SIZE\t(sizeof(ymm_t))\n-#define\tYMM_MASK\t(YMM_SIZE - 1)\n-\n-typedef union rte_ymm {\n-\tymm_t y;\n-\txmm_t x[YMM_SIZE / sizeof(xmm_t)];\n-\tuint8_t u8[YMM_SIZE / sizeof(uint8_t)];\n-\tuint16_t u16[YMM_SIZE / sizeof(uint16_t)];\n-\tuint32_t u32[YMM_SIZE / sizeof(uint32_t)];\n-\tuint64_t u64[YMM_SIZE / sizeof(uint64_t)];\n-\tdouble pd[YMM_SIZE / sizeof(double)];\n-} rte_ymm_t;\n-\n-#endif /* __AVX__ */\n-\n-#ifdef RTE_ARCH_I686\n-#define _mm_cvtsi128_si64(a) ({ \\\n-\trte_xmm_t m; \\\n-\tm.x = (a); \\\n-\t(m.u64[0]); \\\n-})\n-#endif\n-\n-/*\n- * Prior to version 12.1 icc doesn't support _mm_set_epi64x.\n- */\n-#if (defined(__ICC) && __ICC < 1210)\n-#define _mm_set_epi64x(a, b) ({ \\\n-\trte_xmm_t m; \\\n-\tm.u64[0] = b; \\\n-\tm.u64[1] = a; \\\n-\t(m.x); \\\n-})\n-#endif /* (defined(__ICC) && __ICC < 1210) */\n-\n-#ifdef __cplusplus\n-}\n-#endif\n-\n-#endif /* _RTE_COMMON__VECT_H_ */\ndiff --git a/lib/librte_lpm/rte_lpm.h b/lib/librte_lpm/rte_lpm.h\nindex e6c25b6..e318769 100644\n--- a/lib/librte_lpm/rte_lpm.h\n+++ b/lib/librte_lpm/rte_lpm.h\n@@ -46,7 +46,7 @@\n #include <rte_branch_prediction.h>\n #include <rte_memory.h>\n #include <rte_common.h>\n-#include <rte_common_vect.h>\n+#include <rte_vect.h>\n \n #ifdef __cplusplus\n extern \"C\" {\n", "prefixes": [ "dpdk-dev", "PATCHv2" ] }{ "id": 4047, "url": "