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GET /api/patches/35239/?format=api
{ "id": 35239, "url": "http://patches.dpdk.org/api/patches/35239/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1519112078-20113-54-git-send-email-arybchenko@solarflare.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1519112078-20113-54-git-send-email-arybchenko@solarflare.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1519112078-20113-54-git-send-email-arybchenko@solarflare.com", "date": "2018-02-20T07:34:11", "name": "[dpdk-dev,53/80] net/sfc/base: move datapath config to ef10 NIC board cfg", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "b4bf5179b7fd63b7cca61926c7c1e5274afd1a5b", "submitter": { "id": 607, "url": "http://patches.dpdk.org/api/people/607/?format=api", "name": "Andrew Rybchenko", "email": "arybchenko@solarflare.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1519112078-20113-54-git-send-email-arybchenko@solarflare.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/35239/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/35239/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 75CF21B1D4;\n\tTue, 20 Feb 2018 08:36:26 +0100 (CET)", "from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com\n\t[67.231.154.164]) by dpdk.org (Postfix) with ESMTP id 641291B312\n\tfor <dev@dpdk.org>; Tue, 20 Feb 2018 08:35:44 +0100 (CET)", "from webmail.solarflare.com (webmail.solarflare.com\n\t[12.187.104.26])\n\t(using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1-us3.ppe-hosted.com (Proofpoint Essentials ESMTP Server) with\n\tESMTPS id\n\t8FABBB80057 for <dev@dpdk.org>; Tue, 20 Feb 2018 07:35:43 +0000 (UTC)", "from sfocexch01r.SolarFlarecom.com (10.20.40.34) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id 15.0.1044.25; Mon, 19 Feb 2018 23:35:40 -0800", "from ocex03.SolarFlarecom.com (10.20.40.36) by\n\tsfocexch01r.SolarFlarecom.com (10.20.40.34) with Microsoft SMTP\n\tServer (TLS) id 15.0.1044.25; Mon, 19 Feb 2018 23:35:15 -0800", "from opal.uk.solarflarecom.com (10.17.10.1) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id\n\t15.0.1044.25 via Frontend Transport; Mon, 19 Feb 2018 23:35:15 -0800", "from uklogin.uk.solarflarecom.com (uklogin.uk.solarflarecom.com\n\t[10.17.10.10])\n\tby opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tw1K7ZE1R025152; Tue, 20 Feb 2018 07:35:14 GMT", "from uklogin.uk.solarflarecom.com (localhost.localdomain\n\t[127.0.0.1])\n\tby uklogin.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tw1K7ZBu5020529; Tue, 20 Feb 2018 07:35:14 GMT" ], "X-Virus-Scanned": "Proofpoint Essentials engine", "From": "Andrew Rybchenko <arybchenko@solarflare.com>", "To": "<dev@dpdk.org>", "CC": "Andy Moreton <amoreton@solarflare.com>", "Date": "Tue, 20 Feb 2018 07:34:11 +0000", "Message-ID": "<1519112078-20113-54-git-send-email-arybchenko@solarflare.com>", "X-Mailer": "git-send-email 1.8.2.3", "In-Reply-To": "<1519112078-20113-1-git-send-email-arybchenko@solarflare.com>", "References": "<1519112078-20113-1-git-send-email-arybchenko@solarflare.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-MDID": "1519112144-ng2vWGu0TfXu", "Subject": "[dpdk-dev] [PATCH 53/80] net/sfc/base: move datapath config to ef10\n\tNIC board cfg", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Andy Moreton <amoreton@solarflare.com>\n\nSigned-off-by: Andy Moreton <amoreton@solarflare.com>\nSigned-off-by: Andrew Rybchenko <arybchenko@solarflare.com>\n---\n drivers/net/sfc/base/ef10_impl.h | 4 ----\n drivers/net/sfc/base/ef10_nic.c | 10 ++++++++--\n drivers/net/sfc/base/hunt_nic.c | 12 +++---------\n drivers/net/sfc/base/medford2_nic.c | 14 ++++----------\n drivers/net/sfc/base/medford_nic.c | 14 ++++----------\n 5 files changed, 19 insertions(+), 35 deletions(-)", "diff": "diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h\nindex 4a50955..e1708ab 100644\n--- a/drivers/net/sfc/base/ef10_impl.h\n+++ b/drivers/net/sfc/base/ef10_impl.h\n@@ -1162,10 +1162,6 @@ efx_mcdi_get_vector_cfg(\n \t__out_opt\tuint32_t *vf_nvecp);\n \n extern\t__checkReturn\tefx_rc_t\n-ef10_get_datapath_caps(\n-\t__in\t\tefx_nic_t *enp);\n-\n-extern\t__checkReturn\tefx_rc_t\n ef10_get_vi_window_shift(\n \t__in\t\tefx_nic_t *enp,\n \t__out\t\tuint32_t *vi_window_shiftp);\ndiff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c\nindex 8e9d7a1..e7fa7b8 100644\n--- a/drivers/net/sfc/base/ef10_nic.c\n+++ b/drivers/net/sfc/base/ef10_nic.c\n@@ -989,7 +989,7 @@ ef10_mcdi_get_pf_count(\n \treturn (rc);\n }\n \n-\t__checkReturn\tefx_rc_t\n+static\t__checkReturn\tefx_rc_t\n ef10_get_datapath_caps(\n \t__in\t\tefx_nic_t *enp)\n {\n@@ -1631,13 +1631,19 @@ ef10_nic_board_cfg(\n \tepp->ep_default_adv_cap_mask = els.els_adv_cap_mask;\n \tepp->ep_adv_cap_mask = els.els_adv_cap_mask;\n \n+\t/* Check capabilities of running datapath firmware */\n+\tif ((rc = ef10_get_datapath_caps(enp)) != 0)\n+\t\tgoto fail8;\n+\n \t/* Get remaining controller-specific board config */\n \tif ((rc = enop->eno_board_cfg(enp)) != 0)\n \t\tif (rc != EACCES)\n-\t\t\tgoto fail8;\n+\t\t\tgoto fail9;\n \n \treturn (0);\n \n+fail9:\n+\tEFSYS_PROBE(fail9);\n fail8:\n \tEFSYS_PROBE(fail8);\n fail7:\ndiff --git a/drivers/net/sfc/base/hunt_nic.c b/drivers/net/sfc/base/hunt_nic.c\nindex d33d2db..95b48a7 100644\n--- a/drivers/net/sfc/base/hunt_nic.c\n+++ b/drivers/net/sfc/base/hunt_nic.c\n@@ -201,10 +201,6 @@ hunt_board_cfg(\n \n \tencp->enc_bug61265_workaround = B_FALSE; /* Medford only */\n \n-\t/* Check capabilities of running datapath firmware */\n-\tif ((rc = ef10_get_datapath_caps(enp)) != 0)\n-\t\tgoto fail5;\n-\n \t/* Alignment for receive packet DMA buffers */\n \tencp->enc_rx_buf_align_start = 1;\n \tencp->enc_rx_buf_align_end = 64; /* RX DMA end padding */\n@@ -253,13 +249,13 @@ hunt_board_cfg(\n \t * can result in time-of-check/time-of-use bugs.\n \t */\n \tif ((rc = ef10_get_privilege_mask(enp, &mask)) != 0)\n-\t\tgoto fail6;\n+\t\tgoto fail5;\n \tencp->enc_privilege_mask = mask;\n \n \t/* Get interrupt vector limits */\n \tif ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {\n \t\tif (EFX_PCI_FUNCTION_IS_PF(encp))\n-\t\t\tgoto fail7;\n+\t\t\tgoto fail6;\n \n \t\t/* Ignore error (cannot query vector limits from a VF). */\n \t\tbase = 0;\n@@ -275,7 +271,7 @@ hunt_board_cfg(\n \tencp->enc_tx_tso_tcp_header_offset_limit = EF10_TCP_HEADER_OFFSET_LIMIT;\n \n \tif ((rc = hunt_nic_get_required_pcie_bandwidth(enp, &bandwidth)) != 0)\n-\t\tgoto fail8;\n+\t\tgoto fail7;\n \tencp->enc_required_pcie_bandwidth_mbps = bandwidth;\n \n \t/* All Huntington devices have a PCIe Gen3, 8 lane connector */\n@@ -283,8 +279,6 @@ hunt_board_cfg(\n \n \treturn (0);\n \n-fail8:\n-\tEFSYS_PROBE(fail8);\n fail7:\n \tEFSYS_PROBE(fail7);\n fail6:\ndiff --git a/drivers/net/sfc/base/medford2_nic.c b/drivers/net/sfc/base/medford2_nic.c\nindex afaafb9..f383b31 100644\n--- a/drivers/net/sfc/base/medford2_nic.c\n+++ b/drivers/net/sfc/base/medford2_nic.c\n@@ -124,17 +124,13 @@ medford2_board_cfg(\n \tencp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<\n \t\t FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;\n \n-\t/* Check capabilities of running datapath firmware */\n-\tif ((rc = ef10_get_datapath_caps(enp)) != 0)\n-\t\tgoto fail4;\n-\n \t/* Alignment for receive packet DMA buffers */\n \tencp->enc_rx_buf_align_start = 1;\n \n \t/* Get the RX DMA end padding alignment configuration */\n \tif ((rc = efx_mcdi_get_rxdp_config(enp, &end_padding)) != 0) {\n \t\tif (rc != EACCES)\n-\t\t\tgoto fail5;\n+\t\t\tgoto fail4;\n \n \t\t/* Assume largest tail padding size supported by hardware */\n \t\tend_padding = 256;\n@@ -186,13 +182,13 @@ medford2_board_cfg(\n \t * can result in time-of-check/time-of-use bugs.\n \t */\n \tif ((rc = ef10_get_privilege_mask(enp, &mask)) != 0)\n-\t\tgoto fail6;\n+\t\tgoto fail5;\n \tencp->enc_privilege_mask = mask;\n \n \t/* Get interrupt vector limits */\n \tif ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {\n \t\tif (EFX_PCI_FUNCTION_IS_PF(encp))\n-\t\t\tgoto fail7;\n+\t\t\tgoto fail6;\n \n \t\t/* Ignore error (cannot query vector limits from a VF). */\n \t\tbase = 0;\n@@ -215,14 +211,12 @@ medford2_board_cfg(\n \n \trc = medford2_nic_get_required_pcie_bandwidth(enp, &bandwidth);\n \tif (rc != 0)\n-\t\tgoto fail8;\n+\t\tgoto fail7;\n \tencp->enc_required_pcie_bandwidth_mbps = bandwidth;\n \tencp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;\n \n \treturn (0);\n \n-fail8:\n-\tEFSYS_PROBE(fail8);\n fail7:\n \tEFSYS_PROBE(fail7);\n fail6:\ndiff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c\nindex afa6493..5e9d391 100644\n--- a/drivers/net/sfc/base/medford_nic.c\n+++ b/drivers/net/sfc/base/medford_nic.c\n@@ -123,17 +123,13 @@ medford_board_cfg(\n \tencp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<\n \t\t FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;\n \n-\t/* Check capabilities of running datapath firmware */\n-\tif ((rc = ef10_get_datapath_caps(enp)) != 0)\n-\t\tgoto fail3;\n-\n \t/* Alignment for receive packet DMA buffers */\n \tencp->enc_rx_buf_align_start = 1;\n \n \t/* Get the RX DMA end padding alignment configuration */\n \tif ((rc = efx_mcdi_get_rxdp_config(enp, &end_padding)) != 0) {\n \t\tif (rc != EACCES)\n-\t\t\tgoto fail4;\n+\t\t\tgoto fail3;\n \n \t\t/* Assume largest tail padding size supported by hardware */\n \t\tend_padding = 256;\n@@ -185,13 +181,13 @@ medford_board_cfg(\n \t * can result in time-of-check/time-of-use bugs.\n \t */\n \tif ((rc = ef10_get_privilege_mask(enp, &mask)) != 0)\n-\t\tgoto fail5;\n+\t\tgoto fail4;\n \tencp->enc_privilege_mask = mask;\n \n \t/* Get interrupt vector limits */\n \tif ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {\n \t\tif (EFX_PCI_FUNCTION_IS_PF(encp))\n-\t\t\tgoto fail6;\n+\t\t\tgoto fail5;\n \n \t\t/* Ignore error (cannot query vector limits from a VF). */\n \t\tbase = 0;\n@@ -214,14 +210,12 @@ medford_board_cfg(\n \n \trc = medford_nic_get_required_pcie_bandwidth(enp, &bandwidth);\n \tif (rc != 0)\n-\t\tgoto fail7;\n+\t\tgoto fail6;\n \tencp->enc_required_pcie_bandwidth_mbps = bandwidth;\n \tencp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;\n \n \treturn (0);\n \n-fail7:\n-\tEFSYS_PROBE(fail7);\n fail6:\n \tEFSYS_PROBE(fail6);\n fail5:\n", "prefixes": [ "dpdk-dev", "53/80" ] }