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GET /api/patches/35235/?format=api
{ "id": 35235, "url": "http://patches.dpdk.org/api/patches/35235/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1519112078-20113-41-git-send-email-arybchenko@solarflare.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1519112078-20113-41-git-send-email-arybchenko@solarflare.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1519112078-20113-41-git-send-email-arybchenko@solarflare.com", "date": "2018-02-20T07:33:58", "name": "[dpdk-dev,40/80] net/sfc/base: use MAC stats DMA buffer size when decoding", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "5a3c7b3aefaa2c572c5846d7b08a24a6487f8fbd", "submitter": { "id": 607, "url": "http://patches.dpdk.org/api/people/607/?format=api", "name": "Andrew Rybchenko", "email": "arybchenko@solarflare.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1519112078-20113-41-git-send-email-arybchenko@solarflare.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/35235/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/35235/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id A01741B2D1;\n\tTue, 20 Feb 2018 08:35:36 +0100 (CET)", "from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com\n\t[67.231.154.164]) by dpdk.org (Postfix) with ESMTP id 22BD01B022\n\tfor <dev@dpdk.org>; Tue, 20 Feb 2018 08:35:20 +0100 (CET)", "from webmail.solarflare.com (webmail.solarflare.com\n\t[12.187.104.26])\n\t(using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1-us1.ppe-hosted.com (Proofpoint Essentials ESMTP Server) with\n\tESMTPS id\n\t08E7C400056 for <dev@dpdk.org>; Tue, 20 Feb 2018 07:35:19 +0000 (UTC)", "from ocex03.SolarFlarecom.com (10.20.40.36) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id 15.0.1044.25; Mon, 19 Feb 2018 23:35:15 -0800", "from opal.uk.solarflarecom.com (10.17.10.1) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id\n\t15.0.1044.25 via Frontend Transport; Mon, 19 Feb 2018 23:35:14 -0800", "from uklogin.uk.solarflarecom.com (uklogin.uk.solarflarecom.com\n\t[10.17.10.10])\n\tby opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tw1K7ZD8r025083; Tue, 20 Feb 2018 07:35:13 GMT", "from uklogin.uk.solarflarecom.com (localhost.localdomain\n\t[127.0.0.1])\n\tby uklogin.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tw1K7ZBtq020529; Tue, 20 Feb 2018 07:35:13 GMT" ], "X-Virus-Scanned": "Proofpoint Essentials engine", "From": "Andrew Rybchenko <arybchenko@solarflare.com>", "To": "<dev@dpdk.org>", "CC": "Andy Moreton <amoreton@solarflare.com>", "Date": "Tue, 20 Feb 2018 07:33:58 +0000", "Message-ID": "<1519112078-20113-41-git-send-email-arybchenko@solarflare.com>", "X-Mailer": "git-send-email 1.8.2.3", "In-Reply-To": "<1519112078-20113-1-git-send-email-arybchenko@solarflare.com>", "References": "<1519112078-20113-1-git-send-email-arybchenko@solarflare.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-MDID": "1519112119-vmIh2Tg67sC7", "Subject": "[dpdk-dev] [PATCH 40/80] net/sfc/base: use MAC stats DMA buffer\n\tsize when decoding", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Andy Moreton <amoreton@solarflare.com>\n\nOn Medford2 and later the MAC stats buffer has been enlarged.\nUse the MAC stats DMA buffer size to ensure that the stats END\ngeneration count is read from the correct location, and that\nover-reading of the DMA buffer is prevented.\n\nSigned-off-by: Andy Moreton <amoreton@solarflare.com>\nSigned-off-by: Andrew Rybchenko <arybchenko@solarflare.com>\n---\n drivers/net/sfc/base/ef10_mac.c | 50 ++++++++++++++++++++++++++++++++++------\n drivers/net/sfc/base/siena_mac.c | 29 +++++++++++++++++++----\n 2 files changed, 67 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/net/sfc/base/ef10_mac.c b/drivers/net/sfc/base/ef10_mac.c\nindex ed778f7..b1534a8 100644\n--- a/drivers/net/sfc/base/ef10_mac.c\n+++ b/drivers/net/sfc/base/ef10_mac.c\n@@ -552,16 +552,45 @@ ef10_mac_stats_update(\n \t__inout_ecount(EFX_MAC_NSTATS)\tefsys_stat_t *stat,\n \t__inout_opt\t\t\tuint32_t *generationp)\n {\n-\tefx_qword_t value;\n+\tconst efx_nic_cfg_t *encp = &enp->en_nic_cfg;\n \tefx_qword_t generation_start;\n \tefx_qword_t generation_end;\n+\tefx_qword_t value;\n+\tefx_rc_t rc;\n \n-\t_NOTE(ARGUNUSED(enp))\n+\t/*\n+\t * The MAC_STATS contain start and end generation counters used to\n+\t * detect when the DMA buffer has been updated during stats decode.\n+\t * All stats counters are 64bit unsigned values.\n+\t *\n+\t * Siena-compatible MAC stats contain MC_CMD_MAC_NSTATS 64bit counters.\n+\t * The generation end counter is at index MC_CMD_MAC_GENERATION_END\n+\t * (same as MC_CMD_MAC_NSTATS-1).\n+\t *\n+\t * Medford2 and later use a larger DMA buffer: MAC_STATS_NUM_STATS from\n+\t * MC_CMD_GET_CAPABILITIES_V4_OUT reports the number of 64bit counters.\n+\t *\n+\t * Firmware writes the generation end counter as the last counter in the\n+\t * DMA buffer. Do not use MC_CMD_MAC_GENERATION_END, as that is only\n+\t * correct for legacy Siena-compatible MAC stats.\n+\t */\n+\n+\tif (encp->enc_mac_stats_nstats < MC_CMD_MAC_NSTATS) {\n+\t\t/* MAC stats count too small for legacy MAC stats */\n+\t\trc = ENOSPC;\n+\t\tgoto fail1;\n+\t}\n+\tif (EFSYS_MEM_SIZE(esmp) <\n+\t (encp->enc_mac_stats_nstats * sizeof (efx_qword_t))) {\n+\t\t/* DMA buffer too small */\n+\t\trc = ENOSPC;\n+\t\tgoto fail2;\n+\t}\n \n \t/* Read END first so we don't race with the MC */\n-\tEFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE);\n-\tEF10_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_END,\n-\t\t\t &generation_end);\n+\tEFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFSYS_MEM_SIZE(esmp));\n+\tEF10_MAC_STAT_READ(esmp, (encp->enc_mac_stats_nstats - 1),\n+\t &generation_end);\n \tEFSYS_MEM_READ_BARRIER();\n \n \t/* TX */\n@@ -851,8 +880,8 @@ ef10_mac_stats_update(\n \tEF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_OVERFLOW, &value);\n \tEFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_OVERFLOW]), &value);\n \n-\n-\tEFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE);\n+\t/* Read START generation counter */\n+\tEFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFSYS_MEM_SIZE(esmp));\n \tEFSYS_MEM_READ_BARRIER();\n \tEF10_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_START,\n \t\t\t &generation_start);\n@@ -867,6 +896,13 @@ ef10_mac_stats_update(\n \t\t*generationp = EFX_QWORD_FIELD(generation_start, EFX_DWORD_0);\n \n \treturn (0);\n+\n+fail2:\n+\tEFSYS_PROBE(fail2);\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n }\n \n #endif\t/* EFSYS_OPT_MAC_STATS */\ndiff --git a/drivers/net/sfc/base/siena_mac.c b/drivers/net/sfc/base/siena_mac.c\nindex 904e03e..f395355 100644\n--- a/drivers/net/sfc/base/siena_mac.c\n+++ b/drivers/net/sfc/base/siena_mac.c\n@@ -245,16 +245,28 @@ siena_mac_stats_update(\n \t__inout_ecount(EFX_MAC_NSTATS)\tefsys_stat_t *stat,\n \t__inout_opt\t\t\tuint32_t *generationp)\n {\n-\tefx_qword_t value;\n+\tconst efx_nic_cfg_t *encp = &enp->en_nic_cfg;\n \tefx_qword_t generation_start;\n \tefx_qword_t generation_end;\n+\tefx_qword_t value;\n+\tefx_rc_t rc;\n \n-\t_NOTE(ARGUNUSED(enp))\n+\tif (encp->enc_mac_stats_nstats < MC_CMD_MAC_NSTATS) {\n+\t\t/* MAC stats count too small */\n+\t\trc = ENOSPC;\n+\t\tgoto fail1;\n+\t}\n+\tif (EFSYS_MEM_SIZE(esmp) <\n+\t (encp->enc_mac_stats_nstats * sizeof (efx_qword_t))) {\n+\t\t/* DMA buffer too small */\n+\t\trc = ENOSPC;\n+\t\tgoto fail2;\n+\t}\n \n \t/* Read END first so we don't race with the MC */\n-\tEFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE);\n-\tSIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_END,\n-\t\t\t &generation_end);\n+\tEFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFSYS_MEM_SIZE(esmp));\n+\tSIENA_MAC_STAT_READ(esmp, (encp->enc_mac_stats_nstats - 1),\n+\t &generation_end);\n \tEFSYS_MEM_READ_BARRIER();\n \n \t/* TX */\n@@ -437,6 +449,13 @@ siena_mac_stats_update(\n \t\t*generationp = EFX_QWORD_FIELD(generation_start, EFX_DWORD_0);\n \n \treturn (0);\n+\n+fail2:\n+\tEFSYS_PROBE(fail2);\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n }\n \n #endif\t/* EFSYS_OPT_MAC_STATS */\n", "prefixes": [ "dpdk-dev", "40/80" ] }