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GET /api/patches/34382/?format=api
{ "id": 34382, "url": "http://patches.dpdk.org/api/patches/34382/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1516733000-1850-2-git-send-email-motih@mellanox.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1516733000-1850-2-git-send-email-motih@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1516733000-1850-2-git-send-email-motih@mellanox.com", "date": "2018-01-23T18:43:18", "name": "[dpdk-dev,v5,1/3] net/failsafe: regiter as an Rx interrupt mode PMD", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "14a0ef94c26876be14014f9f2a17802bd567627f", "submitter": { "id": 748, "url": "http://patches.dpdk.org/api/people/748/?format=api", "name": "Moti Haimovsky", "email": "motih@mellanox.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1516733000-1850-2-git-send-email-motih@mellanox.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/34382/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/34382/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 2F0BE1B2CE;\n\tTue, 23 Jan 2018 19:43:53 +0100 (CET)", "from EUR03-VE1-obe.outbound.protection.outlook.com\n\t(mail-eopbgr50044.outbound.protection.outlook.com [40.107.5.44])\n\tby dpdk.org (Postfix) with ESMTP id 0B5F01B2BD\n\tfor <dev@dpdk.org>; Tue, 23 Jan 2018 19:43:44 +0100 (CET)", "from mellanox.com (37.142.13.130) by\n\tHE1PR05MB3211.eurprd05.prod.outlook.com (2603:10a6:7:36::33) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.428.17;\n\tTue, 23 Jan 2018 18:43:42 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com;\n\ts=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=LeJKtP/Z1y0dwiz4VKgtXg5IzfYWoA2pjX49z5qZXP4=;\n\tb=Ceb+yOU7bWJs9jlZNK3d15tl0xUc8mGcv+00g2QhklXRisraQ8n4WIkUwG7/qtbbeFKYZAj7tcMDP9jqc+Dmb1RvYYNfEk8LHQqQcypog43kmZavVveW+yD8ygbRto0SZipvwPu8F84AuWdY4P6entEpt4IxQD9z7591csRnLpU=", "Authentication-Results": "spf=none (sender IP is )\n\tsmtp.mailfrom=motih@mellanox.com; ", "From": "Moti Haimovsky <motih@mellanox.com>", "To": "gaetan.rivet@6wind.com,\n\tferruh.yigit@intel.com", "Cc": "dev@dpdk.org,\n\tMoti Haimovsky <motih@mellanox.com>", "Date": "Tue, 23 Jan 2018 20:43:18 +0200", "Message-Id": "<1516733000-1850-2-git-send-email-motih@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1516733000-1850-1-git-send-email-motih@mellanox.com>", "References": "<1516354344-13495-2-git-send-email-motih@mellanox.com>\n\t<1516733000-1850-1-git-send-email-motih@mellanox.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[37.142.13.130]", "X-ClientProxiedBy": "DB3PR0202CA0025.eurprd02.prod.outlook.com\n\t(2603:10a6:8:1::38) To HE1PR05MB3211.eurprd05.prod.outlook.com\n\t(2603:10a6:7:36::33)", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-HT": "Tenant", "X-MS-Office365-Filtering-Correlation-Id": "e64cda9d-9a2b-43ad-6a17-08d562913a42", "X-Microsoft-Antispam": "UriScan:; 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PCL:0;\n\tRULEID:(6040501)(2401047)(5005006)(8121501046)(3231023)(2400081)(944501161)(93006095)(93001095)(10201501046)(3002001)(6055026)(6041288)(20161123560045)(20161123564045)(20161123558120)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123562045)(6072148)(201708071742011);\n\tSRVR:HE1PR05MB3211; BCL:0; PCL:0; RULEID:(100000803101)(100110400095);\n\tSRVR:HE1PR05MB3211; ", "X-Forefront-PRVS": "05610E64EE", "X-Forefront-Antispam-Report": "SFV:NSPM;\n\tSFS:(10009020)(346002)(39860400002)(39380400002)(376002)(366004)(396003)(199004)(189003)(7696005)(21086003)(16526018)(52116002)(51416003)(68736007)(3846002)(6116002)(25786009)(76176011)(66066001)(106356001)(86362001)(26005)(55016002)(53936002)(7736002)(386003)(69596002)(316002)(47776003)(59450400001)(97736004)(81166006)(81156014)(4720700003)(8676002)(8936002)(5660300001)(50466002)(105586002)(2950100002)(6666003)(50226002)(305945005)(478600001)(16586007)(2906002)(48376002)(33026002)(107886003)(4326008)(36756003);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:HE1PR05MB3211; H:mellanox.com; FPR:;\n\tSPF:None; \n\tPTR:InfoNoRecords; A:1; MX:1; LANG:en; ", "Received-SPF": "None (protection.outlook.com: mellanox.com does not designate\n\tpermitted sender hosts)", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-OriginatorOrg": "Mellanox.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "23 Jan 2018 18:43:42.0160\n\t(UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "e64cda9d-9a2b-43ad-6a17-08d562913a42", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "a652971c-7d2e-4d9b-a6a4-d149256f461b", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "HE1PR05MB3211", "Subject": "[dpdk-dev] [PATCH v5 1/3] net/failsafe: regiter as an Rx interrupt\n\tmode PMD", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds registering the Rx queues of the failsafe PMD with EAL\nRx interrupts subsystem.\nEach failsafe RX queue is assigned with a unique eventfd and an enable\ninterrupts flag.\nThe PMD creates an interrupt vector containing the above eventfds and\nRegisters it with EAL. The PMD also implements the Rx interrupts enable\nand disable interface routines.\nThis patch does not implement the generation of Rx interrupts, so an\napplication can now wait for failsafe Rx interrupts but it will not\nreceive one.\n\nSigned-off-by: Moti Haimovsky <motih@mellanox.com>\n---\nV5:\nInitial version of this patch in accordance to inputs from Gaetan Rivet\nin reply to\n1516354344-13495-2-git-send-email-motih@mellanox.com\n---\n doc/guides/nics/features/failsafe.ini | 1 +\n drivers/net/failsafe/Makefile | 1 +\n drivers/net/failsafe/failsafe.c | 4 +\n drivers/net/failsafe/failsafe_intr.c | 132 ++++++++++++++++++++++++++++++++\n drivers/net/failsafe/failsafe_ops.c | 64 ++++++++++++++++\n drivers/net/failsafe/failsafe_private.h | 9 +++\n 6 files changed, 211 insertions(+)\n create mode 100644 drivers/net/failsafe/failsafe_intr.c", "diff": "diff --git a/doc/guides/nics/features/failsafe.ini b/doc/guides/nics/features/failsafe.ini\nindex a42e344..39ee579 100644\n--- a/doc/guides/nics/features/failsafe.ini\n+++ b/doc/guides/nics/features/failsafe.ini\n@@ -6,6 +6,7 @@\n [Features]\n Link status = Y\n Link status event = Y\n+Rx interrupt = Y\n MTU update = Y\n Jumbo frame = Y\n Promiscuous mode = Y\ndiff --git a/drivers/net/failsafe/Makefile b/drivers/net/failsafe/Makefile\nindex ea2a8fe..91a734b 100644\n--- a/drivers/net/failsafe/Makefile\n+++ b/drivers/net/failsafe/Makefile\n@@ -46,6 +46,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_PMD_FAILSAFE) += failsafe_ops.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_FAILSAFE) += failsafe_rxtx.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_FAILSAFE) += failsafe_ether.c\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_FAILSAFE) += failsafe_flow.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_FAILSAFE) += failsafe_intr.c\n \n # No exported include files\n \ndiff --git a/drivers/net/failsafe/failsafe.c b/drivers/net/failsafe/failsafe.c\nindex cb274eb..921e656 100644\n--- a/drivers/net/failsafe/failsafe.c\n+++ b/drivers/net/failsafe/failsafe.c\n@@ -244,6 +244,10 @@\n \t\tmac->addr_bytes[2], mac->addr_bytes[3],\n \t\tmac->addr_bytes[4], mac->addr_bytes[5]);\n \tdev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;\n+\tPRIV(dev)->intr_handle = (struct rte_intr_handle){\n+\t\t.fd = -1,\n+\t\t.type = RTE_INTR_HANDLE_EXT,\n+\t};\n \treturn 0;\n free_args:\n \tfailsafe_args_free(dev);\ndiff --git a/drivers/net/failsafe/failsafe_intr.c b/drivers/net/failsafe/failsafe_intr.c\nnew file mode 100644\nindex 0000000..2c92d95\n--- /dev/null\n+++ b/drivers/net/failsafe/failsafe_intr.c\n@@ -0,0 +1,132 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright 2018 Mellanox Technologies, Ltd.\n+ */\n+\n+/**\n+ * @file\n+ * Interrupts handling for failsafe driver.\n+ */\n+\n+#include <unistd.h>\n+\n+#include \"failsafe_private.h\"\n+\n+/**\n+ * Uninstall failsafe interrupt vector.\n+ *\n+ * @param priv\n+ * Pointer to failsafe private structure.\n+ */\n+static void\n+fs_rx_intr_vec_uninstall(struct fs_priv *priv)\n+{\n+\tstruct rte_intr_handle *intr_handle = &priv->intr_handle;\n+\n+\tif (intr_handle->intr_vec != NULL) {\n+\t\tfree(intr_handle->intr_vec);\n+\t\tintr_handle->intr_vec = NULL;\n+\t}\n+\tintr_handle->nb_efd = 0;\n+}\n+\n+/**\n+ * Installs failsafe interrupt vector to be registered with EAL later on.\n+ *\n+ * @param priv\n+ * Pointer to failsafe private structure.\n+ *\n+ * @return\n+ * 0 on success, negative errno value otherwise and rte_errno is set.\n+ */\n+static int\n+fs_rx_intr_vec_install(struct fs_priv *priv)\n+{\n+\tunsigned int i;\n+\tunsigned int rxqs_n = priv->dev->data->nb_rx_queues;\n+\tunsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);\n+\tunsigned int count = 0;\n+\tstruct rte_intr_handle *intr_handle = &priv->intr_handle;\n+\n+\t/* Allocate the interrupt vector of the failsafe Rx proxy interrupts */\n+\tintr_handle->intr_vec = malloc(n * sizeof(intr_handle->intr_vec[0]));\n+\tif (intr_handle->intr_vec == NULL) {\n+\t\tfs_rx_intr_vec_uninstall(priv);\n+\t\trte_errno = ENOMEM;\n+\t\tERROR(\"Failed to allocate memory for interrupt vector,\"\n+\t\t \" Rx interrupts will not be supported\");\n+\t\treturn -rte_errno;\n+\t}\n+\tfor (i = 0; i < n; i++) {\n+\t\tstruct rxq *rxq = priv->dev->data->rx_queues[i];\n+\n+\t\t/* Skip queues that cannot request interrupts. */\n+\t\tif (rxq == NULL || rxq->event_fd < 0) {\n+\t\t\t/* Use invalid intr_vec[] index to disable entry. */\n+\t\t\tintr_handle->intr_vec[i] =\n+\t\t\t\tRTE_INTR_VEC_RXTX_OFFSET +\n+\t\t\t\tRTE_MAX_RXTX_INTR_VEC_ID;\n+\t\t\tcontinue;\n+\t\t}\n+\t\tif (count >= RTE_MAX_RXTX_INTR_VEC_ID) {\n+\t\t\trte_errno = E2BIG;\n+\t\t\tERROR(\"Too many Rx queues for interrupt vector size\"\n+\t\t\t \" (%d), Rx interrupts cannot be enabled\",\n+\t\t\t RTE_MAX_RXTX_INTR_VEC_ID);\n+\t\t\tfs_rx_intr_vec_uninstall(priv);\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t\tintr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;\n+\t\tintr_handle->efds[count] = rxq->event_fd;\n+\t\tcount++;\n+\t}\n+\tif (count == 0) {\n+\t\tfs_rx_intr_vec_uninstall(priv);\n+\t} else {\n+\t\tintr_handle->nb_efd = count;\n+\t\tintr_handle->efd_counter_size = sizeof(uint64_t);\n+\t}\n+\treturn 0;\n+}\n+\n+\n+/**\n+ * Uninstall failsafe Rx interrupts subsystem.\n+ *\n+ * @param priv\n+ * Pointer to private structure.\n+ *\n+ * @return\n+ * 0 on success, negative errno value otherwise and rte_errno is set.\n+ */\n+void\n+failsafe_rx_intr_uninstall(struct rte_eth_dev *dev)\n+{\n+\tstruct fs_priv *priv = PRIV(dev);\n+\n+\tfs_rx_intr_vec_uninstall(priv);\n+\tdev->intr_handle = NULL;\n+}\n+\n+/**\n+ * Install failsafe Rx interrupts subsystem.\n+ *\n+ * @param priv\n+ * Pointer to private structure.\n+ *\n+ * @return\n+ * 0 on success, negative errno value otherwise and rte_errno is set.\n+ */\n+int\n+failsafe_rx_intr_install(struct rte_eth_dev *dev)\n+{\n+\tstruct fs_priv *priv = PRIV(dev);\n+\tconst struct rte_intr_conf *const intr_conf =\n+\t\t\t&priv->dev->data->dev_conf.intr_conf;\n+\n+\tif (intr_conf->rxq == 0 || priv->intr_handle.intr_vec != NULL)\n+\t\treturn 0;\n+\tif (fs_rx_intr_vec_install(priv) < 0)\n+\t\treturn -rte_errno;\n+\tdev->intr_handle = &priv->intr_handle;\n+\treturn 0;\n+}\ndiff --git a/drivers/net/failsafe/failsafe_ops.c b/drivers/net/failsafe/failsafe_ops.c\nindex 946ac98..d6a82b3 100644\n--- a/drivers/net/failsafe/failsafe_ops.c\n+++ b/drivers/net/failsafe/failsafe_ops.c\n@@ -33,6 +33,7 @@\n \n #include <stdbool.h>\n #include <stdint.h>\n+#include <unistd.h>\n \n #include <rte_debug.h>\n #include <rte_atomic.h>\n@@ -199,6 +200,10 @@\n \tuint8_t i;\n \tint ret;\n \n+\tret = failsafe_rx_intr_install(dev);\n+\tif (ret)\n+\t\treturn ret;\n+\n \tFOREACH_SUBDEV(sdev, i, dev) {\n \t\tif (sdev->state != DEV_ACTIVE)\n \t\t\tcontinue;\n@@ -228,6 +233,7 @@\n \t\trte_eth_dev_stop(PORT_ID(sdev));\n \t\tsdev->state = DEV_STARTED - 1;\n \t}\n+\tfailsafe_rx_intr_uninstall(dev);\n }\n \n static int\n@@ -317,6 +323,8 @@\n \tif (queue == NULL)\n \t\treturn;\n \trxq = queue;\n+\tif (rxq->event_fd > 0)\n+\t\tclose(rxq->event_fd);\n \tdev = rxq->priv->dev;\n \tFOREACH_SUBDEV_STATE(sdev, i, dev, DEV_ACTIVE)\n \t\tSUBOPS(sdev, rx_queue_release)\n@@ -333,6 +341,16 @@\n \t\tconst struct rte_eth_rxconf *rx_conf,\n \t\tstruct rte_mempool *mb_pool)\n {\n+\t/*\n+\t * FIXME: Add a proper interface in rte_eal_interrupts for\n+\t * allocating eventfd as an interrupt vector.\n+\t * For the time being, fake as if we are using MSIX interrupts,\n+\t * this will cause rte_intr_efd_enable to allocate an eventfd for us.\n+\t */\n+\tstruct rte_intr_handle intr_handle = {\n+\t\t.type = RTE_INTR_HANDLE_VFIO_MSIX,\n+\t\t.efds = {-1, },\n+\t};\n \tstruct sub_device *sdev;\n \tstruct rxq *rxq;\n \tuint8_t i;\n@@ -370,6 +388,10 @@\n \trxq->info.nb_desc = nb_rx_desc;\n \trxq->priv = PRIV(dev);\n \trxq->sdev = PRIV(dev)->subs;\n+\tret = rte_intr_efd_enable(&intr_handle, 1);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\trxq->event_fd = intr_handle.efds[0];\n \tdev->data->rx_queues[rx_queue_id] = rxq;\n \tFOREACH_SUBDEV_STATE(sdev, i, dev, DEV_ACTIVE) {\n \t\tret = rte_eth_rx_queue_setup(PORT_ID(sdev),\n@@ -387,6 +409,46 @@\n \treturn ret;\n }\n \n+static int\n+fs_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx)\n+{\n+\tstruct rxq *rxq;\n+\n+\tif (idx >= dev->data->nb_rx_queues) {\n+\t\trte_errno = EINVAL;\n+\t\treturn -rte_errno;\n+\t}\n+\trxq = dev->data->rx_queues[idx];\n+\tif (rxq == NULL || rxq->event_fd <= 0) {\n+\t\trte_errno = EINVAL;\n+\t\treturn -rte_errno;\n+\t}\n+\trxq->enable_events = 1;\n+\treturn 0;\n+}\n+\n+static int\n+fs_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx)\n+{\n+\tstruct rxq *rxq;\n+\tuint64_t u64;\n+\n+\tif (idx >= dev->data->nb_rx_queues) {\n+\t\trte_errno = EINVAL;\n+\t\treturn -rte_errno;\n+\t}\n+\trxq = dev->data->rx_queues[idx];\n+\tif (rxq == NULL || rxq->event_fd <= 0) {\n+\t\trte_errno = EINVAL;\n+\t\treturn -rte_errno;\n+\t}\n+\trxq->enable_events = 0;\n+\t/* Clear pending events */\n+\twhile (read(rxq->event_fd, &u64, sizeof(uint64_t)) > 0)\n+\t\t;\n+\treturn 0;\n+}\n+\n static bool\n fs_txq_offloads_valid(struct rte_eth_dev *dev, uint64_t offloads)\n {\n@@ -888,6 +950,8 @@\n \t.tx_queue_setup = fs_tx_queue_setup,\n \t.rx_queue_release = fs_rx_queue_release,\n \t.tx_queue_release = fs_tx_queue_release,\n+\t.rx_queue_intr_enable = fs_rx_intr_enable,\n+\t.rx_queue_intr_disable = fs_rx_intr_disable,\n \t.flow_ctrl_get = fs_flow_ctrl_get,\n \t.flow_ctrl_set = fs_flow_ctrl_set,\n \t.mac_addr_remove = fs_mac_addr_remove,\ndiff --git a/drivers/net/failsafe/failsafe_private.h b/drivers/net/failsafe/failsafe_private.h\nindex 7754248..419e5e7 100644\n--- a/drivers/net/failsafe/failsafe_private.h\n+++ b/drivers/net/failsafe/failsafe_private.h\n@@ -40,6 +40,7 @@\n #include <rte_dev.h>\n #include <rte_ethdev_driver.h>\n #include <rte_devargs.h>\n+#include <rte_interrupts.h>\n \n #define FAILSAFE_DRIVER_NAME \"Fail-safe PMD\"\n \n@@ -68,6 +69,8 @@ struct rxq {\n \t/* next sub_device to poll */\n \tstruct sub_device *sdev;\n \tunsigned int socket_id;\n+\tint event_fd;\n+\tunsigned int enable_events:1;\n \tstruct rte_eth_rxq_info info;\n \trte_atomic64_t refcnt[];\n };\n@@ -145,6 +148,7 @@ struct fs_priv {\n \tuint32_t mac_addr_pool[FAILSAFE_MAX_ETHADDR];\n \t/* current capabilities */\n \tstruct rte_eth_dev_info infos;\n+\tstruct rte_intr_handle intr_handle; /* Port interrupt handle. */\n \t/*\n \t * Fail-safe state machine.\n \t * This level will be tracking state of the EAL and eth\n@@ -159,6 +163,11 @@ struct fs_priv {\n \tint flow_isolated:1;\n };\n \n+/* FAILSAFE_INTR */\n+\n+int failsafe_rx_intr_install(struct rte_eth_dev *dev);\n+void failsafe_rx_intr_uninstall(struct rte_eth_dev *dev);\n+\n /* MISC */\n \n int failsafe_hotplug_alarm_install(struct rte_eth_dev *dev);\n", "prefixes": [ "dpdk-dev", "v5", "1/3" ] }