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GET /api/patches/3267/?format=api
{ "id": 3267, "url": "http://patches.dpdk.org/api/patches/3267/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1423815597-17819-8-git-send-email-jing.d.chen@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1423815597-17819-8-git-send-email-jing.d.chen@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1423815597-17819-8-git-send-email-jing.d.chen@intel.com", "date": "2015-02-13T08:19:47", "name": "[dpdk-dev,v5,07/17] fm10k: add tx_queue_setup/release function", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "149bb1f2f1d8f32cac309f7d512a08cb717858c8", "submitter": { "id": 40, "url": "http://patches.dpdk.org/api/people/40/?format=api", "name": "Chen, Jing D", "email": "jing.d.chen@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1423815597-17819-8-git-send-email-jing.d.chen@intel.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/3267/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/3267/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 65475B3D6;\n\tFri, 13 Feb 2015 09:20:34 +0100 (CET)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 14B8BADF7\n\tfor <dev@dpdk.org>; Fri, 13 Feb 2015 09:20:25 +0100 (CET)", "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby orsmga102.jf.intel.com with ESMTP; 13 Feb 2015 00:16:33 -0800", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby fmsmga001.fm.intel.com with ESMTP; 13 Feb 2015 00:20:22 -0800", "from shecgisg003.sh.intel.com (shecgisg003.sh.intel.com\n\t[10.239.29.90])\n\tby shvmail01.sh.intel.com with ESMTP id t1D8KKM8012030;\n\tFri, 13 Feb 2015 16:20:20 +0800", "from shecgisg003.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg003.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t1D8KIA2017904; Fri, 13 Feb 2015 16:20:20 +0800", "(from jingche2@localhost)\n\tby shecgisg003.sh.intel.com (8.13.6/8.13.6/Submit) id t1D8KIpA017900; \n\tFri, 13 Feb 2015 16:20:18 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.09,569,1418112000\"; d=\"scan'208\";a=\"665868662\"", "From": "\"Chen Jing D(Mark)\" <jing.d.chen@intel.com>", "To": "dev@dpdk.org", "Date": "Fri, 13 Feb 2015 16:19:47 +0800", "Message-Id": "<1423815597-17819-8-git-send-email-jing.d.chen@intel.com>", "X-Mailer": "git-send-email 1.7.12.2", "In-Reply-To": "<1423815597-17819-1-git-send-email-jing.d.chen@intel.com>", "References": "<1423618298-2933-2-git-send-email-jing.d.chen@intel.com>\n\t<1423815597-17819-1-git-send-email-jing.d.chen@intel.com>", "Subject": "[dpdk-dev] [PATCH v5 07/17] fm10k: add tx_queue_setup/release\n\tfunction", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Jeff Shaw <jeffrey.b.shaw@intel.com>\n\nAdd fm10k_tx_queue_setup and fm10k_tx_queue_release functions.\n\nSigned-off-by: Jeff Shaw <jeffrey.b.shaw@intel.com>\nSigned-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com>\n---\n lib/librte_pmd_fm10k/fm10k_ethdev.c | 205 +++++++++++++++++++++++++++++++++++\n 1 files changed, 205 insertions(+), 0 deletions(-)", "diff": "diff --git a/lib/librte_pmd_fm10k/fm10k_ethdev.c b/lib/librte_pmd_fm10k/fm10k_ethdev.c\nindex 7280501..989ecfd 100644\n--- a/lib/librte_pmd_fm10k/fm10k_ethdev.c\n+++ b/lib/librte_pmd_fm10k/fm10k_ethdev.c\n@@ -108,6 +108,48 @@ rx_queue_free(struct fm10k_rx_queue *q)\n \t}\n }\n \n+/*\n+ * clean queue, descriptor rings, free software buffers used when stopping\n+ * device\n+ */\n+static inline void\n+tx_queue_clean(struct fm10k_tx_queue *q)\n+{\n+\tstruct fm10k_tx_desc zero = {0, 0, 0, 0, 0, 0};\n+\tuint32_t i;\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\t/* zero descriptor rings */\n+\tfor (i = 0; i < q->nb_desc; ++i)\n+\t\tq->hw_ring[i] = zero;\n+\n+\t/* free software buffers */\n+\tfor (i = 0; i < q->nb_desc; ++i) {\n+\t\tif (q->sw_ring[i]) {\n+\t\t\trte_pktmbuf_free_seg(q->sw_ring[i]);\n+\t\t\tq->sw_ring[i] = NULL;\n+\t\t}\n+\t}\n+}\n+\n+/*\n+ * free all queue memory used when releasing the queue (i.e. configure)\n+ */\n+static inline void\n+tx_queue_free(struct fm10k_tx_queue *q)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\tif (q) {\n+\t\tPMD_INIT_LOG(DEBUG, \"Freeing tx queue %p\", q);\n+\t\ttx_queue_clean(q);\n+\t\tif (q->rs_tracker.list)\n+\t\t\trte_free(q->rs_tracker.list);\n+\t\tif (q->sw_ring)\n+\t\t\trte_free(q->sw_ring);\n+\t\trte_free(q);\n+\t}\n+}\n+\n static int\n fm10k_dev_configure(struct rte_eth_dev *dev)\n {\n@@ -439,6 +481,167 @@ fm10k_rx_queue_release(void *queue)\n \trx_queue_free(queue);\n }\n \n+static inline int\n+handle_txconf(struct fm10k_tx_queue *q, const struct rte_eth_txconf *conf)\n+{\n+\tuint16_t tx_free_thresh;\n+\tuint16_t tx_rs_thresh;\n+\n+\t/* constraint MACROs require that tx_free_thresh is configured\n+\t * before tx_rs_thresh */\n+\tif (conf->tx_free_thresh == 0)\n+\t\ttx_free_thresh = FM10K_TX_FREE_THRESH_DEFAULT(q);\n+\telse\n+\t\ttx_free_thresh = conf->tx_free_thresh;\n+\n+\t/* make sure the requested threshold satisfies the constraints */\n+\tif (check_thresh(FM10K_TX_FREE_THRESH_MIN(q),\n+\t\t\tFM10K_TX_FREE_THRESH_MAX(q),\n+\t\t\tFM10K_TX_FREE_THRESH_DIV(q),\n+\t\t\ttx_free_thresh)) {\n+\t\tPMD_INIT_LOG(ERR, \"tx_free_thresh (%u) must be \"\n+\t\t\t\"less than or equal to %u, \"\n+\t\t\t\"greater than or equal to %u, \"\n+\t\t\t\"and a divisor of %u\",\n+\t\t\ttx_free_thresh, FM10K_TX_FREE_THRESH_MAX(q),\n+\t\t\tFM10K_TX_FREE_THRESH_MIN(q),\n+\t\t\tFM10K_TX_FREE_THRESH_DIV(q));\n+\t\treturn (-EINVAL);\n+\t}\n+\n+\tq->free_thresh = tx_free_thresh;\n+\n+\tif (conf->tx_rs_thresh == 0)\n+\t\ttx_rs_thresh = FM10K_TX_RS_THRESH_DEFAULT(q);\n+\telse\n+\t\ttx_rs_thresh = conf->tx_rs_thresh;\n+\n+\tq->tx_deferred_start = conf->tx_deferred_start;\n+\n+\t/* make sure the requested threshold satisfies the constraints */\n+\tif (check_thresh(FM10K_TX_RS_THRESH_MIN(q),\n+\t\t\tFM10K_TX_RS_THRESH_MAX(q),\n+\t\t\tFM10K_TX_RS_THRESH_DIV(q),\n+\t\t\ttx_rs_thresh)) {\n+\t\tPMD_INIT_LOG(ERR, \"tx_rs_thresh (%u) must be \"\n+\t\t\t\"less than or equal to %u, \"\n+\t\t\t\"greater than or equal to %u, \"\n+\t\t\t\"and a divisor of %u\",\n+\t\t\ttx_rs_thresh, FM10K_TX_RS_THRESH_MAX(q),\n+\t\t\tFM10K_TX_RS_THRESH_MIN(q),\n+\t\t\tFM10K_TX_RS_THRESH_DIV(q));\n+\t\treturn (-EINVAL);\n+\t}\n+\n+\tq->rs_thresh = tx_rs_thresh;\n+\n+\treturn 0;\n+}\n+\n+static int\n+fm10k_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_id,\n+\tuint16_t nb_desc, unsigned int socket_id,\n+\tconst struct rte_eth_txconf *conf)\n+{\n+\tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct fm10k_tx_queue *q;\n+\tconst struct rte_memzone *mz;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\t/* make sure a valid number of descriptors have been requested */\n+\tif (check_nb_desc(FM10K_MIN_TX_DESC, FM10K_MAX_TX_DESC,\n+\t\t\t\tFM10K_MULT_TX_DESC, nb_desc)) {\n+\t\tPMD_INIT_LOG(ERR, \"Number of Tx descriptors (%u) must be \"\n+\t\t\t\"less than or equal to %\"PRIu32\", \"\n+\t\t\t\"greater than or equal to %u, \"\n+\t\t\t\"and a multiple of %u\",\n+\t\t\tnb_desc, (uint32_t)FM10K_MAX_TX_DESC, FM10K_MIN_TX_DESC,\n+\t\t\tFM10K_MULT_TX_DESC);\n+\t\treturn (-EINVAL);\n+\t}\n+\n+\t/*\n+\t * if this queue existed already, free the associated memory. The\n+\t * queue cannot be reused in case we need to allocate memory on\n+\t * different socket than was previously used.\n+\t */\n+\tif (dev->data->tx_queues[queue_id] != NULL) {\n+\t\ttx_queue_free(dev->data->tx_queues[queue_id]);\n+\t\tdev->data->tx_queues[queue_id] = NULL;\n+\t}\n+\n+\t/* allocate memory for the queue structure */\n+\tq = rte_zmalloc_socket(\"fm10k\", sizeof(*q), RTE_CACHE_LINE_SIZE,\n+\t\t\t\tsocket_id);\n+\tif (q == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"Cannot allocate queue structure\");\n+\t\treturn (-ENOMEM);\n+\t}\n+\n+\t/* setup queue */\n+\tq->nb_desc = nb_desc;\n+\tq->port_id = dev->data->port_id;\n+\tq->queue_id = queue_id;\n+\tq->tail_ptr = (volatile uint32_t *)\n+\t\t&((uint32_t *)hw->hw_addr)[FM10K_TDT(queue_id)];\n+\tif (handle_txconf(q, conf))\n+\t\treturn (-EINVAL);\n+\n+\t/* allocate memory for the software ring */\n+\tq->sw_ring = rte_zmalloc_socket(\"fm10k sw ring\",\n+\t\t\t\t\tnb_desc * sizeof(struct rte_mbuf *),\n+\t\t\t\t\tRTE_CACHE_LINE_SIZE, socket_id);\n+\tif (q->sw_ring == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"Cannot allocate software ring\");\n+\t\trte_free(q);\n+\t\treturn (-ENOMEM);\n+\t}\n+\n+\t/*\n+\t * allocate memory for the hardware descriptor ring. A memzone large\n+\t * enough to hold the maximum ring size is requested to allow for\n+\t * resizing in later calls to the queue setup function.\n+\t */\n+\tmz = allocate_hw_ring(dev->driver->pci_drv.name, \"tx_ring\",\n+\t\t\t\tdev->data->port_id, queue_id, socket_id,\n+\t\t\t\tFM10K_MAX_TX_RING_SZ, FM10K_ALIGN_TX_DESC);\n+\tif (mz == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"Cannot allocate hardware ring\");\n+\t\trte_free(q->sw_ring);\n+\t\trte_free(q);\n+\t\treturn (-ENOMEM);\n+\t}\n+\tq->hw_ring = mz->addr;\n+\tq->hw_ring_phys_addr = mz->phys_addr;\n+\n+\t/*\n+\t * allocate memory for the RS bit tracker. Enough slots to hold the\n+\t * descriptor index for each RS bit needing to be set are required.\n+\t */\n+\tq->rs_tracker.list = rte_zmalloc_socket(\"fm10k rs tracker\",\n+\t\t\t\t((nb_desc + 1) / q->rs_thresh) *\n+\t\t\t\tsizeof(uint16_t),\n+\t\t\t\tRTE_CACHE_LINE_SIZE, socket_id);\n+\tif (q->rs_tracker.list == NULL) {\n+\t\tPMD_INIT_LOG(ERR, \"Cannot allocate RS bit tracker\");\n+\t\trte_free(q->sw_ring);\n+\t\trte_free(q);\n+\t\treturn (-ENOMEM);\n+\t}\n+\n+\tdev->data->tx_queues[queue_id] = q;\n+\treturn 0;\n+}\n+\n+static void\n+fm10k_tx_queue_release(void *queue)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\ttx_queue_free(queue);\n+}\n+\n static int\n fm10k_reta_update(struct rte_eth_dev *dev,\n \t\t\tstruct rte_eth_rss_reta_entry64 *reta_conf,\n@@ -580,6 +783,8 @@ static struct eth_dev_ops fm10k_eth_dev_ops = {\n \t.dev_infos_get\t\t= fm10k_dev_infos_get,\n \t.rx_queue_setup\t\t= fm10k_rx_queue_setup,\n \t.rx_queue_release\t= fm10k_rx_queue_release,\n+\t.tx_queue_setup\t\t= fm10k_tx_queue_setup,\n+\t.tx_queue_release\t= fm10k_tx_queue_release,\n \t.reta_update\t\t= fm10k_reta_update,\n \t.reta_query\t\t= fm10k_reta_query,\n };\n", "prefixes": [ "dpdk-dev", "v5", "07/17" ] }