get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/3120/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 3120,
    "url": "http://patches.dpdk.org/api/patches/3120/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1423618298-2933-6-git-send-email-jing.d.chen@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1423618298-2933-6-git-send-email-jing.d.chen@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1423618298-2933-6-git-send-email-jing.d.chen@intel.com",
    "date": "2015-02-11T01:31:28",
    "name": "[dpdk-dev,v4,05/15] fm10k: add reta update/requery functions",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "aaf019a69c5f0df6a7a3eb39eb630fa02dffc282",
    "submitter": {
        "id": 40,
        "url": "http://patches.dpdk.org/api/people/40/?format=api",
        "name": "Chen, Jing D",
        "email": "jing.d.chen@intel.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1423618298-2933-6-git-send-email-jing.d.chen@intel.com/mbox/",
    "series": [],
    "comments": "http://patches.dpdk.org/api/patches/3120/comments/",
    "check": "pending",
    "checks": "http://patches.dpdk.org/api/patches/3120/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 848265A74;\n\tWed, 11 Feb 2015 02:32:05 +0100 (CET)",
            "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id 40A3D5946\n\tfor <dev@dpdk.org>; Wed, 11 Feb 2015 02:32:01 +0100 (CET)",
            "from fmsmga003.fm.intel.com ([10.253.24.29])\n\tby fmsmga101.fm.intel.com with ESMTP; 10 Feb 2015 17:31:59 -0800",
            "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby FMSMGA003.fm.intel.com with ESMTP; 10 Feb 2015 17:17:22 -0800",
            "from shecgisg003.sh.intel.com (shecgisg003.sh.intel.com\n\t[10.239.29.90])\n\tby shvmail01.sh.intel.com with ESMTP id t1B1Vu0r026840;\n\tWed, 11 Feb 2015 09:31:56 +0800",
            "from shecgisg003.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg003.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t1B1Vs95003002; Wed, 11 Feb 2015 09:31:56 +0800",
            "(from jingche2@localhost)\n\tby shecgisg003.sh.intel.com (8.13.6/8.13.6/Submit) id t1B1VsM1002998; \n\tWed, 11 Feb 2015 09:31:54 +0800"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.09,554,1418112000\"; d=\"scan'208\";a=\"452878095\"",
        "From": "\"Chen Jing D(Mark)\" <jing.d.chen@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Wed, 11 Feb 2015 09:31:28 +0800",
        "Message-Id": "<1423618298-2933-6-git-send-email-jing.d.chen@intel.com>",
        "X-Mailer": "git-send-email 1.7.12.2",
        "In-Reply-To": "<1423618298-2933-1-git-send-email-jing.d.chen@intel.com>",
        "References": "<1423551775-3604-2-git-send-email-jing.d.chen@intel.com>\n\t<1423618298-2933-1-git-send-email-jing.d.chen@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v4 05/15] fm10k: add reta update/requery functions",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Jeff Shaw <jeffrey.b.shaw@intel.com>\n\n1. Add fm10k_reta_update and fm10k_reta_query functions.\n2. Add fm10k_link_update and fm10k_dev_infos_get functions.\n\nSigned-off-by: Jeff Shaw <jeffrey.b.shaw@intel.com>\nSigned-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com>\n---\n lib/librte_pmd_fm10k/fm10k_ethdev.c |  162 +++++++++++++++++++++++++++++++++++\n 1 files changed, 162 insertions(+), 0 deletions(-)",
    "diff": "diff --git a/lib/librte_pmd_fm10k/fm10k_ethdev.c b/lib/librte_pmd_fm10k/fm10k_ethdev.c\nindex 0b75299..b3d4d79 100644\n--- a/lib/librte_pmd_fm10k/fm10k_ethdev.c\n+++ b/lib/librte_pmd_fm10k/fm10k_ethdev.c\n@@ -44,6 +44,10 @@\n /* Default delay to acquire mailbox lock */\n #define FM10K_MBXLOCK_DELAY_US 20\n \n+/* Number of chars per uint32 type */\n+#define CHARS_PER_UINT32 (sizeof(uint32_t))\n+#define BIT_MASK_PER_UINT32 ((1 << CHARS_PER_UINT32) - 1)\n+\n static void\n fm10k_mbx_initlock(struct fm10k_hw *hw)\n {\n@@ -74,6 +78,22 @@ fm10k_dev_configure(struct rte_eth_dev *dev)\n \treturn 0;\n }\n \n+static int\n+fm10k_link_update(struct rte_eth_dev *dev,\n+\t__rte_unused int wait_to_complete)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\t/* The host-interface link is always up.  The speed is ~50Gbps per Gen3\n+\t * x8 PCIe interface. For now, we leave the speed undefined since there\n+\t * is no 50Gbps Ethernet. */\n+\tdev->data->dev_link.link_speed  = 0;\n+\tdev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;\n+\tdev->data->dev_link.link_status = 1;\n+\n+\treturn 0;\n+}\n+\n static void\n fm10k_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)\n {\n@@ -119,6 +139,144 @@ fm10k_stats_reset(struct rte_eth_dev *dev)\n \tfm10k_rebind_hw_stats(hw, hw_stats);\n }\n \n+static void\n+fm10k_dev_infos_get(struct rte_eth_dev *dev,\n+\tstruct rte_eth_dev_info *dev_info)\n+{\n+\tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tdev_info->min_rx_bufsize     = FM10K_MIN_RX_BUF_SIZE;\n+\tdev_info->max_rx_pktlen      = FM10K_MAX_PKT_SIZE;\n+\tdev_info->max_rx_queues      = hw->mac.max_queues;\n+\tdev_info->max_tx_queues      = hw->mac.max_queues;\n+\tdev_info->max_mac_addrs      = 1;\n+\tdev_info->max_hash_mac_addrs = 0;\n+\tdev_info->max_vfs            = FM10K_MAX_VF_NUM;\n+\tdev_info->max_vmdq_pools     = ETH_64_POOLS;\n+\tdev_info->rx_offload_capa =\n+\t\tDEV_RX_OFFLOAD_IPV4_CKSUM |\n+\t\tDEV_RX_OFFLOAD_UDP_CKSUM  |\n+\t\tDEV_RX_OFFLOAD_TCP_CKSUM;\n+\tdev_info->tx_offload_capa    = 0;\n+\tdev_info->reta_size = FM10K_MAX_RSS_INDICES;\n+\n+\tdev_info->default_rxconf = (struct rte_eth_rxconf) {\n+\t\t.rx_thresh = {\n+\t\t\t.pthresh = FM10K_DEFAULT_RX_PTHRESH,\n+\t\t\t.hthresh = FM10K_DEFAULT_RX_HTHRESH,\n+\t\t\t.wthresh = FM10K_DEFAULT_RX_WTHRESH,\n+\t\t},\n+\t\t.rx_free_thresh = FM10K_RX_FREE_THRESH_DEFAULT(0),\n+\t\t.rx_drop_en = 0,\n+\t};\n+\n+\tdev_info->default_txconf = (struct rte_eth_txconf) {\n+\t\t.tx_thresh = {\n+\t\t\t.pthresh = FM10K_DEFAULT_TX_PTHRESH,\n+\t\t\t.hthresh = FM10K_DEFAULT_TX_HTHRESH,\n+\t\t\t.wthresh = FM10K_DEFAULT_TX_WTHRESH,\n+\t\t},\n+\t\t.tx_free_thresh = FM10K_TX_FREE_THRESH_DEFAULT(0),\n+\t\t.tx_rs_thresh = FM10K_TX_RS_THRESH_DEFAULT(0),\n+\t\t.txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |\n+\t\t\t\tETH_TXQ_FLAGS_NOOFFLOADS,\n+\t};\n+\n+}\n+\n+static int\n+fm10k_reta_update(struct rte_eth_dev *dev,\n+\t\t\tstruct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t\tuint16_t reta_size)\n+{\n+\tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tuint16_t i, j, idx, shift;\n+\tuint8_t mask;\n+\tuint32_t reta;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tif (reta_size > FM10K_MAX_RSS_INDICES) {\n+\t\tPMD_INIT_LOG(ERR, \"The size of hash lookup table configured \"\n+\t\t\t\"(%d) doesn't match the number hardware can supported \"\n+\t\t\t\"(%d)\", reta_size, FM10K_MAX_RSS_INDICES);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/*\n+\t * Update Redirection Table RETA[n], n=0..31. The redirection table has\n+\t * 128-entries in 32 registers\n+\t */\n+\tfor (i = 0; i < FM10K_MAX_RSS_INDICES; i += CHARS_PER_UINT32) {\n+\t\tidx = i / RTE_RETA_GROUP_SIZE;\n+\t\tshift = i % RTE_RETA_GROUP_SIZE;\n+\t\tmask = (uint8_t)((reta_conf[idx].mask >> shift) &\n+\t\t\t\tBIT_MASK_PER_UINT32);\n+\t\tif (mask == 0)\n+\t\t\tcontinue;\n+\n+\t\treta = 0;\n+\t\tif (mask != BIT_MASK_PER_UINT32)\n+\t\t\treta = FM10K_READ_REG(hw, FM10K_RETA(0, i >> 2));\n+\n+\t\tfor (j = 0; j < CHARS_PER_UINT32; j++) {\n+\t\t\tif (mask & (0x1 << j)) {\n+\t\t\t\tif (mask != 0xF)\n+\t\t\t\t\treta &= ~(UINT8_MAX << CHAR_BIT * j);\n+\t\t\t\treta |= reta_conf[idx].reta[shift + j] <<\n+\t\t\t\t\t\t(CHAR_BIT * j);\n+\t\t\t}\n+\t\t}\n+\t\tFM10K_WRITE_REG(hw, FM10K_RETA(0, i >> 2), reta);\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+fm10k_reta_query(struct rte_eth_dev *dev,\n+\t\t\tstruct rte_eth_rss_reta_entry64 *reta_conf,\n+\t\t\tuint16_t reta_size)\n+{\n+\tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tuint16_t i, j, idx, shift;\n+\tuint8_t mask;\n+\tuint32_t reta;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tif (reta_size < FM10K_MAX_RSS_INDICES) {\n+\t\tPMD_INIT_LOG(ERR, \"The size of hash lookup table configured \"\n+\t\t\t\"(%d) doesn't match the number hardware can supported \"\n+\t\t\t\"(%d)\", reta_size, FM10K_MAX_RSS_INDICES);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/*\n+\t * Read Redirection Table RETA[n], n=0..31. The redirection table has\n+\t * 128-entries in 32 registers\n+\t */\n+\tfor (i = 0; i < FM10K_MAX_RSS_INDICES; i += CHARS_PER_UINT32) {\n+\t\tidx = i / RTE_RETA_GROUP_SIZE;\n+\t\tshift = i % RTE_RETA_GROUP_SIZE;\n+\t\tmask = (uint8_t)((reta_conf[idx].mask >> shift) &\n+\t\t\t\tBIT_MASK_PER_UINT32);\n+\t\tif (mask == 0)\n+\t\t\tcontinue;\n+\n+\t\treta = FM10K_READ_REG(hw, FM10K_RETA(0, i >> 2));\n+\t\tfor (j = 0; j < CHARS_PER_UINT32; j++) {\n+\t\t\tif (mask & (0x1 << j))\n+\t\t\t\treta_conf[idx].reta[shift + j] = ((reta >>\n+\t\t\t\t\tCHAR_BIT * j) & UINT8_MAX);\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+\n /* Mailbox message handler in VF */\n static const struct fm10k_msg_data fm10k_msgdata_vf[] = {\n \tFM10K_TLV_MSG_TEST_HANDLER(fm10k_tlv_msg_test),\n@@ -165,6 +323,10 @@ static struct eth_dev_ops fm10k_eth_dev_ops = {\n \t.dev_configure\t\t= fm10k_dev_configure,\n \t.stats_get\t\t= fm10k_stats_get,\n \t.stats_reset\t\t= fm10k_stats_reset,\n+\t.link_update\t\t= fm10k_link_update,\n+\t.dev_infos_get\t\t= fm10k_dev_infos_get,\n+\t.reta_update\t\t= fm10k_reta_update,\n+\t.reta_query\t\t= fm10k_reta_query,\n };\n \n static int\n",
    "prefixes": [
        "dpdk-dev",
        "v4",
        "05/15"
    ]
}