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{
    "id": 27918,
    "url": "http://patches.dpdk.org/api/patches/27918/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1503647430-93905-5-git-send-email-beilei.xing@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1503647430-93905-5-git-send-email-beilei.xing@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1503647430-93905-5-git-send-email-beilei.xing@intel.com",
    "date": "2017-08-25T07:50:27",
    "name": "[dpdk-dev,4/7] net/i40e: finish integration FDIR with generic flow API",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "7a426024bbc58ea24ce066b957bb66a227557817",
    "submitter": {
        "id": 410,
        "url": "http://patches.dpdk.org/api/people/410/?format=api",
        "name": "Xing, Beilei",
        "email": "beilei.xing@intel.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1503647430-93905-5-git-send-email-beilei.xing@intel.com/mbox/",
    "series": [],
    "comments": "http://patches.dpdk.org/api/patches/27918/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/27918/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 605E37D77;\n\tFri, 25 Aug 2017 09:51:26 +0200 (CEST)",
            "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby dpdk.org (Postfix) with ESMTP id 1FCC27D30\n\tfor <dev@dpdk.org>; Fri, 25 Aug 2017 09:51:18 +0200 (CEST)",
            "from fmsmga006.fm.intel.com ([10.253.24.20])\n\tby fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t25 Aug 2017 00:51:18 -0700",
            "from unknown (HELO dpdk9.sh.intel.com) ([10.67.119.137])\n\tby fmsmga006.fm.intel.com with ESMTP; 25 Aug 2017 00:51:17 -0700"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.41,424,1498546800\"; d=\"scan'208\";a=\"144422395\"",
        "From": "Beilei Xing <beilei.xing@intel.com>",
        "To": "jingjing.wu@intel.com",
        "Cc": "dev@dpdk.org",
        "Date": "Fri, 25 Aug 2017 15:50:27 +0800",
        "Message-Id": "<1503647430-93905-5-git-send-email-beilei.xing@intel.com>",
        "X-Mailer": "git-send-email 2.5.5",
        "In-Reply-To": "<1503647430-93905-1-git-send-email-beilei.xing@intel.com>",
        "References": "<1503647430-93905-1-git-send-email-beilei.xing@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 4/7] net/i40e: finish integration FDIR with\n\tgeneric flow API",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "rte_eth_fdir_* structures are still used in FDIR functions.\nThis patch adds i40e private FDIR related structures and\nfunctions to finish integration FDIR with generic flow API.\n\nSigned-off-by: Beilei Xing <beilei.xing@intel.com>\n---\n drivers/net/i40e/i40e_ethdev.h |  94 +++++++-\n drivers/net/i40e/i40e_fdir.c   | 490 +++++++++++++++++++++++++++++++++++++++--\n drivers/net/i40e/i40e_flow.c   |  76 +++----\n 3 files changed, 597 insertions(+), 63 deletions(-)",
    "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h\nindex ab2a5cd..6d871e4 100644\n--- a/drivers/net/i40e/i40e_ethdev.h\n+++ b/drivers/net/i40e/i40e_ethdev.h\n@@ -466,6 +466,91 @@ struct i40e_vmdq_info {\n #define I40E_FLEX_WORD_MASK(off) (0x80 >> (off))\n #define I40E_FDIR_IPv6_TC_OFFSET\t20\n \n+/**\n+ * A union contains the inputs for all types of flow\n+ * Items in flows need to be in big endian\n+ */\n+union i40e_fdir_flow {\n+\tstruct rte_eth_l2_flow     l2_flow;\n+\tstruct rte_eth_udpv4_flow  udp4_flow;\n+\tstruct rte_eth_tcpv4_flow  tcp4_flow;\n+\tstruct rte_eth_sctpv4_flow sctp4_flow;\n+\tstruct rte_eth_ipv4_flow   ip4_flow;\n+\tstruct rte_eth_udpv6_flow  udp6_flow;\n+\tstruct rte_eth_tcpv6_flow  tcp6_flow;\n+\tstruct rte_eth_sctpv6_flow sctp6_flow;\n+\tstruct rte_eth_ipv6_flow   ipv6_flow;\n+};\n+\n+/**\n+ * A structure used to contain extend input of flow\n+ */\n+struct i40e_fdir_flow_ext {\n+\tuint16_t vlan_tci;\n+\tuint8_t flexbytes[RTE_ETH_FDIR_MAX_FLEXLEN];\n+\t/**< It is filled by the flexible payload to match. */\n+\tuint8_t is_vf;   /**< 1 for VF, 0 for port dev */\n+\tuint16_t dst_id; /**< VF ID, available when is_vf is 1*/\n+};\n+\n+/**\n+ * A structure used to define the input for a flow director filter entry\n+ */\n+struct i40e_fdir_input {\n+\tenum i40e_filter_pctype pctype;\n+\tunion i40e_fdir_flow flow;\n+\t/**< Flow fields to match, dependent on flow_type */\n+\tstruct i40e_fdir_flow_ext flow_ext;\n+\t/**< Additional fields to match */\n+};\n+\n+/**\n+ * Behavior will be taken if FDIR match\n+ */\n+enum i40e_fdir_behavior {\n+\tI40E_FDIR_ACCEPT = 0,\n+\tI40E_FDIR_REJECT,\n+\tI40E_FDIR_PASSTHRU,\n+};\n+\n+/**\n+ * Flow director report status\n+ * It defines what will be reported if FDIR entry is matched.\n+ */\n+enum i40e_fdir_status {\n+\tI40E_FDIR_NO_REPORT_STATUS = 0, /**< Report nothing. */\n+\tI40E_FDIR_REPORT_ID,            /**< Only report FD ID. */\n+\tI40E_FDIR_REPORT_ID_FLEX_4,     /**< Report FD ID and 4 flex bytes. */\n+\tI40E_FDIR_REPORT_FLEX_8,        /**< Report 8 flex bytes. */\n+};\n+\n+/**\n+ * A structure used to define an action when match FDIR packet filter.\n+ */\n+struct i40e_fdir_action {\n+\tuint16_t rx_queue;        /**< Queue assigned to if FDIR match. */\n+\tenum i40e_fdir_behavior behavior;     /**< Behavior will be taken */\n+\tenum i40e_fdir_status report_status;  /**< Status report option */\n+\t/**\n+\t * If report_status is I40E_FDIR_REPORT_ID_FLEX_4 or\n+\t * I40E_FDIR_REPORT_FLEX_8, flex_off specifies where the reported\n+\t * flex bytes start from in flexible payload.\n+\t */\n+\tuint8_t flex_off;\n+};\n+\n+/**\n+ * A structure used to define the flow director filter entry by filter_ctrl API\n+ * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_ADD and\n+ * RTE_ETH_FILTER_DELETE operations.\n+ */\n+struct i40e_fdir_filter_conf {\n+\tuint32_t soft_id;\n+\t/**< ID, an unique value is required when deal with FDIR entry */\n+\tstruct i40e_fdir_input input;    /**< Input set */\n+\tstruct i40e_fdir_action action;  /**< Action taken when match */\n+};\n+\n /*\n  * Structure to store flex pit for flow diretor.\n  */\n@@ -489,7 +574,7 @@ struct i40e_fdir_flex_mask {\n \n struct i40e_fdir_filter {\n \tTAILQ_ENTRY(i40e_fdir_filter) rules;\n-\tstruct rte_eth_fdir_filter fdir;\n+\tstruct i40e_fdir_filter_conf fdir;\n };\n \n TAILQ_HEAD(i40e_fdir_filter_list, i40e_fdir_filter);\n@@ -893,7 +978,7 @@ extern const struct rte_flow_ops i40e_flow_ops;\n \n union i40e_filter_t {\n \tstruct rte_eth_ethertype_filter ethertype_filter;\n-\tstruct rte_eth_fdir_filter fdir_filter;\n+\tstruct i40e_fdir_filter_conf fdir_filter;\n \tstruct rte_eth_tunnel_filter_conf tunnel_filter;\n \tstruct i40e_tunnel_filter_conf consistent_tunnel_filter;\n };\n@@ -967,7 +1052,7 @@ i40e_sw_ethertype_filter_lookup(struct i40e_ethertype_rule *ethertype_rule,\n int i40e_sw_ethertype_filter_del(struct i40e_pf *pf,\n \t\t\t\t struct i40e_ethertype_filter_input *input);\n int i40e_sw_fdir_filter_del(struct i40e_pf *pf,\n-\t\t\t    struct rte_eth_fdir_input *input);\n+\t\t\t    struct i40e_fdir_input *input);\n struct i40e_tunnel_filter *\n i40e_sw_tunnel_filter_lookup(struct i40e_tunnel_rule *tunnel_rule,\n \t\t\t     const struct i40e_tunnel_filter_input *input);\n@@ -980,6 +1065,9 @@ int i40e_ethertype_filter_set(struct i40e_pf *pf,\n int i40e_add_del_fdir_filter(struct rte_eth_dev *dev,\n \t\t\t     const struct rte_eth_fdir_filter *filter,\n \t\t\t     bool add);\n+int i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev,\n+\t\t\t\t  const struct i40e_fdir_filter_conf *filter,\n+\t\t\t\t  bool add);\n int i40e_dev_tunnel_filter_set(struct i40e_pf *pf,\n \t\t\t       struct rte_eth_tunnel_filter_conf *tunnel_filter,\n \t\t\t       uint8_t add);\ndiff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c\nindex 8013add..b0ba819 100644\n--- a/drivers/net/i40e/i40e_fdir.c\n+++ b/drivers/net/i40e/i40e_fdir.c\n@@ -100,13 +100,18 @@ static int i40e_fdir_filter_programming(struct i40e_pf *pf,\n \t\t\tenum i40e_filter_pctype pctype,\n \t\t\tconst struct rte_eth_fdir_filter *filter,\n \t\t\tbool add);\n-static int i40e_fdir_filter_convert(const struct rte_eth_fdir_filter *input,\n+static int i40e_fdir_filter_convert(const struct i40e_fdir_filter_conf *input,\n \t\t\t struct i40e_fdir_filter *filter);\n static struct i40e_fdir_filter *\n i40e_sw_fdir_filter_lookup(struct i40e_fdir_info *fdir_info,\n-\t\t\tconst struct rte_eth_fdir_input *input);\n+\t\t\tconst struct i40e_fdir_input *input);\n static int i40e_sw_fdir_filter_insert(struct i40e_pf *pf,\n \t\t\t\t   struct i40e_fdir_filter *filter);\n+static int\n+i40e_flow_fdir_filter_programming(struct i40e_pf *pf,\n+\t\t\t\t  enum i40e_filter_pctype pctype,\n+\t\t\t\t  const struct i40e_fdir_filter_conf *filter,\n+\t\t\t\t  bool add);\n \n static int\n i40e_fdir_rx_queue_init(struct i40e_rx_queue *rxq)\n@@ -934,6 +939,263 @@ i40e_fdir_construct_pkt(struct i40e_pf *pf,\n \treturn 0;\n }\n \n+static inline int\n+i40e_flow_fdir_fill_eth_ip_head(const struct i40e_fdir_input *fdir_input,\n+\t\t\t\tunsigned char *raw_pkt,\n+\t\t\t\tbool vlan)\n+{\n+\tstatic uint8_t vlan_frame[] = {0x81, 0, 0, 0};\n+\tuint16_t *ether_type;\n+\tuint8_t len = 2 * sizeof(struct ether_addr);\n+\tstruct ipv4_hdr *ip;\n+\tstruct ipv6_hdr *ip6;\n+\tstatic const uint8_t next_proto[] = {\n+\t\t[I40E_FILTER_PCTYPE_FRAG_IPV4] = IPPROTO_IP,\n+\t\t[I40E_FILTER_PCTYPE_NONF_IPV4_TCP] = IPPROTO_TCP,\n+\t\t[I40E_FILTER_PCTYPE_NONF_IPV4_UDP] = IPPROTO_UDP,\n+\t\t[I40E_FILTER_PCTYPE_NONF_IPV4_SCTP] = IPPROTO_SCTP,\n+\t\t[I40E_FILTER_PCTYPE_NONF_IPV4_OTHER] = IPPROTO_IP,\n+\t\t[I40E_FILTER_PCTYPE_FRAG_IPV6] = IPPROTO_NONE,\n+\t\t[I40E_FILTER_PCTYPE_NONF_IPV6_TCP] = IPPROTO_TCP,\n+\t\t[I40E_FILTER_PCTYPE_NONF_IPV6_UDP] = IPPROTO_UDP,\n+\t\t[I40E_FILTER_PCTYPE_NONF_IPV6_SCTP] = IPPROTO_SCTP,\n+\t\t[I40E_FILTER_PCTYPE_NONF_IPV6_OTHER] = IPPROTO_NONE,\n+\t};\n+\n+\traw_pkt += 2 * sizeof(struct ether_addr);\n+\tif (vlan && fdir_input->flow_ext.vlan_tci) {\n+\t\trte_memcpy(raw_pkt, vlan_frame, sizeof(vlan_frame));\n+\t\trte_memcpy(raw_pkt + sizeof(uint16_t),\n+\t\t\t   &fdir_input->flow_ext.vlan_tci,\n+\t\t\t   sizeof(uint16_t));\n+\t\traw_pkt += sizeof(vlan_frame);\n+\t\tlen += sizeof(vlan_frame);\n+\t}\n+\tether_type = (uint16_t *)raw_pkt;\n+\traw_pkt += sizeof(uint16_t);\n+\tlen += sizeof(uint16_t);\n+\n+\tswitch (fdir_input->pctype) {\n+\tcase I40E_FILTER_PCTYPE_L2_PAYLOAD:\n+\t\t*ether_type = fdir_input->flow.l2_flow.ether_type;\n+\t\tbreak;\n+\tcase I40E_FILTER_PCTYPE_NONF_IPV4_TCP:\n+\tcase I40E_FILTER_PCTYPE_NONF_IPV4_UDP:\n+\tcase I40E_FILTER_PCTYPE_NONF_IPV4_SCTP:\n+\tcase I40E_FILTER_PCTYPE_NONF_IPV4_OTHER:\n+\tcase I40E_FILTER_PCTYPE_FRAG_IPV4:\n+\t\tip = (struct ipv4_hdr *)raw_pkt;\n+\n+\t\t*ether_type = rte_cpu_to_be_16(ETHER_TYPE_IPv4);\n+\t\tip->version_ihl = I40E_FDIR_IP_DEFAULT_VERSION_IHL;\n+\t\t/* set len to by default */\n+\t\tip->total_length = rte_cpu_to_be_16(I40E_FDIR_IP_DEFAULT_LEN);\n+\t\tip->next_proto_id = fdir_input->flow.ip4_flow.proto ?\n+\t\t\t\t\tfdir_input->flow.ip4_flow.proto :\n+\t\t\t\t\tnext_proto[fdir_input->pctype];\n+\t\tip->time_to_live = fdir_input->flow.ip4_flow.ttl ?\n+\t\t\t\t\tfdir_input->flow.ip4_flow.ttl :\n+\t\t\t\t\tI40E_FDIR_IP_DEFAULT_TTL;\n+\t\tip->type_of_service = fdir_input->flow.ip4_flow.tos;\n+\t\t/**\n+\t\t * The source and destination fields in the transmitted packet\n+\t\t * need to be presented in a reversed order with respect\n+\t\t * to the expected received packets.\n+\t\t */\n+\t\tip->src_addr = fdir_input->flow.ip4_flow.dst_ip;\n+\t\tip->dst_addr = fdir_input->flow.ip4_flow.src_ip;\n+\t\tlen += sizeof(struct ipv4_hdr);\n+\t\tbreak;\n+\tcase I40E_FILTER_PCTYPE_NONF_IPV6_TCP:\n+\tcase I40E_FILTER_PCTYPE_NONF_IPV6_UDP:\n+\tcase I40E_FILTER_PCTYPE_NONF_IPV6_SCTP:\n+\tcase I40E_FILTER_PCTYPE_NONF_IPV6_OTHER:\n+\tcase I40E_FILTER_PCTYPE_FRAG_IPV6:\n+\t\tip6 = (struct ipv6_hdr *)raw_pkt;\n+\n+\t\t*ether_type = rte_cpu_to_be_16(ETHER_TYPE_IPv6);\n+\t\tip6->vtc_flow =\n+\t\t\trte_cpu_to_be_32(I40E_FDIR_IPv6_DEFAULT_VTC_FLOW |\n+\t\t\t\t\t (fdir_input->flow.ipv6_flow.tc <<\n+\t\t\t\t\t  I40E_FDIR_IPv6_TC_OFFSET));\n+\t\tip6->payload_len =\n+\t\t\trte_cpu_to_be_16(I40E_FDIR_IPv6_PAYLOAD_LEN);\n+\t\tip6->proto = fdir_input->flow.ipv6_flow.proto ?\n+\t\t\t\t\tfdir_input->flow.ipv6_flow.proto :\n+\t\t\t\t\tnext_proto[fdir_input->pctype];\n+\t\tip6->hop_limits = fdir_input->flow.ipv6_flow.hop_limits ?\n+\t\t\t\t\tfdir_input->flow.ipv6_flow.hop_limits :\n+\t\t\t\t\tI40E_FDIR_IPv6_DEFAULT_HOP_LIMITS;\n+\t\t/**\n+\t\t * The source and destination fields in the transmitted packet\n+\t\t * need to be presented in a reversed order with respect\n+\t\t * to the expected received packets.\n+\t\t */\n+\t\trte_memcpy(&ip6->src_addr,\n+\t\t\t   &fdir_input->flow.ipv6_flow.dst_ip,\n+\t\t\t   IPV6_ADDR_LEN);\n+\t\trte_memcpy(&ip6->dst_addr,\n+\t\t\t   &fdir_input->flow.ipv6_flow.src_ip,\n+\t\t\t   IPV6_ADDR_LEN);\n+\t\tlen += sizeof(struct ipv6_hdr);\n+\t\tbreak;\n+\tdefault:\n+\t\tPMD_DRV_LOG(ERR, \"unknown pctype %u.\",\n+\t\t\t    fdir_input->pctype);\n+\t\treturn -1;\n+\t}\n+\treturn len;\n+}\n+\n+/**\n+ * i40e_flow_fdir_construct_pkt - construct packet based on fields in input\n+ * @pf: board private structure\n+ * @fdir_input: input set of the flow director entry\n+ * @raw_pkt: a packet to be constructed\n+ */\n+static int\n+i40e_flow_fdir_construct_pkt(struct i40e_pf *pf,\n+\t\t\t     const struct i40e_fdir_input *fdir_input,\n+\t\t\t     unsigned char *raw_pkt)\n+{\n+\tunsigned char *payload, *ptr;\n+\tstruct udp_hdr *udp;\n+\tstruct tcp_hdr *tcp;\n+\tstruct sctp_hdr *sctp;\n+\tuint8_t size, dst = 0;\n+\tuint8_t i, pit_idx, set_idx = I40E_FLXPLD_L4_IDX; /* use l4 by default*/\n+\tint len;\n+\n+\t/* fill the ethernet and IP head */\n+\tlen = i40e_flow_fdir_fill_eth_ip_head(fdir_input, raw_pkt,\n+\t\t\t\t\t      !!fdir_input->flow_ext.vlan_tci);\n+\tif (len < 0)\n+\t\treturn -EINVAL;\n+\n+\t/* fill the L4 head */\n+\tswitch (fdir_input->pctype) {\n+\tcase I40E_FILTER_PCTYPE_NONF_IPV4_UDP:\n+\t\tudp = (struct udp_hdr *)(raw_pkt + len);\n+\t\tpayload = (unsigned char *)udp + sizeof(struct udp_hdr);\n+\t\t/**\n+\t\t * The source and destination fields in the transmitted packet\n+\t\t * need to be presented in a reversed order with respect\n+\t\t * to the expected received packets.\n+\t\t */\n+\t\tudp->src_port = fdir_input->flow.udp4_flow.dst_port;\n+\t\tudp->dst_port = fdir_input->flow.udp4_flow.src_port;\n+\t\tudp->dgram_len = rte_cpu_to_be_16(I40E_FDIR_UDP_DEFAULT_LEN);\n+\t\tbreak;\n+\n+\tcase I40E_FILTER_PCTYPE_NONF_IPV4_TCP:\n+\t\ttcp = (struct tcp_hdr *)(raw_pkt + len);\n+\t\tpayload = (unsigned char *)tcp + sizeof(struct tcp_hdr);\n+\t\t/**\n+\t\t * The source and destination fields in the transmitted packet\n+\t\t * need to be presented in a reversed order with respect\n+\t\t * to the expected received packets.\n+\t\t */\n+\t\ttcp->src_port = fdir_input->flow.tcp4_flow.dst_port;\n+\t\ttcp->dst_port = fdir_input->flow.tcp4_flow.src_port;\n+\t\ttcp->data_off = I40E_FDIR_TCP_DEFAULT_DATAOFF;\n+\t\tbreak;\n+\n+\tcase I40E_FILTER_PCTYPE_NONF_IPV4_SCTP:\n+\t\tsctp = (struct sctp_hdr *)(raw_pkt + len);\n+\t\tpayload = (unsigned char *)sctp + sizeof(struct sctp_hdr);\n+\t\t/**\n+\t\t * The source and destination fields in the transmitted packet\n+\t\t * need to be presented in a reversed order with respect\n+\t\t * to the expected received packets.\n+\t\t */\n+\t\tsctp->src_port = fdir_input->flow.sctp4_flow.dst_port;\n+\t\tsctp->dst_port = fdir_input->flow.sctp4_flow.src_port;\n+\t\tsctp->tag = fdir_input->flow.sctp4_flow.verify_tag;\n+\t\tbreak;\n+\n+\tcase I40E_FILTER_PCTYPE_NONF_IPV4_OTHER:\n+\tcase I40E_FILTER_PCTYPE_FRAG_IPV4:\n+\t\tpayload = raw_pkt + len;\n+\t\tset_idx = I40E_FLXPLD_L3_IDX;\n+\t\tbreak;\n+\n+\tcase I40E_FILTER_PCTYPE_NONF_IPV6_UDP:\n+\t\tudp = (struct udp_hdr *)(raw_pkt + len);\n+\t\tpayload = (unsigned char *)udp + sizeof(struct udp_hdr);\n+\t\t/**\n+\t\t * The source and destination fields in the transmitted packet\n+\t\t * need to be presented in a reversed order with respect\n+\t\t * to the expected received packets.\n+\t\t */\n+\t\tudp->src_port = fdir_input->flow.udp6_flow.dst_port;\n+\t\tudp->dst_port = fdir_input->flow.udp6_flow.src_port;\n+\t\tudp->dgram_len = rte_cpu_to_be_16(I40E_FDIR_IPv6_PAYLOAD_LEN);\n+\t\tbreak;\n+\n+\tcase I40E_FILTER_PCTYPE_NONF_IPV6_TCP:\n+\t\ttcp = (struct tcp_hdr *)(raw_pkt + len);\n+\t\tpayload = (unsigned char *)tcp + sizeof(struct tcp_hdr);\n+\t\t/**\n+\t\t * The source and destination fields in the transmitted packet\n+\t\t * need to be presented in a reversed order with respect\n+\t\t * to the expected received packets.\n+\t\t */\n+\t\ttcp->data_off = I40E_FDIR_TCP_DEFAULT_DATAOFF;\n+\t\ttcp->src_port = fdir_input->flow.udp6_flow.dst_port;\n+\t\ttcp->dst_port = fdir_input->flow.udp6_flow.src_port;\n+\t\tbreak;\n+\n+\tcase I40E_FILTER_PCTYPE_NONF_IPV6_SCTP:\n+\t\tsctp = (struct sctp_hdr *)(raw_pkt + len);\n+\t\tpayload = (unsigned char *)sctp + sizeof(struct sctp_hdr);\n+\t\t/**\n+\t\t * The source and destination fields in the transmitted packet\n+\t\t * need to be presented in a reversed order with respect\n+\t\t * to the expected received packets.\n+\t\t */\n+\t\tsctp->src_port = fdir_input->flow.sctp6_flow.dst_port;\n+\t\tsctp->dst_port = fdir_input->flow.sctp6_flow.src_port;\n+\t\tsctp->tag = fdir_input->flow.sctp6_flow.verify_tag;\n+\t\tbreak;\n+\n+\tcase I40E_FILTER_PCTYPE_NONF_IPV6_OTHER:\n+\tcase I40E_FILTER_PCTYPE_FRAG_IPV6:\n+\t\tpayload = raw_pkt + len;\n+\t\tset_idx = I40E_FLXPLD_L3_IDX;\n+\t\tbreak;\n+\tcase I40E_FILTER_PCTYPE_L2_PAYLOAD:\n+\t\tpayload = raw_pkt + len;\n+\t\t/**\n+\t\t * ARP packet is a special case on which the payload\n+\t\t * starts after the whole ARP header\n+\t\t */\n+\t\tif (fdir_input->flow.l2_flow.ether_type ==\n+\t\t\t\trte_cpu_to_be_16(ETHER_TYPE_ARP))\n+\t\t\tpayload += sizeof(struct arp_hdr);\n+\t\tset_idx = I40E_FLXPLD_L2_IDX;\n+\t\tbreak;\n+\tdefault:\n+\t\tPMD_DRV_LOG(ERR, \"unknown pctype %u.\", fdir_input->pctype);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* fill the flexbytes to payload */\n+\tfor (i = 0; i < I40E_MAX_FLXPLD_FIED; i++) {\n+\t\tpit_idx = set_idx * I40E_MAX_FLXPLD_FIED + i;\n+\t\tsize = pf->fdir.flex_set[pit_idx].size;\n+\t\tif (size == 0)\n+\t\t\tcontinue;\n+\t\tdst = pf->fdir.flex_set[pit_idx].dst_offset * sizeof(uint16_t);\n+\t\tptr = payload +\n+\t\t      pf->fdir.flex_set[pit_idx].src_offset * sizeof(uint16_t);\n+\t\t(void)rte_memcpy(ptr,\n+\t\t\t\t &fdir_input->flow_ext.flexbytes[dst],\n+\t\t\t\t size * sizeof(uint16_t));\n+\t}\n+\n+\treturn 0;\n+}\n+\n /* Construct the tx flags */\n static inline uint64_t\n i40e_build_ctob(uint32_t td_cmd,\n@@ -1007,17 +1269,17 @@ i40e_check_fdir_programming_status(struct i40e_rx_queue *rxq)\n }\n \n static int\n-i40e_fdir_filter_convert(const struct rte_eth_fdir_filter *input,\n+i40e_fdir_filter_convert(const struct i40e_fdir_filter_conf *input,\n \t\t\t struct i40e_fdir_filter *filter)\n {\n-\trte_memcpy(&filter->fdir, input, sizeof(struct rte_eth_fdir_filter));\n+\trte_memcpy(&filter->fdir, input, sizeof(struct i40e_fdir_filter_conf));\n \treturn 0;\n }\n \n /* Check if there exists the flow director filter */\n static struct i40e_fdir_filter *\n i40e_sw_fdir_filter_lookup(struct i40e_fdir_info *fdir_info,\n-\t\t\tconst struct rte_eth_fdir_input *input)\n+\t\t\tconst struct i40e_fdir_input *input)\n {\n \tint ret;\n \n@@ -1052,7 +1314,7 @@ i40e_sw_fdir_filter_insert(struct i40e_pf *pf, struct i40e_fdir_filter *filter)\n \n /* Delete a flow director filter from the SW list */\n int\n-i40e_sw_fdir_filter_del(struct i40e_pf *pf, struct rte_eth_fdir_input *input)\n+i40e_sw_fdir_filter_del(struct i40e_pf *pf, struct i40e_fdir_input *input)\n {\n \tstruct i40e_fdir_info *fdir_info = &pf->fdir;\n \tstruct i40e_fdir_filter *filter;\n@@ -1082,16 +1344,13 @@ i40e_sw_fdir_filter_del(struct i40e_pf *pf, struct rte_eth_fdir_input *input)\n  */\n int\n i40e_add_del_fdir_filter(struct rte_eth_dev *dev,\n-\t\t\t    const struct rte_eth_fdir_filter *filter,\n-\t\t\t    bool add)\n+\t\t\t const struct rte_eth_fdir_filter *filter,\n+\t\t\t bool add)\n {\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tunsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt;\n \tenum i40e_filter_pctype pctype;\n-\tstruct i40e_fdir_info *fdir_info = &pf->fdir;\n-\tstruct i40e_fdir_filter *fdir_filter, *node;\n-\tstruct i40e_fdir_filter check_filter; /* Check if the filter exists */\n \tint ret = 0;\n \n \tif (dev->data->dev_conf.fdir_conf.mode != RTE_FDIR_MODE_PERFECT) {\n@@ -1114,6 +1373,69 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev,\n \t\treturn -EINVAL;\n \t}\n \n+\tmemset(pkt, 0, I40E_FDIR_PKT_LEN);\n+\n+\tret = i40e_fdir_construct_pkt(pf, &filter->input, pkt);\n+\tif (ret < 0) {\n+\t\tPMD_DRV_LOG(ERR, \"construct packet for fdir fails.\");\n+\t\treturn ret;\n+\t}\n+\n+\tif (hw->mac.type == I40E_MAC_X722) {\n+\t\t/* get translated pctype value in fd pctype register */\n+\t\tpctype = (enum i40e_filter_pctype)i40e_read_rx_ctl(\n+\t\t\thw, I40E_GLQF_FD_PCTYPES(\n+\t\t\t(int)i40e_flowtype_to_pctype(\n+\t\t\tfilter->input.flow_type)));\n+\t} else\n+\t\tpctype = i40e_flowtype_to_pctype(filter->input.flow_type);\n+\n+\tret = i40e_fdir_filter_programming(pf, pctype, filter, add);\n+\tif (ret < 0) {\n+\t\tPMD_DRV_LOG(ERR, \"fdir programming fails for PCTYPE(%u).\",\n+\t\t\t    pctype);\n+\t\treturn ret;\n+\t}\n+\n+\treturn ret;\n+}\n+\n+/**\n+ * i40e_flow_add_del_fdir_filter - add or remove a flow director filter.\n+ * @pf: board private structure\n+ * @filter: fdir filter entry\n+ * @add: 0 - delete, 1 - add\n+ */\n+int\n+i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev,\n+\t\t\t      const struct i40e_fdir_filter_conf *filter,\n+\t\t\t      bool add)\n+{\n+\tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n+\tunsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt;\n+\tenum i40e_filter_pctype pctype;\n+\tstruct i40e_fdir_info *fdir_info = &pf->fdir;\n+\tstruct i40e_fdir_filter *fdir_filter, *node;\n+\tstruct i40e_fdir_filter check_filter; /* Check if the filter exists */\n+\tint ret = 0;\n+\n+\tif (dev->data->dev_conf.fdir_conf.mode != RTE_FDIR_MODE_PERFECT) {\n+\t\tPMD_DRV_LOG(ERR, \"FDIR is not enabled, please\"\n+\t\t\t    \" check the mode in fdir_conf.\");\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\tif (filter->action.rx_queue >= pf->dev_data->nb_rx_queues) {\n+\t\tPMD_DRV_LOG(ERR, \"Invalid queue ID\");\n+\t\treturn -EINVAL;\n+\t}\n+\tif (filter->input.flow_ext.is_vf &&\n+\t    filter->input.flow_ext.dst_id >= pf->vf_num) {\n+\t\tPMD_DRV_LOG(ERR, \"Invalid VF ID\");\n+\t\treturn -EINVAL;\n+\t}\n+\n \t/* Check if there is the filter in SW list */\n \tmemset(&check_filter, 0, sizeof(check_filter));\n \ti40e_fdir_filter_convert(filter, &check_filter);\n@@ -1132,7 +1454,7 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev,\n \n \tmemset(pkt, 0, I40E_FDIR_PKT_LEN);\n \n-\tret = i40e_fdir_construct_pkt(pf, &filter->input, pkt);\n+\tret = i40e_flow_fdir_construct_pkt(pf, &filter->input, pkt);\n \tif (ret < 0) {\n \t\tPMD_DRV_LOG(ERR, \"construct packet for fdir fails.\");\n \t\treturn ret;\n@@ -1142,12 +1464,11 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev,\n \t\t/* get translated pctype value in fd pctype register */\n \t\tpctype = (enum i40e_filter_pctype)i40e_read_rx_ctl(\n \t\t\thw, I40E_GLQF_FD_PCTYPES(\n-\t\t\t(int)i40e_flowtype_to_pctype(\n-\t\t\tfilter->input.flow_type)));\n+\t\t\t(int)filter->input.pctype));\n \t} else\n-\t\tpctype = i40e_flowtype_to_pctype(filter->input.flow_type);\n+\t\tpctype = filter->input.pctype;\n \n-\tret = i40e_fdir_filter_programming(pf, pctype, filter, add);\n+\tret = i40e_flow_fdir_filter_programming(pf, pctype, filter, add);\n \tif (ret < 0) {\n \t\tPMD_DRV_LOG(ERR, \"fdir programming fails for PCTYPE(%u).\",\n \t\t\t    pctype);\n@@ -1302,6 +1623,141 @@ i40e_fdir_filter_programming(struct i40e_pf *pf,\n }\n \n /*\n+ * i40e_flow_fdir_filter_programming - Program a flow director filter rule.\n+ * Is done by Flow Director Programming Descriptor followed by packet\n+ * structure that contains the filter fields need to match.\n+ * @pf: board private structure\n+ * @pctype: pctype\n+ * @filter: fdir filter entry\n+ * @add: 0 - delete, 1 - add\n+ */\n+static int\n+i40e_flow_fdir_filter_programming(struct i40e_pf *pf,\n+\t\t\t\t  enum i40e_filter_pctype pctype,\n+\t\t\t\t  const struct i40e_fdir_filter_conf *filter,\n+\t\t\t\t  bool add)\n+{\n+\tstruct i40e_tx_queue *txq = pf->fdir.txq;\n+\tstruct i40e_rx_queue *rxq = pf->fdir.rxq;\n+\tconst struct i40e_fdir_action *fdir_action = &filter->action;\n+\tvolatile struct i40e_tx_desc *txdp;\n+\tvolatile struct i40e_filter_program_desc *fdirdp;\n+\tuint32_t td_cmd;\n+\tuint16_t vsi_id, i;\n+\tuint8_t dest;\n+\n+\tPMD_DRV_LOG(INFO, \"filling filter programming descriptor.\");\n+\tfdirdp = (volatile struct i40e_filter_program_desc *)\n+\t\t\t\t(&txq->tx_ring[txq->tx_tail]);\n+\n+\tfdirdp->qindex_flex_ptype_vsi =\n+\t\t\trte_cpu_to_le_32((fdir_action->rx_queue <<\n+\t\t\t\t\t  I40E_TXD_FLTR_QW0_QINDEX_SHIFT) &\n+\t\t\t\t\t  I40E_TXD_FLTR_QW0_QINDEX_MASK);\n+\n+\tfdirdp->qindex_flex_ptype_vsi |=\n+\t\t\trte_cpu_to_le_32((fdir_action->flex_off <<\n+\t\t\t\t\t  I40E_TXD_FLTR_QW0_FLEXOFF_SHIFT) &\n+\t\t\t\t\t  I40E_TXD_FLTR_QW0_FLEXOFF_MASK);\n+\n+\tfdirdp->qindex_flex_ptype_vsi |=\n+\t\t\trte_cpu_to_le_32((pctype <<\n+\t\t\t\t\t  I40E_TXD_FLTR_QW0_PCTYPE_SHIFT) &\n+\t\t\t\t\t  I40E_TXD_FLTR_QW0_PCTYPE_MASK);\n+\n+\tif (filter->input.flow_ext.is_vf)\n+\t\tvsi_id = pf->vfs[filter->input.flow_ext.dst_id].vsi->vsi_id;\n+\telse\n+\t\t/* Use LAN VSI Id by default */\n+\t\tvsi_id = pf->main_vsi->vsi_id;\n+\tfdirdp->qindex_flex_ptype_vsi |=\n+\t\trte_cpu_to_le_32(((uint32_t)vsi_id <<\n+\t\t\t\t  I40E_TXD_FLTR_QW0_DEST_VSI_SHIFT) &\n+\t\t\t\t  I40E_TXD_FLTR_QW0_DEST_VSI_MASK);\n+\n+\tfdirdp->dtype_cmd_cntindex =\n+\t\t\trte_cpu_to_le_32(I40E_TX_DESC_DTYPE_FILTER_PROG);\n+\n+\tif (add)\n+\t\tfdirdp->dtype_cmd_cntindex |= rte_cpu_to_le_32(\n+\t\t\t\tI40E_FILTER_PROGRAM_DESC_PCMD_ADD_UPDATE <<\n+\t\t\t\tI40E_TXD_FLTR_QW1_PCMD_SHIFT);\n+\telse\n+\t\tfdirdp->dtype_cmd_cntindex |= rte_cpu_to_le_32(\n+\t\t\t\tI40E_FILTER_PROGRAM_DESC_PCMD_REMOVE <<\n+\t\t\t\tI40E_TXD_FLTR_QW1_PCMD_SHIFT);\n+\n+\tif (fdir_action->behavior == I40E_FDIR_REJECT)\n+\t\tdest = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;\n+\telse if (fdir_action->behavior == I40E_FDIR_ACCEPT)\n+\t\tdest = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX;\n+\telse if (fdir_action->behavior == I40E_FDIR_PASSTHRU)\n+\t\tdest = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_OTHER;\n+\telse {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to program FDIR filter: \"\n+\t\t\t    \"unsupported fdir behavior.\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tfdirdp->dtype_cmd_cntindex |= rte_cpu_to_le_32((dest <<\n+\t\t\t\tI40E_TXD_FLTR_QW1_DEST_SHIFT) &\n+\t\t\t\tI40E_TXD_FLTR_QW1_DEST_MASK);\n+\n+\tfdirdp->dtype_cmd_cntindex |=\n+\t\trte_cpu_to_le_32((fdir_action->report_status <<\n+\t\t\t\tI40E_TXD_FLTR_QW1_FD_STATUS_SHIFT) &\n+\t\t\t\tI40E_TXD_FLTR_QW1_FD_STATUS_MASK);\n+\n+\tfdirdp->dtype_cmd_cntindex |=\n+\t\t\trte_cpu_to_le_32(I40E_TXD_FLTR_QW1_CNT_ENA_MASK);\n+\tfdirdp->dtype_cmd_cntindex |=\n+\t\t\trte_cpu_to_le_32(\n+\t\t\t((uint32_t)pf->fdir.match_counter_index <<\n+\t\t\tI40E_TXD_FLTR_QW1_CNTINDEX_SHIFT) &\n+\t\t\tI40E_TXD_FLTR_QW1_CNTINDEX_MASK);\n+\n+\tfdirdp->fd_id = rte_cpu_to_le_32(filter->soft_id);\n+\n+\tPMD_DRV_LOG(INFO, \"filling transmit descriptor.\");\n+\ttxdp = &txq->tx_ring[txq->tx_tail + 1];\n+\ttxdp->buffer_addr = rte_cpu_to_le_64(pf->fdir.dma_addr);\n+\ttd_cmd = I40E_TX_DESC_CMD_EOP |\n+\t\t I40E_TX_DESC_CMD_RS  |\n+\t\t I40E_TX_DESC_CMD_DUMMY;\n+\n+\ttxdp->cmd_type_offset_bsz =\n+\t\ti40e_build_ctob(td_cmd, 0, I40E_FDIR_PKT_LEN, 0);\n+\n+\ttxq->tx_tail += 2; /* set 2 descriptors above, fdirdp and txdp */\n+\tif (txq->tx_tail >= txq->nb_tx_desc)\n+\t\ttxq->tx_tail = 0;\n+\t/* Update the tx tail register */\n+\trte_wmb();\n+\tI40E_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail);\n+\tfor (i = 0; i < I40E_FDIR_MAX_WAIT_US; i++) {\n+\t\tif ((txdp->cmd_type_offset_bsz &\n+\t\t\t\trte_cpu_to_le_64(I40E_TXD_QW1_DTYPE_MASK)) ==\n+\t\t\t\trte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DESC_DONE))\n+\t\t\tbreak;\n+\t\trte_delay_us(1);\n+\t}\n+\tif (i >= I40E_FDIR_MAX_WAIT_US) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to program FDIR filter: \"\n+\t\t\t    \"time out to get DD on tx queue.\");\n+\t\treturn -ETIMEDOUT;\n+\t}\n+\t/* totally delay 10 ms to check programming status*/\n+\tfor (; i < I40E_FDIR_MAX_WAIT_US; i++) {\n+\t\tif (i40e_check_fdir_programming_status(rxq) >= 0)\n+\t\t\treturn 0;\n+\t\trte_delay_us(1);\n+\t}\n+\tPMD_DRV_LOG(ERR,\n+\t\t \"Failed to program FDIR filter: programming status reported.\");\n+\treturn -ETIMEDOUT;\n+}\n+\n+/*\n  * i40e_fdir_flush - clear all filters of Flow Director table\n  * @pf: board private structure\n  */\n@@ -1580,7 +2036,7 @@ i40e_fdir_filter_restore(struct i40e_pf *pf)\n \tuint32_t best_cnt;     /**< Number of filters in best effort spaces. */\n \n \tTAILQ_FOREACH(f, fdir_list, rules)\n-\t\ti40e_add_del_fdir_filter(dev, &f->fdir, TRUE);\n+\t\ti40e_flow_add_del_fdir_filter(dev, &f->fdir, TRUE);\n \n \tfdstat = I40E_READ_REG(hw, I40E_PFQF_FDSTAT);\n \tguarant_cnt =\ndiff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c\nindex b92719a..73af7fd 100644\n--- a/drivers/net/i40e/i40e_flow.c\n+++ b/drivers/net/i40e/i40e_flow.c\n@@ -84,11 +84,11 @@ static int i40e_flow_parse_ethertype_action(struct rte_eth_dev *dev,\n static int i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t\t\t\tconst struct rte_flow_item *pattern,\n \t\t\t\t\tstruct rte_flow_error *error,\n-\t\t\t\t\tstruct rte_eth_fdir_filter *filter);\n+\t\t\t\t\tstruct i40e_fdir_filter_conf *filter);\n static int i40e_flow_parse_fdir_action(struct rte_eth_dev *dev,\n \t\t\t\t       const struct rte_flow_action *actions,\n \t\t\t\t       struct rte_flow_error *error,\n-\t\t\t\t       struct rte_eth_fdir_filter *filter);\n+\t\t\t\t       struct i40e_fdir_filter_conf *filter);\n static int i40e_flow_parse_tunnel_action(struct rte_eth_dev *dev,\n \t\t\t\t const struct rte_flow_action *actions,\n \t\t\t\t struct rte_flow_error *error,\n@@ -2315,7 +2315,7 @@ static int\n i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t\t     const struct rte_flow_item *pattern,\n \t\t\t     struct rte_flow_error *error,\n-\t\t\t     struct rte_eth_fdir_filter *filter)\n+\t\t\t     struct i40e_fdir_filter_conf *filter)\n {\n \tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tconst struct rte_flow_item *item = pattern;\n@@ -2329,8 +2329,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \tconst struct rte_flow_item_raw *raw_spec, *raw_mask;\n \tconst struct rte_flow_item_vf *vf_spec;\n \n-\tuint32_t flow_type = RTE_ETH_FLOW_UNKNOWN;\n-\tenum i40e_filter_pctype pctype;\n+\tenum i40e_filter_pctype pctype = 0;\n \tuint64_t input_set = I40E_INSET_NONE;\n \tuint16_t frag_off;\n \tenum rte_flow_item_type item_type;\n@@ -2402,7 +2401,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t\t\t}\n \t\t\t}\n \n-\t\t\tflow_type = RTE_ETH_FLOW_L2_PAYLOAD;\n+\t\t\tpctype = I40E_FILTER_PCTYPE_L2_PAYLOAD;\n \t\t\tlayer_idx = I40E_FLXPLD_L2_IDX;\n \n \t\t\tbreak;\n@@ -2420,7 +2419,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t\t\t}\n \t\t\t}\n \n-\t\t\tflow_type = RTE_ETH_FLOW_L2_PAYLOAD;\n+\t\t\tpctype = I40E_FILTER_PCTYPE_L2_PAYLOAD;\n \t\t\tlayer_idx = I40E_FLXPLD_L2_IDX;\n \n \t\t\tbreak;\n@@ -2457,13 +2456,13 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t\t\t\tinput_set |= I40E_INSET_IPV4_PROTO;\n \n \t\t\t\t/* Get filter info */\n-\t\t\t\tflow_type = RTE_ETH_FLOW_NONFRAG_IPV4_OTHER;\n+\t\t\t\tpctype = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;\n \t\t\t\t/* Check if it is fragment. */\n \t\t\t\tfrag_off = ipv4_spec->hdr.fragment_offset;\n \t\t\t\tfrag_off = rte_be_to_cpu_16(frag_off);\n \t\t\t\tif (frag_off & IPV4_HDR_OFFSET_MASK ||\n \t\t\t\t    frag_off & IPV4_HDR_MF_FLAG)\n-\t\t\t\t\tflow_type = RTE_ETH_FLOW_FRAG_IPV4;\n+\t\t\t\t\tpctype = I40E_FILTER_PCTYPE_FRAG_IPV4;\n \n \t\t\t\t/* Get the filter info */\n \t\t\t\tfilter->input.flow.ip4_flow.proto =\n@@ -2535,11 +2534,10 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t\t\t/* Check if it is fragment. */\n \t\t\t\tif (ipv6_spec->hdr.proto ==\n \t\t\t\t    I40E_IPV6_FRAG_HEADER)\n-\t\t\t\t\tflow_type =\n-\t\t\t\t\t\tRTE_ETH_FLOW_FRAG_IPV6;\n+\t\t\t\t\tpctype = I40E_FILTER_PCTYPE_FRAG_IPV6;\n \t\t\t\telse\n-\t\t\t\t\tflow_type =\n-\t\t\t\t\t\tRTE_ETH_FLOW_NONFRAG_IPV6_OTHER;\n+\t\t\t\t\tpctype =\n+\t\t\t\t\t     I40E_FILTER_PCTYPE_NONF_IPV6_OTHER;\n \t\t\t}\n \n \t\t\tlayer_idx = I40E_FLXPLD_L3_IDX;\n@@ -2572,11 +2570,11 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \n \t\t\t\t/* Get filter info */\n \t\t\t\tif (l3 == RTE_FLOW_ITEM_TYPE_IPV4)\n-\t\t\t\t\tflow_type =\n-\t\t\t\t\t\tRTE_ETH_FLOW_NONFRAG_IPV4_TCP;\n+\t\t\t\t\tpctype =\n+\t\t\t\t\t       I40E_FILTER_PCTYPE_NONF_IPV4_TCP;\n \t\t\t\telse if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)\n-\t\t\t\t\tflow_type =\n-\t\t\t\t\t\tRTE_ETH_FLOW_NONFRAG_IPV6_TCP;\n+\t\t\t\t\tpctype =\n+\t\t\t\t\t       I40E_FILTER_PCTYPE_NONF_IPV6_TCP;\n \n \t\t\t\tif (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {\n \t\t\t\t\tfilter->input.flow.tcp4_flow.src_port =\n@@ -2616,11 +2614,11 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \n \t\t\t\t/* Get filter info */\n \t\t\t\tif (l3 == RTE_FLOW_ITEM_TYPE_IPV4)\n-\t\t\t\t\tflow_type =\n-\t\t\t\t\t\tRTE_ETH_FLOW_NONFRAG_IPV4_UDP;\n+\t\t\t\t\tpctype =\n+\t\t\t\t\t       I40E_FILTER_PCTYPE_NONF_IPV4_UDP;\n \t\t\t\telse if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)\n-\t\t\t\t\tflow_type =\n-\t\t\t\t\t\tRTE_ETH_FLOW_NONFRAG_IPV6_UDP;\n+\t\t\t\t\tpctype =\n+\t\t\t\t\t       I40E_FILTER_PCTYPE_NONF_IPV6_UDP;\n \n \t\t\t\tif (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {\n \t\t\t\t\tfilter->input.flow.udp4_flow.src_port =\n@@ -2663,11 +2661,11 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \n \t\t\t\t/* Get filter info */\n \t\t\t\tif (l3 == RTE_FLOW_ITEM_TYPE_IPV4)\n-\t\t\t\t\tflow_type =\n-\t\t\t\t\t\tRTE_ETH_FLOW_NONFRAG_IPV4_SCTP;\n+\t\t\t\t\tpctype =\n+\t\t\t\t\t      I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;\n \t\t\t\telse if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)\n-\t\t\t\t\tflow_type =\n-\t\t\t\t\t\tRTE_ETH_FLOW_NONFRAG_IPV6_SCTP;\n+\t\t\t\t\tpctype =\n+\t\t\t\t\t      I40E_FILTER_PCTYPE_NONF_IPV6_SCTP;\n \n \t\t\t\tif (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {\n \t\t\t\t\tfilter->input.flow.sctp4_flow.src_port =\n@@ -2776,14 +2774,6 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\t}\n \t}\n \n-\tpctype = i40e_flowtype_to_pctype(flow_type);\n-\tif (pctype == 0 || pctype > I40E_FILTER_PCTYPE_L2_PAYLOAD) {\n-\t\trte_flow_error_set(error, EINVAL,\n-\t\t\t\t   RTE_FLOW_ERROR_TYPE_ITEM, item,\n-\t\t\t\t   \"Unsupported flow type\");\n-\t\treturn -rte_errno;\n-\t}\n-\n \tret = i40e_flow_set_fdir_inset(pf, pctype, input_set);\n \tif (ret == -1) {\n \t\trte_flow_error_set(error, EINVAL,\n@@ -2797,7 +2787,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,\n \t\treturn -rte_errno;\n \t}\n \n-\tfilter->input.flow_type = flow_type;\n+\tfilter->input.pctype = pctype;\n \n \t/* Store flex mask to SW */\n \tret = i40e_flow_store_flex_mask(pf, pctype, flex_mask);\n@@ -2832,7 +2822,7 @@ static int\n i40e_flow_parse_fdir_action(struct rte_eth_dev *dev,\n \t\t\t    const struct rte_flow_action *actions,\n \t\t\t    struct rte_flow_error *error,\n-\t\t\t    struct rte_eth_fdir_filter *filter)\n+\t\t\t    struct i40e_fdir_filter_conf *filter)\n {\n \tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tconst struct rte_flow_action *act;\n@@ -2855,13 +2845,13 @@ i40e_flow_parse_fdir_action(struct rte_eth_dev *dev,\n \t\t\t\t\t   \"Invalid queue ID for FDIR.\");\n \t\t\treturn -rte_errno;\n \t\t}\n-\t\tfilter->action.behavior = RTE_ETH_FDIR_ACCEPT;\n+\t\tfilter->action.behavior = I40E_FDIR_ACCEPT;\n \t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_DROP:\n-\t\tfilter->action.behavior = RTE_ETH_FDIR_REJECT;\n+\t\tfilter->action.behavior = I40E_FDIR_REJECT;\n \t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_PASSTHRU:\n-\t\tfilter->action.behavior = RTE_ETH_FDIR_PASSTHRU;\n+\t\tfilter->action.behavior = I40E_FDIR_PASSTHRU;\n \t\tbreak;\n \tdefault:\n \t\trte_flow_error_set(error, EINVAL,\n@@ -2876,11 +2866,11 @@ i40e_flow_parse_fdir_action(struct rte_eth_dev *dev,\n \tswitch (act->type) {\n \tcase RTE_FLOW_ACTION_TYPE_MARK:\n \t\tmark_spec = (const struct rte_flow_action_mark *)act->conf;\n-\t\tfilter->action.report_status = RTE_ETH_FDIR_REPORT_ID;\n+\t\tfilter->action.report_status = I40E_FDIR_REPORT_ID;\n \t\tfilter->soft_id = mark_spec->id;\n \t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_FLAG:\n-\t\tfilter->action.report_status = RTE_ETH_FDIR_NO_REPORT_STATUS;\n+\t\tfilter->action.report_status = I40E_FDIR_NO_REPORT_STATUS;\n \t\tbreak;\n \tcase RTE_FLOW_ACTION_TYPE_END:\n \t\treturn 0;\n@@ -2911,7 +2901,7 @@ i40e_flow_parse_fdir_filter(struct rte_eth_dev *dev,\n \t\t\t    struct rte_flow_error *error,\n \t\t\t    union i40e_filter_t *filter)\n {\n-\tstruct rte_eth_fdir_filter *fdir_filter =\n+\tstruct i40e_fdir_filter_conf *fdir_filter =\n \t\t&filter->fdir_filter;\n \tint ret;\n \n@@ -3877,7 +3867,7 @@ i40e_flow_create(struct rte_eth_dev *dev,\n \t\t\t\t\ti40e_ethertype_filter_list);\n \t\tbreak;\n \tcase RTE_ETH_FILTER_FDIR:\n-\t\tret = i40e_add_del_fdir_filter(dev,\n+\t\tret = i40e_flow_add_del_fdir_filter(dev,\n \t\t\t\t       &cons_filter.fdir_filter, 1);\n \t\tif (ret)\n \t\t\tgoto free_flow;\n@@ -3927,7 +3917,7 @@ i40e_flow_destroy(struct rte_eth_dev *dev,\n \t\t\t      (struct i40e_tunnel_filter *)flow->rule);\n \t\tbreak;\n \tcase RTE_ETH_FILTER_FDIR:\n-\t\tret = i40e_add_del_fdir_filter(dev,\n+\t\tret = i40e_flow_add_del_fdir_filter(dev,\n \t\t       &((struct i40e_fdir_filter *)flow->rule)->fdir, 0);\n \t\tbreak;\n \tdefault:\n",
    "prefixes": [
        "dpdk-dev",
        "4/7"
    ]
}