Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/27328/?format=api
{ "id": 27328, "url": "http://patches.dpdk.org/api/patches/27328/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/59bc1a44a10e4185bc81b98cabdaa69bc8f34416.1501598384.git.adrien.mazarguil@6wind.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<59bc1a44a10e4185bc81b98cabdaa69bc8f34416.1501598384.git.adrien.mazarguil@6wind.com>", "list_archive_url": "https://inbox.dpdk.org/dev/59bc1a44a10e4185bc81b98cabdaa69bc8f34416.1501598384.git.adrien.mazarguil@6wind.com", "date": "2017-08-01T16:54:03", "name": "[dpdk-dev,v1,16/48] net/mlx4: drop RSS support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "35881811c94fa0282b4755611ed4722ba75cd070", "submitter": { "id": 165, "url": "http://patches.dpdk.org/api/people/165/?format=api", "name": "Adrien Mazarguil", "email": "adrien.mazarguil@6wind.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/59bc1a44a10e4185bc81b98cabdaa69bc8f34416.1501598384.git.adrien.mazarguil@6wind.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/27328/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/27328/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 829CAA14E;\n\tTue, 1 Aug 2017 18:55:35 +0200 (CEST)", "from mail-wm0-f47.google.com (mail-wm0-f47.google.com\n\t[74.125.82.47]) by dpdk.org (Postfix) with ESMTP id 26FD0A0DE\n\tfor <dev@dpdk.org>; Tue, 1 Aug 2017 18:55:14 +0200 (CEST)", "by mail-wm0-f47.google.com with SMTP id t201so20252132wmt.1\n\tfor <dev@dpdk.org>; Tue, 01 Aug 2017 09:55:14 -0700 (PDT)", "from 6wind.com (host.78.145.23.62.rev.coltfrance.com.\n\t[62.23.145.78]) by smtp.gmail.com with ESMTPSA id\n\ta31sm65559326wrc.64.2017.08.01.09.55.11\n\tfor <dev@dpdk.org> (version=TLS1_2 cipher=AES128-SHA bits=128/128);\n\tTue, 01 Aug 2017 09:55:12 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=6wind-com.20150623.gappssmtp.com; s=20150623;\n\th=from:to:subject:date:message-id:in-reply-to:references;\n\tbh=h1lx40Dxf6Gq3r8tZtDIJjuBbOLNI69gGIpsWyvcp90=;\n\tb=s9f08Ufsn5RafnHHpBn1tOo16b6jqff5/Pod+sHM3nmuXvtUXruGLUNvYOU+LuPA35\n\ttJdQXGPU9yTx57ZXvqLFylvLq0hQHvK/1VG/sbAyBwmss7mDZaGUKApLBCuBpQqGhsW2\n\tCRzle8XmwJRvrYnFVEFmfC1U9UcLSmN3lXZf4T/n5wexrZGqhCYnok21cQ1JlVoscq3x\n\t/i1IAprw+JBiT3dncuUiwYixbZc6C2121BTjOzLp41dYDD7IRWWGg3/f2q9BDtm6qC1e\n\tLnmPOpZ7SbIHg33C20XCNzBCccduOkNeGxwOme1zu6G1znsmgk/wj3xqJb9ybajCSnDO\n\ta1fg==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=h1lx40Dxf6Gq3r8tZtDIJjuBbOLNI69gGIpsWyvcp90=;\n\tb=nURye+QEetBglIboKM8pg2mMoHwXe+9ihqlEk4GYf4exg9+Wyc4Sqp/5jlTVKRZJf8\n\tAtz1Z3QKHGg7oEmRZbtg8Z3uaTsiQPDrJ1h/P6zdbvXfJPSRrrsOGlamQvV1M12eki4b\n\t/f3jfIexYJNt4wGG+GIwJUuTtrLfxRFOW40V/eVyrBm63giHXUBaRlC6WQv+UpT3yGql\n\tCebdWC4S/4ftIIpRKdUHvf/CPK9EBf2CKUi6rNBsJ4JazFjuPknMazFieQ+JzZOzO2Vl\n\tFWi0lBnXYFnVbzgDlKaivkBCqS1fEXgARjK4Omarw8omhER/YFdga0y4HqgVhE4wmAWG\n\tjFiA==", "X-Gm-Message-State": "AIVw113gxKuxLJBJ3g+h2xWor2QX1EzHCM2MRlsNf+FJVE3o2CXnEslC\n\t9vRqubwc2It+W2kbgQw=", "X-Received": "by 10.28.2.84 with SMTP id 81mr1844593wmc.1.1501606513083;\n\tTue, 01 Aug 2017 09:55:13 -0700 (PDT)", "From": "Adrien Mazarguil <adrien.mazarguil@6wind.com>", "To": "dev@dpdk.org", "Date": "Tue, 1 Aug 2017 18:54:03 +0200", "Message-Id": "<59bc1a44a10e4185bc81b98cabdaa69bc8f34416.1501598384.git.adrien.mazarguil@6wind.com>", "X-Mailer": "git-send-email 2.1.4", "In-Reply-To": "<cover.1501598383.git.adrien.mazarguil@6wind.com>", "References": "<cover.1501598383.git.adrien.mazarguil@6wind.com>", "Subject": "[dpdk-dev] [PATCH v1 16/48] net/mlx4: drop RSS support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The Verbs RSS API used in this PMD is now obsolete. It is superseded by an\nenhanced API with fewer constraints already used in the mlx5 PMD.\n\nDrop RSS support in preparation for a major refactoring. The ability to\nconfigure several Rx queues is retained, these can be targeted directly by\ncreating specific flow rules.\n\nThere is no need for \"ignored\" Rx queues anymore since their number is no\nlonger limited to powers of two.\n\nSigned-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>\n---\n doc/guides/nics/features/mlx4.ini | 1 -\n doc/guides/nics/mlx4.rst | 13 --\n drivers/net/mlx4/mlx4.c | 212 +++------------------------------\n drivers/net/mlx4/mlx4.h | 6 -\n 4 files changed, 14 insertions(+), 218 deletions(-)", "diff": "diff --git a/doc/guides/nics/features/mlx4.ini b/doc/guides/nics/features/mlx4.ini\nindex 3acf8d3..aa1ad21 100644\n--- a/doc/guides/nics/features/mlx4.ini\n+++ b/doc/guides/nics/features/mlx4.ini\n@@ -13,7 +13,6 @@ Queue start/stop = Y\n MTU update = Y\n Jumbo frame = Y\n Scattered Rx = Y\n-RSS hash = Y\n SR-IOV = Y\n L3 checksum offload = Y\n L4 checksum offload = Y\ndiff --git a/doc/guides/nics/mlx4.rst b/doc/guides/nics/mlx4.rst\nindex 235912a..e906b8d 100644\n--- a/doc/guides/nics/mlx4.rst\n+++ b/doc/guides/nics/mlx4.rst\n@@ -78,22 +78,12 @@ Features\n --------\n \n - Multi arch support: x86_64 and POWER8.\n-- RSS, also known as RCA, is supported. In this mode the number of\n- configured RX queues must be a power of two.\n - Link state information is provided.\n - Scattered packets are supported for TX and RX.\n - Inner L3/L4 (IP, TCP and UDP) TX/RX checksum offloading and validation.\n - Outer L3 (IP) TX/RX checksum offloading and validation for VXLAN frames.\n - RX interrupts.\n \n-Limitations\n------------\n-\n-- RSS hash key cannot be modified.\n-- RSS RETA cannot be configured\n-- RSS always includes L3 (IPv4/IPv6) and L4 (UDP/TCP). They cannot be\n- dissociated.\n-\n Configuration\n -------------\n \n@@ -137,9 +127,6 @@ Environment variables\n Run-time configuration\n ~~~~~~~~~~~~~~~~~~~~~~\n \n-- The only constraint when RSS mode is requested is to make sure the number\n- of RX queues is a power of two. This is a hardware requirement.\n-\n - librte_pmd_mlx4 brings kernel network interfaces up during initialization\n because it is affected by their state. Forcing them down prevents packets\n reception.\ndiff --git a/drivers/net/mlx4/mlx4.c b/drivers/net/mlx4/mlx4.c\nindex 42438a2..a1ff62a 100644\n--- a/drivers/net/mlx4/mlx4.c\n+++ b/drivers/net/mlx4/mlx4.c\n@@ -31,11 +31,6 @@\n * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n */\n \n-/*\n- * Known limitations:\n- * - RSS hash key and options cannot be modified.\n- */\n-\n /* System headers. */\n #include <stddef.h>\n #include <stdio.h>\n@@ -507,7 +502,7 @@ txq_cleanup(struct txq *txq);\n \n static int\n rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,\n-\t unsigned int socket, int inactive, const struct rte_eth_rxconf *conf,\n+\t unsigned int socket, const struct rte_eth_rxconf *conf,\n \t struct rte_mempool *mp);\n \n static void\n@@ -520,7 +515,6 @@ priv_mac_addr_del(struct priv *priv);\n * Ethernet device configuration.\n *\n * Prepare the driver for a given number of TX and RX queues.\n- * Allocate parent RSS queue when several RX queues are requested.\n *\n * @param dev\n * Pointer to Ethernet device structure.\n@@ -534,8 +528,6 @@ dev_configure(struct rte_eth_dev *dev)\n \tstruct priv *priv = dev->data->dev_private;\n \tunsigned int rxqs_n = dev->data->nb_rx_queues;\n \tunsigned int txqs_n = dev->data->nb_tx_queues;\n-\tunsigned int tmp;\n-\tint ret;\n \n \tpriv->rxqs = (void *)dev->data->rx_queues;\n \tpriv->txqs = (void *)dev->data->tx_queues;\n@@ -544,61 +536,12 @@ dev_configure(struct rte_eth_dev *dev)\n \t\t (void *)dev, priv->txqs_n, txqs_n);\n \t\tpriv->txqs_n = txqs_n;\n \t}\n-\tif (rxqs_n == priv->rxqs_n)\n-\t\treturn 0;\n-\tif (!rte_is_power_of_2(rxqs_n) && !priv->isolated) {\n-\t\tunsigned n_active;\n-\n-\t\tn_active = rte_align32pow2(rxqs_n + 1) >> 1;\n-\t\tWARN(\"%p: number of RX queues must be a power\"\n-\t\t\t\" of 2: %u queues among %u will be active\",\n-\t\t\t(void *)dev, n_active, rxqs_n);\n-\t}\n-\n-\tINFO(\"%p: RX queues number update: %u -> %u\",\n-\t (void *)dev, priv->rxqs_n, rxqs_n);\n-\t/* If RSS is enabled, disable it first. */\n-\tif (priv->rss) {\n-\t\tunsigned int i;\n-\n-\t\t/* Only if there are no remaining child RX queues. */\n-\t\tfor (i = 0; (i != priv->rxqs_n); ++i)\n-\t\t\tif ((*priv->rxqs)[i] != NULL)\n-\t\t\t\treturn EINVAL;\n-\t\tpriv_mac_addr_del(priv);\n-\t\trxq_cleanup(&priv->rxq_parent);\n-\t\tpriv->rss = 0;\n-\t\tpriv->rxqs_n = 0;\n-\t}\n-\tif (rxqs_n <= 1) {\n-\t\t/* Nothing else to do. */\n+\tif (rxqs_n != priv->rxqs_n) {\n+\t\tINFO(\"%p: RX queues number update: %u -> %u\",\n+\t\t (void *)dev, priv->rxqs_n, rxqs_n);\n \t\tpriv->rxqs_n = rxqs_n;\n-\t\treturn 0;\n-\t}\n-\t/* Allocate a new RSS parent queue if supported by hardware. */\n-\tif (!priv->hw_rss) {\n-\t\tERROR(\"%p: only a single RX queue can be configured when\"\n-\t\t \" hardware doesn't support RSS\",\n-\t\t (void *)dev);\n-\t\treturn EINVAL;\n \t}\n-\t/* Fail if hardware doesn't support that many RSS queues. */\n-\tif (rxqs_n >= priv->max_rss_tbl_sz) {\n-\t\tERROR(\"%p: only %u RX queues can be configured for RSS\",\n-\t\t (void *)dev, priv->max_rss_tbl_sz);\n-\t\treturn EINVAL;\n-\t}\n-\tpriv->rss = 1;\n-\ttmp = priv->rxqs_n;\n-\tpriv->rxqs_n = rxqs_n;\n-\tret = rxq_setup(dev, &priv->rxq_parent, 0, 0, 0, NULL, NULL);\n-\tif (!ret)\n-\t\treturn 0;\n-\t/* Failure, rollback. */\n-\tpriv->rss = 0;\n-\tpriv->rxqs_n = tmp;\n-\tassert(ret > 0);\n-\treturn ret;\n+\treturn 0;\n }\n \n /**\n@@ -2014,8 +1957,7 @@ priv_mac_addr_del(struct priv *priv)\n /**\n * Register a MAC address.\n *\n- * In RSS mode, the MAC address is registered in the parent queue,\n- * otherwise it is registered in queue 0.\n+ * The MAC address is registered in queue 0.\n *\n * @param priv\n * Pointer to private structure.\n@@ -2035,9 +1977,7 @@ priv_mac_addr_add(struct priv *priv)\n \t\treturn 0;\n \tif (priv->isolated)\n \t\treturn 0;\n-\tif (priv->rss)\n-\t\trxq = &priv->rxq_parent;\n-\telse if (*priv->rxqs && (*priv->rxqs)[0])\n+\tif (*priv->rxqs && (*priv->rxqs)[0])\n \t\trxq = (*priv->rxqs)[0];\n \telse\n \t\treturn 0;\n@@ -2647,69 +2587,8 @@ rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc,\n \t\t.res_domain = rd,\n \t};\n \n-\tattr.max_inl_recv = priv->inl_recv_size;\n-\tattr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;\n-\treturn ibv_exp_create_qp(priv->ctx, &attr);\n-}\n-\n-/**\n- * Allocate a RSS Queue Pair.\n- * Optionally setup inline receive if supported.\n- *\n- * @param priv\n- * Pointer to private structure.\n- * @param cq\n- * Completion queue to associate with QP.\n- * @param desc\n- * Number of descriptors in QP (hint only).\n- * @param parent\n- * If nonzero, create a parent QP, otherwise a child.\n- *\n- * @return\n- * QP pointer or NULL in case of error.\n- */\n-static struct ibv_qp *\n-rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,\n-\t\t int parent, struct ibv_exp_res_domain *rd)\n-{\n-\tstruct ibv_exp_qp_init_attr attr = {\n-\t\t/* CQ to be associated with the send queue. */\n-\t\t.send_cq = cq,\n-\t\t/* CQ to be associated with the receive queue. */\n-\t\t.recv_cq = cq,\n-\t\t.cap = {\n-\t\t\t/* Max number of outstanding WRs. */\n-\t\t\t.max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?\n-\t\t\t\t\tpriv->device_attr.max_qp_wr :\n-\t\t\t\t\tdesc),\n-\t\t\t/* Max number of scatter/gather elements in a WR. */\n-\t\t\t.max_recv_sge = ((priv->device_attr.max_sge <\n-\t\t\t\t\t MLX4_PMD_SGE_WR_N) ?\n-\t\t\t\t\t priv->device_attr.max_sge :\n-\t\t\t\t\t MLX4_PMD_SGE_WR_N),\n-\t\t},\n-\t\t.qp_type = IBV_QPT_RAW_PACKET,\n-\t\t.comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |\n-\t\t\t IBV_EXP_QP_INIT_ATTR_RES_DOMAIN |\n-\t\t\t IBV_EXP_QP_INIT_ATTR_QPG),\n-\t\t.pd = priv->pd,\n-\t\t.res_domain = rd,\n-\t};\n-\n \tattr.max_inl_recv = priv->inl_recv_size,\n \tattr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;\n-\tif (parent) {\n-\t\tattr.qpg.qpg_type = IBV_EXP_QPG_PARENT;\n-\t\t/* TSS isn't necessary. */\n-\t\tattr.qpg.parent_attrib.tss_child_count = 0;\n-\t\tattr.qpg.parent_attrib.rss_child_count =\n-\t\t\trte_align32pow2(priv->rxqs_n + 1) >> 1;\n-\t\tDEBUG(\"initializing parent RSS queue\");\n-\t} else {\n-\t\tattr.qpg.qpg_type = IBV_EXP_QPG_CHILD_RX;\n-\t\tattr.qpg.qpg_parent = priv->rxq_parent.qp;\n-\t\tDEBUG(\"initializing child RSS queue\");\n-\t}\n \treturn ibv_exp_create_qp(priv->ctx, &attr);\n }\n \n@@ -2741,13 +2620,7 @@ rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)\n \tstruct ibv_recv_wr *bad_wr;\n \tunsigned int mb_len;\n \tint err;\n-\tint parent = (rxq == &priv->rxq_parent);\n \n-\tif (parent) {\n-\t\tERROR(\"%p: cannot rehash parent queue %p\",\n-\t\t (void *)dev, (void *)rxq);\n-\t\treturn EINVAL;\n-\t}\n \tmb_len = rte_pktmbuf_data_room_size(rxq->mp);\n \tDEBUG(\"%p: rehashing queue %p\", (void *)dev, (void *)rxq);\n \t/* Number of descriptors and mbufs currently allocated. */\n@@ -2800,9 +2673,8 @@ rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)\n \t\t.port_num = priv->port\n \t};\n \terr = ibv_exp_modify_qp(tmpl.qp, &mod,\n-\t\t\t\t(IBV_EXP_QP_STATE |\n-\t\t\t\t (parent ? IBV_EXP_QP_GROUP_RSS : 0) |\n-\t\t\t\t IBV_EXP_QP_PORT));\n+\t\t\t\tIBV_EXP_QP_STATE |\n+\t\t\t\tIBV_EXP_QP_PORT);\n \tif (err) {\n \t\tERROR(\"%p: QP state to IBV_QPS_INIT failed: %s\",\n \t\t (void *)dev, strerror(err));\n@@ -2899,9 +2771,6 @@ rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)\n * Number of descriptors to configure in queue.\n * @param socket\n * NUMA socket on which memory must be allocated.\n- * @param inactive\n- * If true, the queue is disabled because its index is higher or\n- * equal to the real number of queues, which must be a power of 2.\n * @param[in] conf\n * Thresholds parameters.\n * @param mp\n@@ -2912,7 +2781,7 @@ rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)\n */\n static int\n rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,\n-\t unsigned int socket, int inactive, const struct rte_eth_rxconf *conf,\n+\t unsigned int socket, const struct rte_eth_rxconf *conf,\n \t struct rte_mempool *mp)\n {\n \tstruct priv *priv = dev->data->dev_private;\n@@ -2931,20 +2800,8 @@ rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,\n \tstruct ibv_recv_wr *bad_wr;\n \tunsigned int mb_len;\n \tint ret = 0;\n-\tint parent = (rxq == &priv->rxq_parent);\n \n \t(void)conf; /* Thresholds configuration (ignored). */\n-\t/*\n-\t * If this is a parent queue, hardware must support RSS and\n-\t * RSS must be enabled.\n-\t */\n-\tassert((!parent) || ((priv->hw_rss) && (priv->rss)));\n-\tif (parent) {\n-\t\t/* Even if unused, ibv_create_cq() requires at least one\n-\t\t * descriptor. */\n-\t\tdesc = 1;\n-\t\tgoto skip_mr;\n-\t}\n \tmb_len = rte_pktmbuf_data_room_size(mp);\n \tif ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {\n \t\tERROR(\"%p: invalid number of RX descriptors (must be a\"\n@@ -2982,7 +2839,6 @@ rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,\n \t\t (void *)dev, strerror(ret));\n \t\tgoto error;\n \t}\n-skip_mr:\n \tattr.rd = (struct ibv_exp_res_domain_init_attr){\n \t\t.comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |\n \t\t\t IBV_EXP_RES_DOMAIN_MSG_MODEL),\n@@ -3022,11 +2878,7 @@ rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,\n \t priv->device_attr.max_qp_wr);\n \tDEBUG(\"priv->device_attr.max_sge is %d\",\n \t priv->device_attr.max_sge);\n-\tif (priv->rss && !inactive)\n-\t\ttmpl.qp = rxq_setup_qp_rss(priv, tmpl.cq, desc, parent,\n-\t\t\t\t\t tmpl.rd);\n-\telse\n-\t\ttmpl.qp = rxq_setup_qp(priv, tmpl.cq, desc, tmpl.rd);\n+\ttmpl.qp = rxq_setup_qp(priv, tmpl.cq, desc, tmpl.rd);\n \tif (tmpl.qp == NULL) {\n \t\tret = (errno ? errno : EINVAL);\n \t\tERROR(\"%p: QP creation failure: %s\",\n@@ -3040,17 +2892,13 @@ rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,\n \t\t.port_num = priv->port\n \t};\n \tret = ibv_exp_modify_qp(tmpl.qp, &mod,\n-\t\t\t\t(IBV_EXP_QP_STATE |\n-\t\t\t\t (parent ? IBV_EXP_QP_GROUP_RSS : 0) |\n-\t\t\t\t IBV_EXP_QP_PORT));\n+\t\t\t\tIBV_EXP_QP_STATE |\n+\t\t\t\tIBV_EXP_QP_PORT);\n \tif (ret) {\n \t\tERROR(\"%p: QP state to IBV_QPS_INIT failed: %s\",\n \t\t (void *)dev, strerror(ret));\n \t\tgoto error;\n \t}\n-\t/* Allocate descriptors for RX queues, except for the RSS parent. */\n-\tif (parent)\n-\t\tgoto skip_alloc;\n \tif (tmpl.sp)\n \t\tret = rxq_alloc_elts_sp(&tmpl, desc, NULL);\n \telse\n@@ -3072,7 +2920,6 @@ rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,\n \t\t strerror(ret));\n \t\tgoto error;\n \t}\n-skip_alloc:\n \tmod = (struct ibv_exp_qp_attr){\n \t\t.qp_state = IBV_QPS_RTR\n \t};\n@@ -3146,7 +2993,6 @@ mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,\n {\n \tstruct priv *priv = dev->data->dev_private;\n \tstruct rxq *rxq = (*priv->rxqs)[idx];\n-\tint inactive = 0;\n \tint ret;\n \n \tpriv_lock(priv);\n@@ -3178,9 +3024,7 @@ mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,\n \t\t\treturn -ENOMEM;\n \t\t}\n \t}\n-\tif (idx >= rte_align32pow2(priv->rxqs_n + 1) >> 1)\n-\t\tinactive = 1;\n-\tret = rxq_setup(dev, rxq, desc, socket, inactive, conf, mp);\n+\tret = rxq_setup(dev, rxq, desc, socket, conf, mp);\n \tif (ret)\n \t\trte_free(rxq);\n \telse {\n@@ -3215,7 +3059,6 @@ mlx4_rx_queue_release(void *dpdk_rxq)\n \t\treturn;\n \tpriv = rxq->priv;\n \tpriv_lock(priv);\n-\tassert(rxq != &priv->rxq_parent);\n \tfor (i = 0; (i != priv->rxqs_n); ++i)\n \t\tif ((*priv->rxqs)[i] == rxq) {\n \t\t\tDEBUG(\"%p: removing RX queue %p from list\",\n@@ -3440,8 +3283,6 @@ mlx4_dev_close(struct rte_eth_dev *dev)\n \t\tpriv->txqs_n = 0;\n \t\tpriv->txqs = NULL;\n \t}\n-\tif (priv->rss)\n-\t\trxq_cleanup(&priv->rxq_parent);\n \tif (priv->pd != NULL) {\n \t\tassert(priv->ctx != NULL);\n \t\tclaim_zero(ibv_dealloc_pd(priv->pd));\n@@ -4750,7 +4591,6 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n \t\tif (!(conf.ports.enabled & (1 << i)))\n \t\t\tcontinue;\n \t\texp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS;\n-\t\texp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ;\n \n \t\tDEBUG(\"using port %u\", port);\n \n@@ -4808,30 +4648,6 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n \t\t\terr = ENODEV;\n \t\t\tgoto port_error;\n \t\t}\n-\t\tif ((exp_device_attr.exp_device_cap_flags &\n-\t\t IBV_EXP_DEVICE_QPG) &&\n-\t\t (exp_device_attr.exp_device_cap_flags &\n-\t\t IBV_EXP_DEVICE_UD_RSS) &&\n-\t\t (exp_device_attr.comp_mask &\n-\t\t IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) &&\n-\t\t (exp_device_attr.max_rss_tbl_sz > 0)) {\n-\t\t\tpriv->hw_qpg = 1;\n-\t\t\tpriv->hw_rss = 1;\n-\t\t\tpriv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz;\n-\t\t} else {\n-\t\t\tpriv->hw_qpg = 0;\n-\t\t\tpriv->hw_rss = 0;\n-\t\t\tpriv->max_rss_tbl_sz = 0;\n-\t\t}\n-\t\tpriv->hw_tss = !!(exp_device_attr.exp_device_cap_flags &\n-\t\t\t\t IBV_EXP_DEVICE_UD_TSS);\n-\t\tDEBUG(\"device flags: %s%s%s\",\n-\t\t (priv->hw_qpg ? \"IBV_DEVICE_QPG \" : \"\"),\n-\t\t (priv->hw_tss ? \"IBV_DEVICE_TSS \" : \"\"),\n-\t\t (priv->hw_rss ? \"IBV_DEVICE_RSS \" : \"\"));\n-\t\tif (priv->hw_rss)\n-\t\t\tDEBUG(\"maximum RSS indirection table size: %u\",\n-\t\t\t exp_device_attr.max_rss_tbl_sz);\n \n \t\tpriv->hw_csum =\n \t\t\t((exp_device_attr.exp_device_cap_flags &\ndiff --git a/drivers/net/mlx4/mlx4.h b/drivers/net/mlx4/mlx4.h\nindex 726ca2a..fa703a2 100644\n--- a/drivers/net/mlx4/mlx4.h\n+++ b/drivers/net/mlx4/mlx4.h\n@@ -242,19 +242,13 @@ struct priv {\n \tuint16_t mtu; /* Configured MTU. */\n \tuint8_t port; /* Physical port number. */\n \tunsigned int started:1; /* Device started, flows enabled. */\n-\tunsigned int hw_qpg:1; /* QP groups are supported. */\n-\tunsigned int hw_tss:1; /* TSS is supported. */\n-\tunsigned int hw_rss:1; /* RSS is supported. */\n \tunsigned int hw_csum:1; /* Checksum offload is supported. */\n \tunsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */\n-\tunsigned int rss:1; /* RSS is enabled. */\n \tunsigned int vf:1; /* This is a VF device. */\n \tunsigned int pending_alarm:1; /* An alarm is pending. */\n \tunsigned int isolated:1; /* Toggle isolated mode. */\n \tunsigned int inl_recv_size; /* Inline recv size */\n-\tunsigned int max_rss_tbl_sz; /* Maximum number of RSS queues. */\n \t/* RX/TX queues. */\n-\tstruct rxq rxq_parent; /* Parent queue when RSS is enabled. */\n \tunsigned int rxqs_n; /* RX queues array size. */\n \tunsigned int txqs_n; /* TX queues array size. */\n \tstruct rxq *(*rxqs)[]; /* RX queues. */\n", "prefixes": [ "dpdk-dev", "v1", "16/48" ] }