Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/26390/?format=api
{ "id": 26390, "url": "http://patches.dpdk.org/api/patches/26390/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1499179471-19145-6-git-send-email-shreyansh.jain@nxp.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1499179471-19145-6-git-send-email-shreyansh.jain@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1499179471-19145-6-git-send-email-shreyansh.jain@nxp.com", "date": "2017-07-04T14:43:56", "name": "[dpdk-dev,v2,05/40] bus/dpaa: introducing FMan configurations", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a3085a60022ba23dba17a9975b5655d453a75b46", "submitter": { "id": 497, "url": "http://patches.dpdk.org/api/people/497/?format=api", "name": "Shreyansh Jain", "email": "shreyansh.jain@nxp.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1499179471-19145-6-git-send-email-shreyansh.jain@nxp.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/26390/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/26390/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id B0D5F7CE7;\n\tTue, 4 Jul 2017 16:35:52 +0200 (CEST)", "from NAM01-SN1-obe.outbound.protection.outlook.com\n\t(mail-sn1nam01on0076.outbound.protection.outlook.com [104.47.32.76])\n\tby dpdk.org (Postfix) with ESMTP id C58CA7CB8\n\tfor <dev@dpdk.org>; Tue, 4 Jul 2017 16:35:48 +0200 (CEST)", "from BN6PR03CA0091.namprd03.prod.outlook.com (10.164.122.157) by\n\tBY2PR03MB474.namprd03.prod.outlook.com (10.141.141.149) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id\n\t15.1.1220.11; Tue, 4 Jul 2017 14:35:45 +0000", "from BN1BFFO11FD036.protection.gbl (2a01:111:f400:7c10::1:145) by\n\tBN6PR03CA0091.outlook.office365.com (2603:10b6:405:6f::29) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1220.11\n\tvia Frontend Transport; Tue, 4 Jul 2017 14:35:45 +0000", "from az84smr01.freescale.net (192.88.158.2) by\n\tBN1BFFO11FD036.mail.protection.outlook.com (10.58.144.99) with\n\tMicrosoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1199.9\n\tvia Frontend Transport; Tue, 4 Jul 2017 14:35:45 +0000", "from Tophie.ap.freescale.net ([10.232.14.39])\n\tby az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tv64EZM6n016426; Tue, 4 Jul 2017 07:35:34 -0700" ], "Authentication-Results": "spf=fail (sender IP is 192.88.158.2)\n\tsmtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed)\n\theader.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com;", "Received-SPF": "Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.158.2 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.158.2; helo=az84smr01.freescale.net;", "From": "Shreyansh Jain <shreyansh.jain@nxp.com>", "To": "<dev@dpdk.org>", "CC": "<ferruh.yigit@intel.com>, <hemant.agrawal@nxp.com>", "Date": "Tue, 4 Jul 2017 20:13:56 +0530", "Message-ID": "<1499179471-19145-6-git-send-email-shreyansh.jain@nxp.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1499179471-19145-1-git-send-email-shreyansh.jain@nxp.com>", "References": "<1497591668-3320-1-git-send-email-shreyansh.jain@nxp.com>\n\t<1499179471-19145-1-git-send-email-shreyansh.jain@nxp.com>", "X-EOPAttributedMessage": "0", "X-Matching-Connectors": "131436525454945451;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); ()", "X-Forefront-Antispam-Report": "CIP:192.88.158.2; IPV:NLI; CTRY:US; EFV:NLI;\n\tSFV:NSPM;\n\tSFS:(10009020)(6009001)(336005)(39850400002)(39400400002)(39380400002)(39410400002)(39840400002)(39450400003)(39860400002)(2980300002)(1109001)(1110001)(339900001)(199003)(189002)(9170700003)(86362001)(6916009)(53936002)(5003940100001)(8656002)(6666003)(77096006)(38730400002)(2950100002)(305945005)(50986999)(76176999)(104016004)(110136004)(575784001)(54906002)(2906002)(53946003)(5660300001)(47776003)(36756003)(85426001)(189998001)(498600001)(8936002)(68736007)(81166006)(626005)(8676002)(2351001)(33646002)(356003)(69596002)(50466002)(50226002)(105606002)(4326008)(106466001)(48376002)(2004002)(579004);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:BY2PR03MB474; H:az84smr01.freescale.net;\n\tFPR:; \n\tSPF:Fail; MLV:ovrnspm; A:1; MX:1; PTR:InfoDomainNonexistent; LANG:en; ", "X-Microsoft-Exchange-Diagnostics": [ "=?us-ascii?Q?1; BN1BFFO11FD036;\n\t1:o+m0eKlR9x1bTxbNpWAmbmyeXnqBcI6ujuXrRIibk?=\n\tqc4v5fHJN5SGixQh/wKCMCw7udsb1OZAH1M7RmoidoyyHEtMdmDKhgcyGlXDvFSy+hWxJKtmjG9qfgaVJMrlxnPdsnzOnVEvO/k4BLYieUFvEqCY+fDnYNonq2EaWGp50qct+zqURSnN8dBY+fSjFhNArIxScccWvU891M5W4EbcitK7L0JyA9dG2Omz8GsrD09Ttr0gu0n+1ZGTCI6YFE9G+1h0xYWjP+6mEsp8MqdyC/Gw1HTi1/VKCmA/SEv1m2z3A2IM1RLJrxAvEaJVIfzaz9Mh3n/IVe1LjYFlZrFFSlyw/N+kSzSlkVdvScW9+aWUhdQDqx1uFIAm2Z/FLSuMJEczw9ooJBj5lBDrjWGyZNfQ7Rh/5NPf0mTP9qr2CGHvvkooPShbGPn5vK68PeXiiRzq9Rwko0ds/cnl5xG4pBTx92PR/ZATO9SP/FvxJa/TEtGryX6Ns6UF7zc4e2ipRz/adHSCcU9B5/uEJoz86Xm3+Zw88PEWmV60dqBKUCRGFq/hPCQvPqGvhp6iuaNm7ZXKzTDUaRz7RxiTIgPiJTkvf7OF+aDqAb+/ewgYFa3POC8GSUg4kioHQzj+C7vY04I9tT5mqzPHtKPQ6/fKb9hFzU6yUvuy04DZTTXJgfgwRysYNt7voYlzH11aLdivL10avjRtZ48aC71bBvdsd58G559lcZdcxX+fG7Fk26OMFg5zI9clLriTWIlMv+GyV4IYEHc3/0H860QNb3psMUDZBnoyiXuNCrQXbZ4ICMplBUvWbKi4gFKTMTuONSjQBPcqbTWBiNllC6vSrd9TZs05vD8ioubFSqnzxwkEQqVbjUiIDtBQ/PzBUwlAGYBbWkQTIarY7Nt2TkdCvsJjVU0jdUIgddUlVsWo8LjUqL0zFELNQcIIxM8LrUwC9hw7ooCgH8VCWAkJGUTXmSJQyhC+2TLcS1mUlBdR7xL+g30JkCe9LfWDXhV0jeMN8vawcWqcFijYtKgrpmp8kJJKbGFVNEfX4H4l9q14PjslPBh6a964wSd9Uhdh0ES8C3YQvSui6dDdiTdeB/gU/9wZQ==", "1; BY2PR03MB474;\n\t3:lCBweF8BNx772xn7K6XKupA6/682rRdZjrBKM4u0/a3oAq8Shp/pndpvtYk0WAfMYmKrz6jwzGSaf1EyPHiwrTjOfEQC2/3yrlvwnIMyZJxZhuu1HEKs5BtofRclYiWLyAvEwyl7W3AIOjthhpybCxIM3MbiFlct66W7Y4Xs6feBg62st6hMa/GEFNhQirbXo4s52UVn3es3YTfvVyG1sdvWyYCd5UfDGi1SICUepDAwp5dVuoEoIuD37dRmUVT+F20jPDavIp8FRKjZvjXIpUezMm9cMRX0DF/qod9zJuoA1wElb3xuLJBR2J5G/xLSw02zhOlZ+BsV6NmImkYR3MpohYroGmUrTmUB/mlArdVcOKAakVLM+Y3+qt0dGaO3apqjJWjtzfkcN5DhAE6DcvoxH5rQyJsLxXJ8CQjNg/49UK5knoQVnsOC0q/GfG56YeIiBiwP4k7lxJ54gk02ItKkNy38xDOc24IwRHnkhm+X7iuX2bHd1mC67qaK+6eQ/cwbUxbgE5ClxNVavhOkymrV1nxJdkwzPYLM1/Q35ySz0qrc3e4WjLXi99mFNEmUSlZ6OKNG62BkwM37t+Eb0A8mXkHAomr2yBkfuI2GPbOcCTdEukhY75q5va4H0D0Nphr4Qdpb+dPUSlYVnQxNmWJktdix/9CpDzI/svhcMO7G2hN0mCR1VL5DDW5LANVgHZu2Q47BZ8WInFo94/D0zIgGVEhOsPVkgYtP9+iyGEM8VPyWSJ38GQdLRpr5SMlLSOGTEYX0HM1BFxb26MCFS5dLSb41bwxqcjD4XdeYLAfDsfP3UY2iAL2iqemubQ5sMvUPdUXUZIrr6BqS9w6CGJE1dF5NEaDT+RJ8is7Ayp8So1LSr2Q8Iuuq81eDREO8", "1; BY2PR03MB474;\n\t25:/atpjR/cLeBjHew4FuMpls1E9hgxb829+/PV71VmiS4y0NrLkV6C4RJfRWRocaNyK7uMs+UeCD3a96vjq6etbNP3+ja5NzblG2qis2o+pwTF8kh86de0aVTEpwTl7WOyz+9RHXmLWja3I8TXaP4zmBqCjKNXGfITlxDNbBNFN7Aaq0T29jlAfwgJEQP24K6oQgcbvXVo8mYMCAvUsrAhDT73JHXw+X5TV7nWaFfyZVWvqAeZDsXl3wqYz/fH73IBgPO+bpL5hWpdegJTyPD67pTaIP7iehmDrNWQEOdaHqRwkwX3+D1e4sypPIglCMFd2sQhmE5SRoRhbSnf15r13yFcB9+W4cgvcd37EMUZ5ziLs35pb5l/N4iA4u9YO0lw+gBMi5HLSUBpHXAsJsFsL4ddPAt52FGsAga2Wu5YVqUK2ywPqNyy9uyr77R1mS40KT2gFysrTeOUECDqKjMmStWfJeCFPuo1sDF/8Mc9O5L6wk9GcK72IkusdyISLpJIbzMFpk2izOqKtDJC1fUQDIL0L0Lgtm/ll1rPPxoxGTL+eH4thdIkE0lhtSmZ9mridzKXpx0bBkOttpP4CcJ7bB3xrc+zCZAHxs1f02gZrgyOKpfZ6rh3R0CpqSt4YoRR9gq9zhZgWUfksG/7zzKsDirhn6AwhNdQqzpjDVvPdIj3B0BsOH9e8GUX1Sk+MPxJv2mnXun92DohhrGneSiQE30LIuIkCNZX0P6tIi1pOlLIcD1OK7pf0mM+kKcJKy0gwXjORHnzxfOz0tMAUBXQAU0nFqppHaQmyILKj4U2/V/DNCw0euh+HhwljJojLSfHdpxm/+20bdchf+4Ig+xSM62+1oQy3ffSGAP4XfIoYQo/3HJ7CA/W9I8Ic5PENfKUG6/PT7+RGNTyJ5666jneZk9ku1RZ8vzUqCtdJenaUuM=", "1; BY2PR03MB474;\n\t31:2/2RjpJDgMCTDszc1mfkgyb/fTUpX0oEknTJmid3zl77BZin3IAK//1vF8+EFFQ8n/vZNtUhpI7Jvf2KZKXxB15PIdhylYcQ1cYBszSVAQup0VWruyKF+0SWqd+BxBjVf4+wfPA5nrsZsZMWJGwjbdWHx+0b1Sjlk8FnNhyVS4ewBxZdTvWQhEouxl85tQ4ntLqxnCEWco65JLD4wwMJ2vCoZX5H1Qf2Qp3DrM7/Jrnw2W0Op0jPZqHNs5BoluTiNlfEQ/xYpvzBqw/fbyUj/jqnDw4sOrsq/m+lwj35Dp3p88jTYG51EdlKWRfkx3+p4mFVlEyt+Gw25fs3Ls5oIZEVoE7ZpNPofkHwHCk3248i0QkFZdy1xUJBwpIHba06iVTkwrr8RdRqTGGD98b+Hrnofk+4twK7UABQ50J/xlDGlvvxuQip0gp7Cijjkj5ETuhGLJpZ4kWoKmoinx7TI3IymLJh1veUNY5U806nQ17ANrSFqQ5nYWN47uET5Bn6X4PXiEwI6ryOV3LVPq/59ybrgvD/VAFGW03uIPKGny2im7tWiL23UaeVS8F2BeDubjIoC5kK/RYzXZTgKWMED+SLuP2BRNtbu/z7VmjHL/dOovD8H79rpJEN+a/r+fkGnf/5SQlKrm0p7lU0N0aoPL+IMHbqnA44215aE/Di5X6TVieNjJqMs4hE+7leMK29Vxbgt6d+ZEAHec4F64KlcA==", "=?us-ascii?Q?1; BY2PR03MB474;\n\t4:JEN1vPkEgDeabaU0u+8WvHVPmOPxEnmwbKH6RAKEZIm?=\n\t60YpYnRFpYY/6DsSdioOLgHNs1ay0081BavsCTy3b+bZRogotRqwTrfd3FwV0BgC2xQn+ZRMVw1Lrcfx4JQ99DQ9o2+tEqFxD1UHAj9ou+h8o4qhPujXzMr3N2cL7Y9orp25xAg96qBpDPfzmPyRyKqtrAELuLJ6+kHL7YdnNhI0XpvXSP3v0r3+e12ZOcUY+AZzNCnzb+PvrrHBFlEVQlxLFAHdR+5bs86hpSX0N2rm8ptjvpqqxCtY1sTl9SunOB+Ih0CHhHXFFvPswN+AOifkrh9hFWktaUItXgWj28otzaQBRksyY5GAZBepR5benMQ6EcUnedcXLi/8LEdmvJkh6yA8djDVAFHsyMIh46ZFQOdO5Bl1U6UXaNsSpxbgsK0pHPkLAr4KCY2OdQ7wqiPEWkjUElfv2rjOv1zDHN9TZ6LaV1S1GajI0x5lBeAw4seZcaV5eZ8yPQiCzRGoE/Jt/svrtid38cCEtKgFBPD0d6smPQMuGDtJnAPR6HUkAQus9E6lFjCCCmNAN0toSL1aDDhQblyTac4TLQPPIHxjxUjJwg6oIpdWvei23uLZHu/WeXu62A0kpcF6WBRzedBZA3r63TVAeVDzNDlAOGWSS9+UiwhvTz6BzZwQgKPMipSAikL6dZ4poRfXfSvztrLa2JrlInmIfl+5aC0HuLB/hurSTPpIOwFXMdHy/RlDfIFhQFGN3cYbN92c6exWP7+vGDPtns2sXcN8/+XE+6PFT0dUOIzHz8bTnDlbTILI7IfvPpmaRIyQEP7MhHSUJkdRmLDNVVB+slAa3yqwFp1/RDwy2iXselK5i+CAHilr+pmQhU6SpazfdGNg57xJvOOcPqceq4N1Zu0NTPxzuBvVlqW5X17nYDuowI9OjVSZLCDtBpy8BgSPDycilX/pLhAE2T9RD51bBgf/BnrmAe8u4LJTCUs1XbkPmjP5UAcv0P7nUe/CojW2v0KyRZrORXyj+iwYKiJBSqfEwI/VmWZbzh0wK+PYHXZx57oBSJI9YkkbRPPEkNaWIe6dfovkUXT5EL832gvxi+M3F0OyuWUlcVygySZy8lB+q80y+T7OElM3JcxblRmUjlwnu+/uN4MJM8PgoVDTI/WXwjqJRfRn/pIQ9VIMQ6uTFCOemHHZ+HcdJaljEtC2G9OuKd6X61Y5BJ40IzuybkSSFnJwmXDH3/KDROlDGVtKnGMusn+apg9kzHi053lPhfy5k7q9i0US3J59FHIXKDdUNWSaVltYFyjdcV7cf88EU8xnMltcEtIU7Y9Nn++UGLIR0Tu06kjgBpRFqwnyuJsWyIoji4Dv24kY3NSYNEUT7VzDv4uTxjNl2VreGSUEwP615anHw", "=?us-ascii?Q?1; BY2PR03MB474;\n\t23:t/sISl7suugSiDDxlqismIcKKAdhkWQI9jKFMRR31n?=\n\tG3TCPBbGxyuQNlLJLW88cnAZ/+Ey25nw7gmXv5wsIPx11IfF2ff+gKi5URyFlvmMA/j/prSl6HGTkLiQYOMPTFbUDZBLboq6DDk5Ljocz6CcOoiApURxqJM4wrc8HfqTP9iKgbIVe9Wg2JxkbEOhvyzPxi6eHm18D+KY4G7qn1hl8r39guexUOf2sE+pzRCzpgGzNFY+Xmq6NXlB45nwD+DoHNariRTs0VY+9dCkunnxnYPFIt1e1OEUsjZdb7y56APbrJxtj5HxXXfLe2x/YcFVxVq61eQDo2HgL2c/uBWOFdD5tCeHDrr7Y/FOONGyy0KHtvTONK4Fcr8KzoJmhKgkR2g9pa/OODYilAsCA8D4tbIQNmncm3VsA3entX0M5LjkU+XkWmWf2ueI8ExMWNxCi50aBPR3Hd8pOx7i+JqdHDvaGKrDwygfWC/x4kr58YkjUZ1q0+0dOBuM9MFjUPY9kWw5rST616j39b0FGOkjlxD4Wdjl7gx4MptzSk0Jen9ZNJFRQQCYdoZ6u3e0GRZfm4OtQQSJwnfq/QNfVCa5SRw5MgLl/+WbFy9ki9GcfxMLGlNiYjwDs9euoqQXnY+6deKT5qdIg0wITrADr+xHZREoOOwdO4orwlRdwq7YTks56FcmtlRpVDKtQHqPDVT5rRp8ZuzE/QGwsxPXRlCUn9usnXUEzvEwZVkB3Wn1xVHoI3F0M+RFS8DCAmgv3MjH6Fz0+qmcfHL5UD8xBxxjR5NPtYAien53maWCRY3RnzKu4AFE8tA9IuGGfgg2dqORJLoWwBjtmfWc33fuMpH1DYrPDynwNanCkUVIrfwqRpx/BsqCqqRKz19xmzDmEQtIwECRUjV86vuRj7GccXM27yGn2TXJXwwEHmwmBgQ6MwZ/Xh4jTCvyCLYc19JZTsZUzHpIzysYjRhZyGtByBTOnxhgqF2XylNQnaC7O0HY2mIpfS63ER4Dr9UrJvZ7WXWgqLA6KoaCHi5k9Rkoc2TRuFlVzgi6gSWVx1YcuBZQYgqo86IGTL174ZFjcwaglzryf9dtYfF+IKX038v1l24oY8Ztt3jn+zX/S8W0za8HxCDtVSccoDewFZl7eME3i6ZJXT1ffoVle6mLAfSPWxrtT1WstMI3T93aWy+mZeAZCpfYx+fRvUoYMuDQBxtqCTqwQC0B3r+H2nrQg3J6GxRwJ2PQs4y56V45spLS3n1qOFoJMRlW4ZbLhpxeSVh3BF7P8rskIxsr5kYQcws4C75ziuMD4fHsx0RLoGSB1xEd2SyM0T+1moK2oGa7V4EBbGv+buSPpqlQPdCCwAJWW05V1/AxDvmXxiz1ArwQcpc9o=", "=?us-ascii?Q?1; BY2PR03MB474;\n\t6:MoltiEZygejYIBt8pX54Zds2A4VODj+Q44Ry1vEb+pQ?=\n\tsl8hUXfJ96ZWXRx+fq1HuxdZNK6eq4pyKKa1WL9SiskqPjIaBdeuzjQsMQ1Jv1RQEqt/Yz22wv8xBrw+JLNQIYTiADhvby3vblPL9A+Oo4cFdMMaAvp9ew6STdfaIFQiR6aUeuArY3nem1uvxe36w19qBPE4mjhXLm+R8wFrtt7TltioqT3x10/BF8m59bK6tGaF7Pr4ECrxa8XmifVploCJr44ECT8f8zPrDgRD7rFiY6AMu60Fws8h8ujzLsBmAWGCKfuJNG179FzgBzIRUWxfT+hcZMzoD8LVYkCEsM0/kNksMlin63ejeinN6Mi33FVtJOsAReZgB/9qw146rHuO079E8WF+xs/oimAm9Cn2VxddGPf2qu9kMjPFFC0PTP6pXST4E0w7UfXmDuMIgLJnMXBOaM6/FihfnPLBricrLlp761Zv5JiEfvFfO9B/uwQbXgwffDISIWxkd8XhKWH0HNEXpF/uqCnUxCbohHUY0gCYllqXPIilJkIA5j4TU6x5R0m2pLLyEt9JB580M8ptHCzvABdJpATBhW3w+BvTlpj/6SnlIIpt6pGXS7U968sg2ZyJDXKPePgpBmcGdM1OJBvsrY/e1RH8isKJtwnga633KKHBodYbUVZTIQ233D04EFSDFqRH7My6vIM+3fqX+DpqZ5WMZlq0Zovt4wkktVmQIS1JuVVCIGbUJvGihL4PB60GjCk6EBsTmtdZKMjoAKbRM9IA5YYGdi+vo9i6o0wUF5gg2tjtvFQcgcIfds1q+4CTYxjLRqe48HOiRPz71k82X2tAf4ifVu2wRZR99WIKR+NNzOjgsV6xZkHXjo4me4Fch/1k+1yvvQVoFnUD5xUFLHzvLK1sGrF4pcLx6yVh4yYgKiphoNraHQrhkJCm9LyPPqtGNYA9WmSZ0wr1UYaSQSxkwR52bVpbGNA==", "1; BY2PR03MB474;\n\t5:KjBU5A1Z+a/1wvSMEzhXWqqkLw08sbN2OEi73AxkPb569/Oa7NtOB4OZkpvdqwx1QJXv15GDMqtQ//Mva6sAww2w6k6LyWhIAqGz5vcyAUgw4V3UzaxLafiu9KVAbqGBpDjMWPpvwvizUm4YQQalr6YJ7PTAt6q5i1bmPLmBuTR1QhChfsgKrrvd5uHAAXrFVfJvD58WMQzsC0NrwACrfW0TDYZQgjJpEQJo4Qp0e7JWlc9+jAjprDeD6AoA0sXOAsOIXApYIXRwhaNDagf7T0c0yYzxFD8JiyaVD/sQTgx3WATk1Ty9tcLjmmex220XwLAKywxN1uTmOO62ihtVtoA1EUuQgriiHOZ4g0KXIiBNBQjfofAd3eHTPXszzJGiUqTW1r9Nr0/vpgnTLPT8OxvHG4W43fQW2RrWTwmVNeuVcpysCAy0j6P1fITy3ShPngiqa2igKvCT1EhpvPPYhzVYB2mma8E44UK+Bu3DuXkIEqksfCEjgDUWW+Qn1I/xtV5ivmUw71mcNyQ0xrO8YA==;\n\t24:JFizTPJG1ESSgf5KzdRU2TrkpwqbaUy6q5V0xMNBbxV9IzKdSTHC/TumJHPEGsw7R/qsYxVWKgdl8yvkT8+bU/RJZ7AaDIB8K8Dfd7cTLcY=", "1; BY2PR03MB474;\n\t7:T62L3I5baatRiwkGBw57KzLTqZMngBukWngdloei4h+yEACYqJCM80Cf5c7rUWOG8MuMjq+a7JJ/TOsCYfpTTsFS+yGyIHk3WSkaSgjh84Pb37jevB5gLDIJPunkMes+2EDhzu6bPM+JjaDDJ7nCHGpenQJYEjt/yC/WhvY4jA7gss69P1GQ4t0RN0gCqkYLjm8uBsF0XtVpa+TVXoui65IBMpK5RcKalkLHU5vRWwb5LPyW5i5EAKcPFBPRmYT07q4ERIIv0mZXO4lfPrDcN4VtsiHXS8AlNrBtMK8rNg/jy8Pgaj6Y/3AQNV3pWCkforTmsIqEq46KCgZa/OKGzKboJWXecF60zl9JA35qGuKlWeixm5/s/orK/x50baJIe8kRZjOPkVqbY4z0WS5gJEXaBsTLxFbFbd3TKUEmbGf8OuoUOhDwy2hoXfhin4B3qQr+PTggk/Ja9QdXE20lUyLFvnTjaOeyagy+/Lq9OqzJ/TYRxk+hLQsegtW/AVXsB5S224beLzFbZ24psOSSl4WB16gGvFLBEY9w7nJCev1BXyZH7Y0IT11K+9G+g5C7eiEVnrfXVBEF7rR1KBn9L3I0LGfnC7OSZdjab3CSvvtiTZSFmdYSs7F7PNh+pNOTohTmsNwee/iE6b+FHEHo5VNNU52xpGxB0BlIu81KQ73onXjqlgFP0nybfq+BMCskb4XaoJWfOnMeaI5HVIGf0QdM1V+N7EOagO7txW5BsXPt8TbJrmhSglro25UTlLmDxMIbnXc4FJOwCAFJ/7H/A/3issvQ9yitTRHlt/7ONVE=" ], "MIME-Version": "1.0", "Content-Type": "text/plain", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "e6b533e7-36fb-435e-8b4b-08d4c2e9f4b5", "X-Microsoft-Antispam": "UriScan:; BCL:0; PCL:0;\n\tRULEID:(300000500095)(300135000095)(300000501095)(300135300095)(22001)(300000502095)(300135100095)(300000503095)(300135400095)(2017052603031)(201703131430075)(201703131517081)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095);\n\tSRVR:BY2PR03MB474; ", "X-MS-TrafficTypeDiagnostic": "BY2PR03MB474:", "X-Microsoft-Antispam-PRVS": "<BY2PR03MB4741CD0BE76BD5F28C491B990D70@BY2PR03MB474.namprd03.prod.outlook.com>", "X-Exchange-Antispam-Report-Test": "UriScan:(236129657087228)(185117386973197)(48057245064654)(148574349560750)(158140799945019);", "X-Exchange-Antispam-Report-CFA-Test": "BCL:0; PCL:0;\n\tRULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6095135)(601004)(2401047)(5005006)(13016025)(13018025)(8121501046)(3002001)(100000703101)(100105400095)(93006095)(93001095)(10201501046)(6055026)(6096035)(20161123559100)(20161123556025)(20161123565025)(201703131430075)(201703131433075)(201703131441075)(201703131448075)(201703161259150)(20161123561025)(20161123563025)(100000704101)(100105200095)(100000705101)(100105500095);\n\tSRVR:BY2PR03MB474; BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(400006)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:BY2PR03MB474; ", "X-Forefront-PRVS": "0358535363", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "04 Jul 2017 14:35:45.2605\n\t(UTC)", "X-MS-Exchange-CrossTenant-Id": "5afe0b00-7697-4969-b663-5eab37d5f47e", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.158.2]; \n\tHelo=[az84smr01.freescale.net]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BY2PR03MB474", "Subject": "[dpdk-dev] [PATCH v2 05/40] bus/dpaa: introducing FMan\n\tconfigurations", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "FMan or Frame Manager, inspects traffic, splits it into queueson ingress.\nIt is also responsible for directing traffic on queues on egress.\n\nThis patch introduces FMan configurational interfaces. This layer is\nused by Bus driver for configuring the hardware block.\n\nSigned-off-by: Geoff Thorpe <geoff.thorpe@nxp.com>\nSigned-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>\nSigned-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>\n---\n drivers/bus/dpaa/Makefile | 2 +\n drivers/bus/dpaa/base/fman/fman.c | 540 ++++++++++++++++++++++++++++++\n drivers/bus/dpaa/base/fman/netcfg_layer.c | 205 ++++++++++++\n drivers/bus/dpaa/include/fman.h | 472 ++++++++++++++++++++++++++\n drivers/bus/dpaa/include/netcfg.h | 96 ++++++\n 5 files changed, 1315 insertions(+)\n create mode 100644 drivers/bus/dpaa/base/fman/fman.c\n create mode 100644 drivers/bus/dpaa/base/fman/netcfg_layer.c\n create mode 100644 drivers/bus/dpaa/include/fman.h\n create mode 100644 drivers/bus/dpaa/include/netcfg.h", "diff": "diff --git a/drivers/bus/dpaa/Makefile b/drivers/bus/dpaa/Makefile\nindex cc685d1..49abdc7 100644\n--- a/drivers/bus/dpaa/Makefile\n+++ b/drivers/bus/dpaa/Makefile\n@@ -65,6 +65,8 @@ SRCS-$(CONFIG_RTE_LIBRTE_DPAA_BUS) += \\\n \tdpaa_bus.c\n \n SRCS-$(CONFIG_RTE_LIBRTE_DPAA_BUS) += \\\n+\tbase/fman/fman.c \\\n \tbase/fman/of.c \\\n+\tbase/fman/netcfg_layer.c\n \n include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/bus/dpaa/base/fman/fman.c b/drivers/bus/dpaa/base/fman/fman.c\nnew file mode 100644\nindex 0000000..f1cdcf1\n--- /dev/null\n+++ b/drivers/bus/dpaa/base/fman/fman.c\n@@ -0,0 +1,540 @@\n+/*-\n+ * This file is provided under a dual BSD/GPLv2 license. When using or\n+ * redistributing this file, you may do so under either license.\n+ *\n+ * BSD LICENSE\n+ *\n+ * Copyright 2010-2016 Freescale Semiconductor Inc.\n+ * Copyright 2017 NXP.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions are met:\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in the\n+ * documentation and/or other materials provided with the distribution.\n+ * * Neither the name of the above-listed copyright holders nor the\n+ * names of any contributors may be used to endorse or promote products\n+ * derived from this software without specific prior written permission.\n+ *\n+ * GPL LICENSE SUMMARY\n+ *\n+ * ALTERNATIVELY, this software may be distributed under the terms of the\n+ * GNU General Public License (\"GPL\") as published by the Free Software\n+ * Foundation, either version 2 of that License or (at your option) any\n+ * later version.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE\n+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#include <sys/types.h>\n+#include <sys/ioctl.h>\n+#include <ifaddrs.h>\n+\n+#include <rte_malloc.h>\n+\n+/* This header declares the driver interface we implement */\n+#include <fman.h>\n+#include <of.h>\n+\n+#define QMI_PORT_REGS_OFFSET\t\t0x400\n+\n+/* CCSR map address to access ccsr based register */\n+void *fman_ccsr_map;\n+/* fman version info */\n+u16 fman_ip_rev;\n+static int get_once;\n+u32 fman_dealloc_bufs_mask_hi;\n+u32 fman_dealloc_bufs_mask_lo;\n+\n+int fman_ccsr_map_fd = -1;\n+static COMPAT_LIST_HEAD(__ifs);\n+\n+/* This is the (const) global variable that callers have read-only access to.\n+ * Internally, we have read-write access directly to __ifs.\n+ */\n+const struct list_head *fman_if_list = &__ifs;\n+\n+static void\n+if_destructor(struct __fman_if *__if)\n+{\n+\tstruct fman_if_bpool *bp, *tmpbp;\n+\n+\tif (__if->__if.mac_type == fman_offline)\n+\t\tgoto cleanup;\n+\n+\tlist_for_each_entry_safe(bp, tmpbp, &__if->__if.bpool_list, node) {\n+\t\tlist_del(&bp->node);\n+\t\trte_free(bp);\n+\t}\n+cleanup:\n+\trte_free(__if);\n+}\n+\n+static int\n+fman_get_ip_rev(const struct device_node *fman_node)\n+{\n+\tconst uint32_t *fman_addr;\n+\tuint64_t phys_addr;\n+\tuint64_t regs_size;\n+\tuint32_t ip_rev_1;\n+\tint _errno;\n+\n+\tfman_addr = of_get_address(fman_node, 0, ®s_size, NULL);\n+\tif (!fman_addr) {\n+\t\tpr_err(\"of_get_address cannot return fman address\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\tphys_addr = of_translate_address(fman_node, fman_addr);\n+\tif (!phys_addr) {\n+\t\tpr_err(\"of_translate_address failed\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\tfman_ccsr_map = mmap(NULL, regs_size, PROT_READ | PROT_WRITE,\n+\t\t\t MAP_SHARED, fman_ccsr_map_fd, phys_addr);\n+\tif (fman_ccsr_map == MAP_FAILED) {\n+\t\tpr_err(\"Can not map FMan ccsr base\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tip_rev_1 = in_be32(fman_ccsr_map + FMAN_IP_REV_1);\n+\tfman_ip_rev = (ip_rev_1 & FMAN_IP_REV_1_MAJOR_MASK) >>\n+\t\t\tFMAN_IP_REV_1_MAJOR_SHIFT;\n+\n+\t_errno = munmap(fman_ccsr_map, regs_size);\n+\tif (_errno)\n+\t\tpr_err(\"munmap() of FMan ccsr failed\");\n+\n+\treturn 0;\n+}\n+\n+static int\n+fman_get_mac_index(uint64_t regs_addr_host, uint8_t *mac_idx)\n+{\n+\tint ret = 0;\n+\n+\t/*\n+\t * MAC1 : E_0000h\n+\t * MAC2 : E_2000h\n+\t * MAC3 : E_4000h\n+\t * MAC4 : E_6000h\n+\t * MAC5 : E_8000h\n+\t * MAC6 : E_A000h\n+\t * MAC7 : E_C000h\n+\t * MAC8 : E_E000h\n+\t * MAC9 : F_0000h\n+\t * MAC10: F_2000h\n+\t */\n+\tswitch (regs_addr_host) {\n+\tcase 0xE0000:\n+\t\t*mac_idx = 1;\n+\t\tbreak;\n+\tcase 0xE2000:\n+\t\t*mac_idx = 2;\n+\t\tbreak;\n+\tcase 0xE4000:\n+\t\t*mac_idx = 3;\n+\t\tbreak;\n+\tcase 0xE6000:\n+\t\t*mac_idx = 4;\n+\t\tbreak;\n+\tcase 0xE8000:\n+\t\t*mac_idx = 5;\n+\t\tbreak;\n+\tcase 0xEA000:\n+\t\t*mac_idx = 6;\n+\t\tbreak;\n+\tcase 0xEC000:\n+\t\t*mac_idx = 7;\n+\t\tbreak;\n+\tcase 0xEE000:\n+\t\t*mac_idx = 8;\n+\t\tbreak;\n+\tcase 0xF0000:\n+\t\t*mac_idx = 9;\n+\t\tbreak;\n+\tcase 0xF2000:\n+\t\t*mac_idx = 10;\n+\t\tbreak;\n+\tdefault:\n+\t\tret = -EINVAL;\n+\t}\n+\n+\treturn ret;\n+}\n+\n+static int\n+fman_if_init(const struct device_node *dpa_node)\n+{\n+\tconst char *rprop, *mprop;\n+\tuint64_t phys_addr;\n+\tstruct __fman_if *__if;\n+\tstruct fman_if_bpool *bpool;\n+\n+\tconst phandle *mac_phandle, *ports_phandle, *pools_phandle;\n+\tconst phandle *tx_channel_id = NULL, *mac_addr, *cell_idx;\n+\tconst phandle *rx_phandle, *tx_phandle;\n+\tuint64_t tx_phandle_host[4] = {0};\n+\tuint64_t rx_phandle_host[4] = {0};\n+\tuint64_t regs_addr_host = 0;\n+\tuint64_t cell_idx_host = 0;\n+\n+\tconst struct device_node *mac_node = NULL, *tx_node;\n+\tconst struct device_node *pool_node, *fman_node, *rx_node;\n+\tconst uint32_t *regs_addr = NULL;\n+\tconst char *mname, *fname;\n+\tconst char *dname = dpa_node->full_name;\n+\tsize_t lenp;\n+\tint _errno;\n+\tconst char *char_prop;\n+\tuint32_t na;\n+\n+\tif (of_device_is_available(dpa_node) == false)\n+\t\treturn 0;\n+\n+\trprop = \"fsl,qman-frame-queues-rx\";\n+\tmprop = \"fsl,fman-mac\";\n+\n+\t/* Allocate an object for this network interface */\n+\t__if = rte_malloc(NULL, sizeof(*__if), RTE_CACHE_LINE_SIZE);\n+\tFMAN_ERR(!__if, -ENOMEM, \"malloc(%zu)\\n\", sizeof(*__if));\n+\tmemset(__if, 0, sizeof(*__if));\n+\tINIT_LIST_HEAD(&__if->__if.bpool_list);\n+\tstrncpy(__if->node_path, dpa_node->full_name, PATH_MAX - 1);\n+\t__if->node_path[PATH_MAX - 1] = '\\0';\n+\n+\t/** ASDF: This needs to be revisited */\n+\t/* Obtain the MAC node used by this interface except macless */\n+\tmac_phandle = of_get_property(dpa_node, mprop, &lenp);\n+\tFMAN_ERR(!mac_phandle, -EINVAL, \"%s: no %s\\n\", dname, mprop);\n+\tassert(lenp == sizeof(phandle));\n+\tmac_node = of_find_node_by_phandle(*mac_phandle);\n+\tFMAN_ERR(!mac_node, -ENXIO, \"%s: bad 'fsl,fman-mac\\n\", dname);\n+\tmname = mac_node->full_name;\n+\n+\t/* Map the CCSR regs for the MAC node */\n+\tregs_addr = of_get_address(mac_node, 0, &__if->regs_size, NULL);\n+\tFMAN_ERR(!regs_addr, -EINVAL, \"of_get_address(%s)\\n\", mname);\n+\tphys_addr = of_translate_address(mac_node, regs_addr);\n+\tFMAN_ERR(!phys_addr, -EINVAL, \"of_translate_address(%s, %p)\\n\",\n+\t\tmname, regs_addr);\n+\t\t__if->ccsr_map = mmap(NULL, __if->regs_size,\n+\t\tPROT_READ | PROT_WRITE, MAP_SHARED,\n+\t\tfman_ccsr_map_fd, phys_addr);\n+\tFMAN_ERR(__if->ccsr_map == MAP_FAILED, -errno,\n+\t\t\"mmap(0x%\"PRIx64\")\\n\", phys_addr);\n+\tna = of_n_addr_cells(mac_node);\n+\t/* Get rid of endianness (issues). Convert to host byte order */\n+\tregs_addr_host = of_read_number(regs_addr, na);\n+\n+\n+\t/* Get the index of the Fman this i/f belongs to */\n+\tfman_node = of_get_parent(mac_node);\n+\tna = of_n_addr_cells(mac_node);\n+\tFMAN_ERR(!fman_node, -ENXIO, \"of_get_parent(%s)\\n\", mname);\n+\tfname = fman_node->full_name;\n+\tcell_idx = of_get_property(fman_node, \"cell-index\", &lenp);\n+\tFMAN_ERR(!cell_idx, -ENXIO, \"%s: no cell-index)\\n\", fname);\n+\tassert(lenp == sizeof(*cell_idx));\n+\tcell_idx_host = of_read_number(cell_idx, lenp / sizeof(phandle));\n+\t__if->__if.fman_idx = cell_idx_host;\n+\tif (!get_once) {\n+\t\t_errno = fman_get_ip_rev(fman_node);\n+\t\tFMAN_ERR(_errno, -ENXIO, \"%s: ip_rev is not available\\n\",\n+\t\t fname);\n+\t}\n+\n+\tif (fman_ip_rev >= FMAN_V3) {\n+\t\t/*\n+\t\t * Set A2V, OVOM, EBD bits in contextA to allow external\n+\t\t * buffer deallocation by fman.\n+\t\t */\n+\t\tfman_dealloc_bufs_mask_hi = FMAN_V3_CONTEXTA_EN_A2V |\n+\t\t\t\t\t\tFMAN_V3_CONTEXTA_EN_OVOM;\n+\t\tfman_dealloc_bufs_mask_lo = FMAN_V3_CONTEXTA_EN_EBD;\n+\t} else {\n+\t\tfman_dealloc_bufs_mask_hi = 0;\n+\t\tfman_dealloc_bufs_mask_lo = 0;\n+\t}\n+\t/* Is the MAC node 1G, 10G? */\n+\t__if->__if.is_memac = 0;\n+\n+\tif (of_device_is_compatible(mac_node, \"fsl,fman-1g-mac\"))\n+\t\t__if->__if.mac_type = fman_mac_1g;\n+\telse if (of_device_is_compatible(mac_node, \"fsl,fman-10g-mac\"))\n+\t\t__if->__if.mac_type = fman_mac_10g;\n+\telse if (of_device_is_compatible(mac_node, \"fsl,fman-memac\")) {\n+\t\t/** ASDF: what is memac? */\n+\t\t__if->__if.is_memac = 1;\n+\t\tchar_prop = of_get_property(mac_node, \"phy-connection-type\",\n+\t\t\t\t\t NULL);\n+\t\tif (!char_prop) {\n+\t\t\tprintf(\"memac: unknown MII type assuming 1G\\n\");\n+\t\t\t/* Right now forcing memac to 1g in case of error*/\n+\t\t\t__if->__if.mac_type = fman_mac_1g;\n+\t\t} else {\n+\t\t\tif (strstr(char_prop, \"sgmii\"))\n+\t\t\t\t__if->__if.mac_type = fman_mac_1g;\n+\t\t\telse if (strstr(char_prop, \"rgmii\")) {\n+\t\t\t\t__if->__if.mac_type = fman_mac_1g;\n+\t\t\t\t__if->__if.is_rgmii = 1;\n+\t\t\t} else if (strstr(char_prop, \"xgmii\"))\n+\t\t\t\t__if->__if.mac_type = fman_mac_10g;\n+\t\t}\n+\t} else\n+\t\tFMAN_ERR(1, -EINVAL, \"%s: unknown MAC type\\n\", mname);\n+\n+\t/*\n+\t * For MAC ports, we cannot rely on cell-index. In\n+\t * T2080, two of the 10G ports on single FMAN have same\n+\t * duplicate cell-indexes as the other two 10G ports on\n+\t * same FMAN. Hence, we now rely upon addresses of the\n+\t * ports from device tree to deduce the index.\n+\t */\n+\n+\t_errno = fman_get_mac_index(regs_addr_host, &__if->__if.mac_idx);\n+\tFMAN_ERR(_errno, -EINVAL, \"Invalid register address: %lu\",\n+\t\t regs_addr_host);\n+\n+\t/* Extract the MAC address for private and shared interfaces */\n+\tmac_addr = of_get_property(mac_node, \"local-mac-address\",\n+\t\t\t\t &lenp);\n+\tFMAN_ERR(!mac_addr, -EINVAL, \"%s: no local-mac-address\\n\",\n+\t mname);\n+\tmemcpy(&__if->__if.mac_addr, mac_addr, ETHER_ADDR_LEN);\n+\n+\t/* Extract the Tx port (it's the second of the two port handles)\n+\t * and get its channel ID\n+\t */\n+\tports_phandle = of_get_property(mac_node, \"fsl,port-handles\",\n+\t\t\t\t\t&lenp);\n+\tif (!ports_phandle)\n+\t\tports_phandle = of_get_property(mac_node, \"fsl,fman-ports\",\n+\t\t\t\t\t\t&lenp);\n+\tFMAN_ERR(!ports_phandle, -EINVAL, \"%s: no fsl,port-handles\\n\",\n+\t mname);\n+\tassert(lenp == (2 * sizeof(phandle)));\n+\ttx_node = of_find_node_by_phandle(ports_phandle[1]);\n+\tFMAN_ERR(!tx_node, -ENXIO, \"%s: bad fsl,port-handle[1]\\n\", mname);\n+\t/* Extract the channel ID (from tx-port-handle) */\n+\ttx_channel_id = of_get_property(tx_node, \"fsl,qman-channel-id\",\n+\t\t\t\t\t&lenp);\n+\tFMAN_ERR(!tx_channel_id, -EINVAL, \"%s: no fsl-qman-channel-id\\n\",\n+\t tx_node->full_name);\n+\n+\trx_node = of_find_node_by_phandle(ports_phandle[0]);\n+\tFMAN_ERR(!rx_node, -ENXIO, \"%s: bad fsl,port-handle[0]\\n\", mname);\n+\tregs_addr = of_get_address(rx_node, 0, &__if->regs_size, NULL);\n+\tFMAN_ERR(!regs_addr, -EINVAL, \"of_get_address(%s)\\n\", mname);\n+\tphys_addr = of_translate_address(rx_node, regs_addr);\n+\tFMAN_ERR(!phys_addr, -EINVAL, \"of_translate_address(%s, %p)\\n\",\n+\t mname, regs_addr);\n+\t__if->bmi_map = mmap(NULL, __if->regs_size,\n+\t\t\t\t PROT_READ | PROT_WRITE, MAP_SHARED,\n+\t\t\t\t fman_ccsr_map_fd, phys_addr);\n+\tFMAN_ERR(__if->bmi_map == MAP_FAILED, -errno,\n+\t \"mmap(0x%\"PRIx64\")\\n\", phys_addr);\n+\n+\t/* No channel ID for MAC-less */\n+\tassert(lenp == sizeof(*tx_channel_id));\n+\tna = of_n_addr_cells(mac_node);\n+\t__if->__if.tx_channel_id = of_read_number(tx_channel_id, na);\n+\n+\t/* Extract the Rx FQIDs. (Note, the device representation is silly,\n+\t * there are \"counts\" that must always be 1.)\n+\t */\n+\trx_phandle = of_get_property(dpa_node, rprop, &lenp);\n+\tFMAN_ERR(!rx_phandle, -EINVAL, \"%s: no fsl,qman-frame-queues-rx\\n\",\n+\t dname);\n+\n+\tassert(lenp == (4 * sizeof(phandle)));\n+\n+\tna = of_n_addr_cells(mac_node);\n+\t/* Get rid of endianness (issues). Convert to host byte order */\n+\trx_phandle_host[0] = of_read_number(&rx_phandle[0], na);\n+\trx_phandle_host[1] = of_read_number(&rx_phandle[1], na);\n+\trx_phandle_host[2] = of_read_number(&rx_phandle[2], na);\n+\trx_phandle_host[3] = of_read_number(&rx_phandle[3], na);\n+\n+\tassert((rx_phandle_host[1] == 1) && (rx_phandle_host[3] == 1));\n+\t__if->__if.fqid_rx_err = rx_phandle_host[0];\n+\t__if->__if.fqid_rx_def = rx_phandle_host[2];\n+\n+\t/* Extract the Tx FQIDs */\n+\ttx_phandle = of_get_property(dpa_node,\n+\t\t\t\t \"fsl,qman-frame-queues-tx\", &lenp);\n+\tFMAN_ERR(!tx_phandle, -EINVAL, \"%s: no fsl,qman-frame-queues-tx\\n\",\n+\t dname);\n+\n+\tassert(lenp == (4 * sizeof(phandle)));\n+\t/*TODO: Fix for other cases also */\n+\tna = of_n_addr_cells(mac_node);\n+\t/* Get rid of endianness (issues). Convert to host byte order */\n+\ttx_phandle_host[0] = of_read_number(&tx_phandle[0], na);\n+\ttx_phandle_host[1] = of_read_number(&tx_phandle[1], na);\n+\ttx_phandle_host[2] = of_read_number(&tx_phandle[2], na);\n+\ttx_phandle_host[3] = of_read_number(&tx_phandle[3], na);\n+\tassert((tx_phandle_host[1] == 1) && (tx_phandle_host[3] == 1));\n+\t__if->__if.fqid_tx_err = tx_phandle_host[0];\n+\t__if->__if.fqid_tx_confirm = tx_phandle_host[2];\n+\n+\t/* Obtain the buffer pool nodes used by this interface */\n+\tpools_phandle = of_get_property(dpa_node, \"fsl,bman-buffer-pools\",\n+\t\t\t\t\t&lenp);\n+\tFMAN_ERR(!pools_phandle, -EINVAL, \"%s: no fsl,bman-buffer-pools\\n\",\n+\t dname);\n+\t/* For each pool, parse the corresponding node and add a pool object\n+\t * to the interface's \"bpool_list\"\n+\t */\n+\tassert(lenp && !(lenp % sizeof(phandle)));\n+\twhile (lenp) {\n+\t\tsize_t proplen;\n+\t\tconst phandle *prop;\n+\t\tuint64_t bpid_host = 0;\n+\t\tuint64_t bpool_host[6] = {0};\n+\t\tconst char *pname;\n+\t\t/* Allocate an object for the pool */\n+\t\tbpool = rte_malloc(NULL, sizeof(*bpool), RTE_CACHE_LINE_SIZE);\n+\t\tFMAN_ERR(!bpool, -ENOMEM, \"malloc(%zu)\\n\", sizeof(*bpool));\n+\t\t/* Find the pool node */\n+\t\tpool_node = of_find_node_by_phandle(*pools_phandle);\n+\t\tFMAN_ERR(!pool_node, -ENXIO, \"%s: bad fsl,bman-buffer-pools\\n\",\n+\t\t dname);\n+\t\tpname = pool_node->full_name;\n+\t\t/* Extract the BPID property */\n+\t\tprop = of_get_property(pool_node, \"fsl,bpid\", &proplen);\n+\t\tFMAN_ERR(!prop, -EINVAL, \"%s: no fsl,bpid\\n\", pname);\n+\t\tassert(proplen == sizeof(*prop));\n+\t\tna = of_n_addr_cells(mac_node);\n+\t\t/* Get rid of endianness (issues).\n+\t\t * Convert to host byte-order\n+\t\t */\n+\t\tbpid_host = of_read_number(prop, na);\n+\t\tbpool->bpid = bpid_host;\n+\t\t/* Extract the cfg property (count/size/addr). \"fsl,bpool-cfg\"\n+\t\t * indicates for the Bman driver to seed the pool.\n+\t\t * \"fsl,bpool-ethernet-cfg\" is used by the network driver. The\n+\t\t * two are mutually exclusive, so check for either of them.\n+\t\t */\n+\t\tprop = of_get_property(pool_node, \"fsl,bpool-cfg\",\n+\t\t\t\t &proplen);\n+\t\tif (!prop)\n+\t\t\tprop = of_get_property(pool_node,\n+\t\t\t\t\t \"fsl,bpool-ethernet-cfg\",\n+\t\t\t\t\t &proplen);\n+\t\tif (!prop) {\n+\t\t\t/* It's OK for there to be no bpool-cfg */\n+\t\t\tbpool->count = bpool->size = bpool->addr = 0;\n+\t\t} else {\n+\t\t\tassert(proplen == (6 * sizeof(*prop)));\n+\t\t\tna = of_n_addr_cells(mac_node);\n+\t\t\t/* Get rid of endianness (issues).\n+\t\t\t * Convert to host byte order\n+\t\t\t */\n+\t\t\tbpool_host[0] = of_read_number(&prop[0], na);\n+\t\t\tbpool_host[1] = of_read_number(&prop[1], na);\n+\t\t\tbpool_host[2] = of_read_number(&prop[2], na);\n+\t\t\tbpool_host[3] = of_read_number(&prop[3], na);\n+\t\t\tbpool_host[4] = of_read_number(&prop[4], na);\n+\t\t\tbpool_host[5] = of_read_number(&prop[5], na);\n+\n+\t\t\tbpool->count = ((uint64_t)bpool_host[0] << 32) |\n+\t\t\t\t\tbpool_host[1];\n+\t\t\tbpool->size = ((uint64_t)bpool_host[2] << 32) |\n+\t\t\t\t\tbpool_host[3];\n+\t\t\tbpool->addr = ((uint64_t)bpool_host[4] << 32) |\n+\t\t\t\t\tbpool_host[5];\n+\t\t}\n+\t\t/* Parsing of the pool is complete, add it to the interface\n+\t\t * list.\n+\t\t */\n+\t\tlist_add_tail(&bpool->node, &__if->__if.bpool_list);\n+\t\tlenp -= sizeof(phandle);\n+\t\tpools_phandle++;\n+\t}\n+\n+\t/* Parsing of the network interface is complete, add it to the list */\n+\tDPAA_BUS_LOG(DEBUG, \"Found %s, Tx Channel = %x, FMAN = %x,\"\n+\t\t \"Port ID = %x\\n\",\n+\t\t dname, __if->__if.tx_channel_id, __if->__if.fman_idx,\n+\t\t __if->__if.mac_idx);\n+\n+\tlist_add_tail(&__if->__if.node, &__ifs);\n+\treturn 0;\n+err:\n+\tif_destructor(__if);\n+\treturn _errno;\n+}\n+\n+int\n+fman_init(void)\n+{\n+\tconst struct device_node *dpa_node;\n+\tint _errno;\n+\n+\t/* If multiple dependencies try to initialise the Fman driver, don't\n+\t * panic.\n+\t */\n+\tif (fman_ccsr_map_fd != -1)\n+\t\treturn 0;\n+\n+\tfman_ccsr_map_fd = open(FMAN_DEVICE_PATH, O_RDWR);\n+\tif (unlikely(fman_ccsr_map_fd < 0)) {\n+\t\tDPAA_BUS_LOG(ERR, \"Unable to open (/dev/mem)\");\n+\t\treturn fman_ccsr_map_fd;\n+\t}\n+\n+\tfor_each_compatible_node(dpa_node, NULL, \"fsl,dpa-ethernet-init\") {\n+\t\t_errno = fman_if_init(dpa_node);\n+\t\tFMAN_ERR(_errno, _errno, \"if_init(%s)\\n\", dpa_node->full_name);\n+\t}\n+\n+\treturn 0;\n+err:\n+\tfman_finish();\n+\treturn _errno;\n+}\n+\n+void\n+fman_finish(void)\n+{\n+\tstruct __fman_if *__if, *tmpif;\n+\n+\tassert(fman_ccsr_map_fd != -1);\n+\n+\tlist_for_each_entry_safe(__if, tmpif, &__ifs, __if.node) {\n+\t\tint _errno;\n+\n+\t\t/* disable Rx and Tx */\n+\t\tif ((__if->__if.mac_type == fman_mac_1g) &&\n+\t\t (!__if->__if.is_memac))\n+\t\t\tout_be32(__if->ccsr_map + 0x100,\n+\t\t\t\t in_be32(__if->ccsr_map + 0x100) & ~(u32)0x5);\n+\t\telse\n+\t\t\tout_be32(__if->ccsr_map + 8,\n+\t\t\t\t in_be32(__if->ccsr_map + 8) & ~(u32)3);\n+\t\t/* release the mapping */\n+\t\t_errno = munmap(__if->ccsr_map, __if->regs_size);\n+\t\tif (unlikely(_errno < 0))\n+\t\t\tfprintf(stderr, \"%s:%hu:%s(): munmap() = %d (%s)\\n\",\n+\t\t\t\t__FILE__, __LINE__, __func__,\n+\t\t\t\t-errno, strerror(errno));\n+\t\tprintf(\"Tearing down %s\\n\", __if->node_path);\n+\t\tlist_del(&__if->__if.node);\n+\t\trte_free(__if);\n+\t}\n+\n+\tclose(fman_ccsr_map_fd);\n+\tfman_ccsr_map_fd = -1;\n+}\ndiff --git a/drivers/bus/dpaa/base/fman/netcfg_layer.c b/drivers/bus/dpaa/base/fman/netcfg_layer.c\nnew file mode 100644\nindex 0000000..e3a0ced\n--- /dev/null\n+++ b/drivers/bus/dpaa/base/fman/netcfg_layer.c\n@@ -0,0 +1,205 @@\n+/*-\n+ * This file is provided under a dual BSD/GPLv2 license. When using or\n+ * redistributing this file, you may do so under either license.\n+ *\n+ * BSD LICENSE\n+ *\n+ * Copyright 2010-2016 Freescale Semiconductor Inc.\n+ * Copyright 2017 NXP.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions are met:\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in the\n+ * documentation and/or other materials provided with the distribution.\n+ * * Neither the name of the above-listed copyright holders nor the\n+ * names of any contributors may be used to endorse or promote products\n+ * derived from this software without specific prior written permission.\n+ *\n+ * GPL LICENSE SUMMARY\n+ *\n+ * ALTERNATIVELY, this software may be distributed under the terms of the\n+ * GNU General Public License (\"GPL\") as published by the Free Software\n+ * Foundation, either version 2 of that License or (at your option) any\n+ * later version.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE\n+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ */\n+#include <inttypes.h>\n+#include <of.h>\n+#include <net/if.h>\n+#include <sys/ioctl.h>\n+#include <error.h>\n+#include <net/if_arp.h>\n+#include <assert.h>\n+#include <unistd.h>\n+\n+#include <rte_malloc.h>\n+\n+#include <rte_dpaa_logs.h>\n+#include <netcfg.h>\n+\n+/* Structure contains information about all the interfaces given by user\n+ * on command line.\n+ */\n+struct netcfg_interface *netcfg_interface;\n+\n+/* This data structure contaings all configurations information\n+ * related to usages of DPA devices.\n+ */\n+struct netcfg_info *netcfg;\n+/* fd to open a socket for making ioctl request to disable/enable shared\n+ * interfaces.\n+ */\n+static int skfd = -1;\n+\n+#ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER\n+void\n+dump_netcfg(struct netcfg_info *cfg_ptr)\n+{\n+\tint i;\n+\n+\tprintf(\".......... DPAA Configuration ..........\\n\\n\");\n+\n+\t/* Network interfaces */\n+\tprintf(\"Network interfaces: %d\\n\", cfg_ptr->num_ethports);\n+\tfor (i = 0; i < cfg_ptr->num_ethports; i++) {\n+\t\tstruct fman_if_bpool *bpool;\n+\t\tstruct fm_eth_port_cfg *p_cfg = &cfg_ptr->port_cfg[i];\n+\t\tstruct fman_if *__if = p_cfg->fman_if;\n+\n+\t\tprintf(\"\\n+ Fman %d, MAC %d (%s);\\n\",\n+\t\t __if->fman_idx, __if->mac_idx,\n+\t\t (__if->mac_type == fman_mac_1g) ? \"1G\" : \"10G\");\n+\n+\t\tprintf(\"\\tmac_addr: \" ETH_MAC_PRINTF_FMT \"\\n\",\n+\t\t ETH_MAC_PRINTF_ARGS(&__if->mac_addr));\n+\n+\t\tprintf(\"\\ttx_channel_id: 0x%02x\\n\",\n+\t\t __if->tx_channel_id);\n+\n+\t\tprintf(\"\\tfqid_rx_def: 0x%x\\n\", p_cfg->rx_def);\n+\t\tprintf(\"\\tfqid_rx_err: 0x%x\\n\", __if->fqid_rx_err);\n+\n+\t\tprintf(\"\\tfqid_tx_err: 0x%x\\n\", __if->fqid_tx_err);\n+\t\tprintf(\"\\tfqid_tx_confirm: 0x%x\\n\", __if->fqid_tx_confirm);\n+\t\tfman_if_for_each_bpool(bpool, __if)\n+\t\t\tprintf(\"\\tbuffer pool: (bpid=%d, count=%\"PRId64\n+\t\t\t \" size=%\"PRId64\", addr=0x%\"PRIx64\")\\n\",\n+\t\t\t bpool->bpid, bpool->count, bpool->size,\n+\t\t\t bpool->addr);\n+\t}\n+}\n+#endif /* RTE_LIBRTE_DPAA_DEBUG_DRIVER */\n+\n+static inline int\n+get_num_netcfg_interfaces(char *str)\n+{\n+\tchar *pch;\n+\tuint8_t count = 0;\n+\n+\tif (str == NULL)\n+\t\treturn -EINVAL;\n+\tpch = strtok(str, \",\");\n+\twhile (pch != NULL) {\n+\t\tcount++;\n+\t\tpch = strtok(NULL, \",\");\n+\t}\n+\treturn count;\n+}\n+\n+struct netcfg_info *\n+netcfg_acquire(void)\n+{\n+\tstruct fman_if *__if;\n+\tint _errno, idx = 0;\n+\tuint8_t num_ports = 0;\n+\tuint8_t num_cfg_ports = 0;\n+\tsize_t size;\n+\n+\t/* Extract dpa configuration from fman driver and FMC configuration\n+\t * for command-line interfaces.\n+\t */\n+\n+\tif (skfd == -1) {\n+\t\t/* Open a basic socket to enable/disable shared\n+\t\t * interfaces.\n+\t\t */\n+\t\tskfd = socket(AF_PACKET, SOCK_RAW, 0);\n+\t\tif (unlikely(skfd < 0)) {\n+\t\t\t/** ASDF: logging would need to be changed */\n+\t\t\terror(0, errno, \"%s(): open(SOCK_RAW)\", __func__);\n+\t\t\treturn NULL;\n+\t\t}\n+\t}\n+\n+\t/* Initialise the Fman driver */\n+\t_errno = fman_init();\n+\tif (_errno) {\n+\t\tDPAA_BUS_LOG(ERR, \"FMAN driver init failed (%d)\", errno);\n+\t\treturn NULL;\n+\t}\n+\n+\t/* Number of MAC ports */\n+\tlist_for_each_entry(__if, fman_if_list, node)\n+\t\tnum_ports++;\n+\n+\tif (!num_ports) {\n+\t\tDPAA_BUS_LOG(ERR, \"FMAN ports not available\");\n+\t\treturn NULL;\n+\t}\n+\t/* Allocate space for all enabled mac ports */\n+\tsize = sizeof(*netcfg) +\n+\t\t(num_ports * sizeof(struct fm_eth_port_cfg));\n+\t/** ASDF: Needs to be changed to rte_malloc */\n+\tnetcfg = rte_zmalloc(NULL, size * 1, RTE_CACHE_LINE_SIZE);\n+\tif (unlikely(netcfg == NULL)) {\n+\t\tDPAA_BUS_LOG(ERR, \"Unable to allocat mem for netcfg\");\n+\t\tgoto error;\n+\t}\n+\n+\tnetcfg->num_ethports = num_ports;\n+\n+\tlist_for_each_entry(__if, fman_if_list, node) {\n+\t\tstruct fm_eth_port_cfg *cfg = &netcfg->port_cfg[idx];\n+\t\t/* Hook in the fman driver interface */\n+\t\tcfg->fman_if = __if;\n+\t\tcfg->rx_def = __if->fqid_rx_def;\n+\t\tnum_cfg_ports++;\n+\t\tidx++;\n+\t}\n+\n+\tif (!num_cfg_ports) {\n+\t\tDPAA_BUS_LOG(ERR, \"No FMAN ports found\");\n+\t\tgoto error;\n+\t} else if (num_ports != num_cfg_ports)\n+\t\tnetcfg->num_ethports = num_cfg_ports;\n+\n+\treturn netcfg;\n+\n+error:\n+\treturn NULL;\n+}\n+\n+void\n+netcfg_release(struct netcfg_info *cfg_ptr)\n+{\n+\trte_free(cfg_ptr);\n+\t/* Close socket for shared interfaces */\n+\tif (skfd >= 0) {\n+\t\tclose(skfd);\n+\t\tskfd = -1;\n+\t}\n+}\ndiff --git a/drivers/bus/dpaa/include/fman.h b/drivers/bus/dpaa/include/fman.h\nnew file mode 100644\nindex 0000000..19105bb\n--- /dev/null\n+++ b/drivers/bus/dpaa/include/fman.h\n@@ -0,0 +1,472 @@\n+/*-\n+ * This file is provided under a dual BSD/GPLv2 license. When using or\n+ * redistributing this file, you may do so under either license.\n+ *\n+ * BSD LICENSE\n+ *\n+ * Copyright 2010-2012 Freescale Semiconductor, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions are met:\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in the\n+ * documentation and/or other materials provided with the distribution.\n+ * * Neither the name of the above-listed copyright holders nor the\n+ * names of any contributors may be used to endorse or promote products\n+ * derived from this software without specific prior written permission.\n+ *\n+ * GPL LICENSE SUMMARY\n+ *\n+ * ALTERNATIVELY, this software may be distributed under the terms of the\n+ * GNU General Public License (\"GPL\") as published by the Free Software\n+ * Foundation, either version 2 of that License or (at your option) any\n+ * later version.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE\n+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#ifndef __FMAN_H\n+#define __FMAN_H\n+\n+#include <stdbool.h>\n+#include <net/if.h>\n+\n+#include <rte_ethdev.h>\n+#include <rte_ether.h>\n+\n+#include <compat.h>\n+#include <rte_dpaa_logs.h>\n+\n+#ifndef FMAN_DEVICE_PATH\n+#define FMAN_DEVICE_PATH \"/dev/mem\"\n+#endif\n+\n+#define MEMAC_NUM_OF_PADDRS 7 /* Num of additional exact match MAC adr regs */\n+\n+/* Control and Configuration Register (COMMAND_CONFIG) for MEMAC */\n+#define CMD_CFG_LOOPBACK_EN\t0x00000400\n+/**< 21 XGMII/GMII loopback enable */\n+#define CMD_CFG_PROMIS_EN\t0x00000010\n+/**< 27 Promiscuous operation enable */\n+#define CMD_CFG_PAUSE_IGNORE\t0x00000100\n+/**< 23 Ignore Pause frame quanta */\n+\n+/* Statistics Configuration Register (STATN_CONFIG) */\n+#define STATS_CFG_CLR 0x00000004\n+/**< 29 Reset all counters */\n+#define STATS_CFG_CLR_ON_RD 0x00000002\n+/**< 30 Clear on read */\n+#define STATS_CFG_SATURATE 0x00000001\n+/**< 31 Saturate at the maximum val */\n+\n+/**< Max receive frame length mask */\n+#define MAXFRM_SIZE_MEMAC\t0x00007fe0\n+#define MAXFRM_RX_MASK\t\t0x0000ffff\n+\n+/**< Interface Mode Register Register for MEMAC */\n+#define IF_MODE_RLP 0x00000820\n+\n+/**< Pool Limits */\n+#define FMAN_PORT_MAX_EXT_POOLS_NUM\t8\n+#define FMAN_PORT_OBS_EXT_POOLS_NUM\t2\n+\n+#define FMAN_PORT_CG_MAP_NUM\t\t8\n+#define FMAN_PORT_PRS_RESULT_WORDS_NUM\t8\n+#define FMAN_PORT_BMI_FIFO_UNITS\t0x100\n+#define FMAN_PORT_IC_OFFSET_UNITS\t0x10\n+\n+#define FMAN_ENABLE_BPOOL_DEPLETION\t0xF00000F0\n+\n+#define HASH_CTRL_MCAST_EN\t0x00000100\n+#define GROUP_ADDRESS\t\t0x0000010000000000LL\n+#define HASH_CTRL_ADDR_MASK\t0x0000003F\n+\n+/* Pre definitions of FMAN interface and Bpool structures */\n+struct __fman_if;\n+struct fman_if_bpool;\n+/* Lists of fman interfaces and bpools */\n+TAILQ_HEAD(rte_fman_if_list, __fman_if);\n+\n+/* Represents the different flavour of network interface */\n+enum fman_mac_type {\n+\tfman_offline = 0, /* ASDF: Should it be removed? */\n+\tfman_mac_1g,\n+\tfman_mac_10g,\n+};\n+\n+struct mac_addr {\n+\tuint32_t mac_addr_l;\t/**< Lower 32 bits of 48-bit MAC address */\n+\tuint32_t mac_addr_u;\t/**< Upper 16 bits of 48-bit MAC address */\n+};\n+\n+struct memac_regs {\n+\t/* General Control and Status */\n+\tuint32_t res0000[2];\n+\tuint32_t command_config;\t/**< 0x008 Ctrl and cfg */\n+\tstruct mac_addr mac_addr0;\t/**< 0x00C-0x010 MAC_ADDR_0...1 */\n+\tuint32_t maxfrm;\t\t/**< 0x014 Max frame length */\n+\tuint32_t res0018[5];\n+\tuint32_t hashtable_ctrl;\t/**< 0x02C Hash table control */\n+\tuint32_t res0030[4];\n+\tuint32_t ievent;\t\t/**< 0x040 Interrupt event */\n+\tuint32_t tx_ipg_length;\n+\t/**< 0x044 Transmitter inter-packet-gap */\n+\tuint32_t res0048;\n+\tuint32_t imask;\t\t\t/**< 0x04C Interrupt mask */\n+\tuint32_t res0050;\n+\tuint32_t pause_quanta[4];\t/**< 0x054 Pause quanta */\n+\tuint32_t pause_thresh[4];\t/**< 0x064 Pause quanta threshold */\n+\tuint32_t rx_pause_status;\t/**< 0x074 Receive pause status */\n+\tuint32_t res0078[2];\n+\tstruct mac_addr mac_addr[MEMAC_NUM_OF_PADDRS];\n+\t/**< 0x80-0x0B4 mac padr */\n+\tuint32_t lpwake_timer;\n+\t/**< 0x0B8 Low Power Wakeup Timer */\n+\tuint32_t sleep_timer;\n+\t/**< 0x0BC Transmit EEE Low Power Timer */\n+\tuint32_t res00c0[8];\n+\tuint32_t statn_config;\n+\t/**< 0x0E0 Statistics configuration */\n+\tuint32_t res00e4[7];\n+\t/* Rx Statistics Counter */\n+\tuint32_t reoct_l;\n+\tuint32_t reoct_u;\n+\tuint32_t roct_l;\n+\tuint32_t roct_u;\n+\tuint32_t raln_l;\n+\tuint32_t raln_u;\n+\tuint32_t rxpf_l;\n+\tuint32_t rxpf_u;\n+\tuint32_t rfrm_l;\n+\tuint32_t rfrm_u;\n+\tuint32_t rfcs_l;\n+\tuint32_t rfcs_u;\n+\tuint32_t rvlan_l;\n+\tuint32_t rvlan_u;\n+\tuint32_t rerr_l;\n+\tuint32_t rerr_u;\n+\tuint32_t ruca_l;\n+\tuint32_t ruca_u;\n+\tuint32_t rmca_l;\n+\tuint32_t rmca_u;\n+\tuint32_t rbca_l;\n+\tuint32_t rbca_u;\n+\tuint32_t rdrp_l;\n+\tuint32_t rdrp_u;\n+\tuint32_t rpkt_l;\n+\tuint32_t rpkt_u;\n+\tuint32_t rund_l;\n+\tuint32_t rund_u;\n+\tuint32_t r64_l;\n+\tuint32_t r64_u;\n+\tuint32_t r127_l;\n+\tuint32_t r127_u;\n+\tuint32_t r255_l;\n+\tuint32_t r255_u;\n+\tuint32_t r511_l;\n+\tuint32_t r511_u;\n+\tuint32_t r1023_l;\n+\tuint32_t r1023_u;\n+\tuint32_t r1518_l;\n+\tuint32_t r1518_u;\n+\tuint32_t r1519x_l;\n+\tuint32_t r1519x_u;\n+\tuint32_t rovr_l;\n+\tuint32_t rovr_u;\n+\tuint32_t rjbr_l;\n+\tuint32_t rjbr_u;\n+\tuint32_t rfrg_l;\n+\tuint32_t rfrg_u;\n+\tuint32_t rcnp_l;\n+\tuint32_t rcnp_u;\n+\tuint32_t rdrntp_l;\n+\tuint32_t rdrntp_u;\n+\tuint32_t res01d0[12];\n+\t/* Tx Statistics Counter */\n+\tuint32_t teoct_l;\n+\tuint32_t teoct_u;\n+\tuint32_t toct_l;\n+\tuint32_t toct_u;\n+\tuint32_t res0210[2];\n+\tuint32_t txpf_l;\n+\tuint32_t txpf_u;\n+\tuint32_t tfrm_l;\n+\tuint32_t tfrm_u;\n+\tuint32_t tfcs_l;\n+\tuint32_t tfcs_u;\n+\tuint32_t tvlan_l;\n+\tuint32_t tvlan_u;\n+\tuint32_t terr_l;\n+\tuint32_t terr_u;\n+\tuint32_t tuca_l;\n+\tuint32_t tuca_u;\n+\tuint32_t tmca_l;\n+\tuint32_t tmca_u;\n+\tuint32_t tbca_l;\n+\tuint32_t tbca_u;\n+\tuint32_t res0258[2];\n+\tuint32_t tpkt_l;\n+\tuint32_t tpkt_u;\n+\tuint32_t tund_l;\n+\tuint32_t tund_u;\n+\tuint32_t t64_l;\n+\tuint32_t t64_u;\n+\tuint32_t t127_l;\n+\tuint32_t t127_u;\n+\tuint32_t t255_l;\n+\tuint32_t t255_u;\n+\tuint32_t t511_l;\n+\tuint32_t t511_u;\n+\tuint32_t t1023_l;\n+\tuint32_t t1023_u;\n+\tuint32_t t1518_l;\n+\tuint32_t t1518_u;\n+\tuint32_t t1519x_l;\n+\tuint32_t t1519x_u;\n+\tuint32_t res02a8[6];\n+\tuint32_t tcnp_l;\n+\tuint32_t tcnp_u;\n+\tuint32_t res02c8[14];\n+\t/* Line Interface Control */\n+\tuint32_t if_mode;\t\t/**< 0x300 Interface Mode Control */\n+\tuint32_t if_status;\t\t/**< 0x304 Interface Status */\n+\tuint32_t res0308[14];\n+\t/* HiGig/2 */\n+\tuint32_t hg_config;\t\t/**< 0x340 Control and cfg */\n+\tuint32_t res0344[3];\n+\tuint32_t hg_pause_quanta;\t/**< 0x350 Pause quanta */\n+\tuint32_t res0354[3];\n+\tuint32_t hg_pause_thresh;\t/**< 0x360 Pause quanta threshold */\n+\tuint32_t res0364[3];\n+\tuint32_t hgrx_pause_status;\t/**< 0x370 Receive pause status */\n+\tuint32_t hg_fifos_status;\t/**< 0x374 fifos status */\n+\tuint32_t rhm;\t\t\t/**< 0x378 rx messages counter */\n+\tuint32_t thm;\t\t\t/**< 0x37C tx messages counter */\n+};\n+\n+struct rx_bmi_regs {\n+\tuint32_t fmbm_rcfg;\t\t/**< Rx Configuration */\n+\tuint32_t fmbm_rst;\t\t/**< Rx Status */\n+\tuint32_t fmbm_rda;\t\t/**< Rx DMA attributes*/\n+\tuint32_t fmbm_rfp;\t\t/**< Rx FIFO Parameters*/\n+\tuint32_t fmbm_rfed;\t\t/**< Rx Frame End Data*/\n+\tuint32_t fmbm_ricp;\t\t/**< Rx Internal Context Parameters*/\n+\tuint32_t fmbm_rim;\t\t/**< Rx Internal Buffer Margins*/\n+\tuint32_t fmbm_rebm;\t\t/**< Rx External Buffer Margins*/\n+\tuint32_t fmbm_rfne;\t\t/**< Rx Frame Next Engine*/\n+\tuint32_t fmbm_rfca;\t\t/**< Rx Frame Command Attributes.*/\n+\tuint32_t fmbm_rfpne;\t\t/**< Rx Frame Parser Next Engine*/\n+\tuint32_t fmbm_rpso;\t\t/**< Rx Parse Start Offset*/\n+\tuint32_t fmbm_rpp;\t\t/**< Rx Policer Profile */\n+\tuint32_t fmbm_rccb;\t\t/**< Rx Coarse Classification Base */\n+\tuint32_t fmbm_reth;\t\t/**< Rx Excessive Threshold */\n+\tuint32_t reserved003c[1];\t/**< (0x03C 0x03F) */\n+\tuint32_t fmbm_rprai[FMAN_PORT_PRS_RESULT_WORDS_NUM];\n+\t\t\t\t\t/**< Rx Parse Results Array Init*/\n+\tuint32_t fmbm_rfqid;\t\t/**< Rx Frame Queue ID*/\n+\tuint32_t fmbm_refqid;\t\t/**< Rx Error Frame Queue ID*/\n+\tuint32_t fmbm_rfsdm;\t\t/**< Rx Frame Status Discard Mask*/\n+\tuint32_t fmbm_rfsem;\t\t/**< Rx Frame Status Error Mask*/\n+\tuint32_t fmbm_rfene;\t\t/**< Rx Frame Enqueue Next Engine */\n+\tuint32_t reserved0074[0x2];\t/**< (0x074-0x07C) */\n+\tuint32_t fmbm_rcmne;\n+\t/**< Rx Frame Continuous Mode Next Engine */\n+\tuint32_t reserved0080[0x20];/**< (0x080 0x0FF) */\n+\tuint32_t fmbm_ebmpi[FMAN_PORT_MAX_EXT_POOLS_NUM];\n+\t\t\t\t\t/**< Buffer Manager pool Information-*/\n+\tuint32_t fmbm_acnt[FMAN_PORT_MAX_EXT_POOLS_NUM];\n+\t\t\t\t\t/**< Allocate Counter-*/\n+\tuint32_t reserved0130[8];\n+\t\t\t\t\t/**< 0x130/0x140 - 0x15F reserved -*/\n+\tuint32_t fmbm_rcgm[FMAN_PORT_CG_MAP_NUM];\n+\t\t\t\t\t/**< Congestion Group Map*/\n+\tuint32_t fmbm_mpd;\t\t/**< BM Pool Depletion */\n+\tuint32_t reserved0184[0x1F];\t/**< (0x184 0x1FF) */\n+\tuint32_t fmbm_rstc;\t\t/**< Rx Statistics Counters*/\n+\tuint32_t fmbm_rfrc;\t\t/**< Rx Frame Counter*/\n+\tuint32_t fmbm_rfbc;\t\t/**< Rx Bad Frames Counter*/\n+\tuint32_t fmbm_rlfc;\t\t/**< Rx Large Frames Counter*/\n+\tuint32_t fmbm_rffc;\t\t/**< Rx Filter Frames Counter*/\n+\tuint32_t fmbm_rfdc;\t\t/**< Rx Frame Discard Counter*/\n+\tuint32_t fmbm_rfldec;\t\t/**< Rx Frames List DMA Error Counter*/\n+\tuint32_t fmbm_rodc;\t\t/**< Rx Out of Buffers Discard nntr*/\n+\tuint32_t fmbm_rbdc;\t\t/**< Rx Buffers Deallocate Counter*/\n+\tuint32_t reserved0224[0x17];\t/**< (0x224 0x27F) */\n+\tuint32_t fmbm_rpc;\t\t/**< Rx Performance Counters*/\n+\tuint32_t fmbm_rpcp;\t\t/**< Rx Performance Count Parameters*/\n+\tuint32_t fmbm_rccn;\t\t/**< Rx Cycle Counter*/\n+\tuint32_t fmbm_rtuc;\t\t/**< Rx Tasks Utilization Counter*/\n+\tuint32_t fmbm_rrquc;\n+\t/**< Rx Receive Queue Utilization cntr*/\n+\tuint32_t fmbm_rduc;\t\t/**< Rx DMA Utilization Counter*/\n+\tuint32_t fmbm_rfuc;\t\t/**< Rx FIFO Utilization Counter*/\n+\tuint32_t fmbm_rpac;\t\t/**< Rx Pause Activation Counter*/\n+\tuint32_t reserved02a0[0x18];\t/**< (0x2A0 0x2FF) */\n+\tuint32_t fmbm_rdbg;\t\t/**< Rx Debug-*/\n+};\n+\n+struct fman_port_qmi_regs {\n+\tuint32_t fmqm_pnc;\t\t/**< PortID n Configuration Register */\n+\tuint32_t fmqm_pns;\t\t/**< PortID n Status Register */\n+\tuint32_t fmqm_pnts;\t\t/**< PortID n Task Status Register */\n+\tuint32_t reserved00c[4];\t/**< 0xn00C - 0xn01B */\n+\tuint32_t fmqm_pnen;\t\t/**< PortID n Enqueue NIA Register */\n+\tuint32_t fmqm_pnetfc;\t\t/**< PortID n Enq Total Frame Counter */\n+\tuint32_t reserved024[2];\t/**< 0xn024 - 0x02B */\n+\tuint32_t fmqm_pndn;\t\t/**< PortID n Dequeue NIA Register */\n+\tuint32_t fmqm_pndc;\t\t/**< PortID n Dequeue Config Register */\n+\tuint32_t fmqm_pndtfc;\t\t/**< PortID n Dequeue tot Frame cntr */\n+\tuint32_t fmqm_pndfdc;\t\t/**< PortID n Dequeue FQID Dflt Cntr */\n+\tuint32_t fmqm_pndcc;\t\t/**< PortID n Dequeue Confirm Counter */\n+};\n+\n+/* This struct exports parameters about an Fman network interface, determined\n+ * from the device-tree.\n+ */\n+struct fman_if {\n+\t/* Which Fman this interface belongs to */\n+\tuint8_t fman_idx;\n+\t/* The type/speed of the interface */\n+\tenum fman_mac_type mac_type;\n+\t/* Boolean, set when mac type is memac */\n+\tuint8_t is_memac;\n+\t/* Boolean, set when PHY is RGMII */\n+\tuint8_t is_rgmii;\n+\t/* The index of this MAC (within the Fman it belongs to) */\n+\tuint8_t mac_idx;\n+\t/* The MAC address */\n+\tstruct ether_addr mac_addr;\n+\t/* The Qman channel to schedule Tx FQs to */\n+\tu16 tx_channel_id;\n+\t/* The hard-coded FQIDs for this interface. Note: this doesn't cover\n+\t * the PCD nor the \"Rx default\" FQIDs, which are configured via FMC\n+\t * and its XML-based configuration.\n+\t */\n+\tuint32_t fqid_rx_def;\n+\tuint32_t fqid_rx_err;\n+\tuint32_t fqid_tx_err;\n+\tuint32_t fqid_tx_confirm;\n+\n+\tstruct list_head bpool_list;\n+\t/* The node for linking this interface into \"fman_if_list\" */\n+\tstruct list_head node;\n+};\n+\n+/* This struct exposes parameters for buffer pools, extracted from the network\n+ * interface settings in the device tree.\n+ */\n+struct fman_if_bpool {\n+\tuint32_t bpid;\n+\tuint64_t count;\n+\tuint64_t size;\n+\tuint64_t addr;\n+\t/* The node for linking this bpool into fman_if::bpool_list */\n+\tstruct list_head node;\n+};\n+\n+/* Internal Context transfer params - FMBM_RICP*/\n+struct fman_if_ic_params {\n+\t/*IC offset in the packet buffer */\n+\tuint16_t iceof;\n+\t/*IC internal offset */\n+\tuint16_t iciof;\n+\t/*IC size to copy */\n+\tuint16_t icsz;\n+};\n+\n+/* The exported \"struct fman_if\" type contains the subset of fields we want\n+ * exposed. This struct is embedded in a larger \"struct __fman_if\" which\n+ * contains the extra bits we *don't* want exposed.\n+ */\n+struct __fman_if {\n+\tstruct fman_if __if;\n+\tchar node_path[PATH_MAX];\n+\tuint64_t regs_size;\n+\tvoid *ccsr_map;\n+\tvoid *bmi_map;\n+\tvoid *qmi_map;\n+\tstruct list_head node;\n+};\n+\n+/* And this is the base list node that the interfaces are added to. (See\n+ * fman_if_enable_all_rx() below for an example of its use.)\n+ */\n+extern const struct list_head *fman_if_list;\n+\n+/* To display MAC addresses (of type \"struct ether_addr\") via printf()-style\n+ * interfaces, these macros may come in handy. Eg;\n+ * struct fman_if *p = get_ptr_to_some_interface();\n+ * printf(\"MAC address is \" ETH_MAC_PRINTF_FMT \"\\n\",\n+ * ETH_MAC_PRINTF_ARGS(&p->mac_addr));\n+ */\n+#define ETH_MAC_PRINTF_FMT \"%02x:%02x:%02x:%02x:%02x:%02x\"\n+#define ETH_MAC_PRINTF_ARGS(a) \\\n+\t\t(a)->addr_bytes[0], (a)->addr_bytes[1], \\\n+\t\t(a)->addr_bytes[2], (a)->addr_bytes[3], \\\n+\t\t(a)->addr_bytes[4], (a)->addr_bytes[5]\n+\n+/* To iterate the \"bpool_list\" for an interface. Eg;\n+ * struct fman_if *p = get_ptr_to_some_interface();\n+ * struct fman_if_bpool *bp;\n+ * printf(\"Interface uses following BPIDs;\\n\");\n+ * fman_if_for_each_bpool(bp, p) {\n+ * printf(\" %d\\n\", bp->bpid);\n+ * [...]\n+ * }\n+ */\n+#define fman_if_for_each_bpool(bp, __if) \\\n+\tlist_for_each_entry(bp, &(__if)->bpool_list, node)\n+\n+#define FMAN_ERR(cond, rc, fmt, args...) \\\n+\tdo { \\\n+\t\tif (unlikely(cond)) { \\\n+\t\t\t_errno = (rc); \\\n+\t\t\tDPAA_BUS_LOG(ERR, fmt \"(%d)\", ##args, errno); \\\n+\t\t\tgoto err; \\\n+\t\t} \\\n+\t} while (0)\n+\n+#define FMAN_IP_REV_1\t0xC30C4\n+#define FMAN_IP_REV_1_MAJOR_MASK 0x0000FF00\n+#define FMAN_IP_REV_1_MAJOR_SHIFT 8\n+#define FMAN_V3\t0x06\n+#define FMAN_V3_CONTEXTA_EN_A2V\t0x10000000\n+#define FMAN_V3_CONTEXTA_EN_OVOM\t0x02000000\n+#define FMAN_V3_CONTEXTA_EN_EBD\t0x80000000\n+#define FMAN_CONTEXTA_DIS_CHECKSUM\t0x7ull\n+#define FMAN_CONTEXTA_SET_OPCODE11 0x2000000b00000000\n+extern u16 fman_ip_rev;\n+extern u32 fman_dealloc_bufs_mask_hi;\n+extern u32 fman_dealloc_bufs_mask_lo;\n+\n+/**\n+ * Initialize the FMAN driver\n+ *\n+ * @args void\n+ * @return\n+ *\t0 for success; error OTHERWISE\n+ */\n+int fman_init(void);\n+\n+/**\n+ * Teardown the FMAN driver\n+ *\n+ * @args void\n+ * @return void\n+ */\n+void fman_finish(void);\n+\n+#endif\t/* __FMAN_H */\ndiff --git a/drivers/bus/dpaa/include/netcfg.h b/drivers/bus/dpaa/include/netcfg.h\nnew file mode 100644\nindex 0000000..b77a678\n--- /dev/null\n+++ b/drivers/bus/dpaa/include/netcfg.h\n@@ -0,0 +1,96 @@\n+/*-\n+ * This file is provided under a dual BSD/GPLv2 license. When using or\n+ * redistributing this file, you may do so under either license.\n+ *\n+ * BSD LICENSE\n+ *\n+ * Copyright 2010-2012 Freescale Semiconductor, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions are met:\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in the\n+ * documentation and/or other materials provided with the distribution.\n+ * * Neither the name of the above-listed copyright holders nor the\n+ * names of any contributors may be used to endorse or promote products\n+ * derived from this software without specific prior written permission.\n+ *\n+ * GPL LICENSE SUMMARY\n+ *\n+ * ALTERNATIVELY, this software may be distributed under the terms of the\n+ * GNU General Public License (\"GPL\") as published by the Free Software\n+ * Foundation, either version 2 of that License or (at your option) any\n+ * later version.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\n+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE\n+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\n+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\n+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\n+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\n+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\n+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#ifndef __NETCFG_H\n+#define __NETCFG_H\n+\n+#include <fman.h>\n+#include <argp.h>\n+\n+/* Configuration information related to a specific ethernet port */\n+struct fm_eth_port_cfg {\n+\t/**< A list of PCD FQ ranges, obtained from FMC configuration */\n+\tstruct list_head *list;\n+\t/**< The \"Rx default\" FQID, obtained from FMC configuration */\n+\tuint32_t rx_def;\n+\t/**< Other interface details are in the fman driver interface */\n+\tstruct fman_if *fman_if;\n+};\n+\n+struct netcfg_info {\n+\tuint8_t num_ethports;\n+\t/**< Number of ports */\n+\tstruct fm_eth_port_cfg port_cfg[0];\n+\t/**< Variable structure array of size num_ethports */\n+};\n+\n+struct interface_info {\n+\tchar *name;\n+\tstruct ether_addr mac_addr;\n+\tstruct ether_addr peer_mac;\n+\tint mac_present;\n+\tint fman_enabled_mac_interface;\n+};\n+\n+struct netcfg_interface {\n+\tuint8_t numof_netcfg_interface;\n+\tuint8_t numof_fman_enabled_macless;\n+\tstruct interface_info interface_info[0];\n+};\n+\n+/* pcd_file: FMC netpcd XML (\"policy\") file, that contains PCD information.\n+ * cfg_file: FMC config XML file\n+ * Returns the configuration information in newly allocated memory.\n+ */\n+struct netcfg_info *netcfg_acquire(void);\n+\n+/* cfg_ptr: configuration information pointer.\n+ * Frees the resources allocated by the configuration layer.\n+ */\n+void netcfg_release(struct netcfg_info *cfg_ptr);\n+\n+#ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER\n+/* cfg_ptr: configuration information pointer.\n+ * This function dumps configuration data to stdout.\n+ */\n+void dump_netcfg(struct netcfg_info *cfg_ptr);\n+#endif\n+\n+#endif /* __NETCFG_H */\n", "prefixes": [ "dpdk-dev", "v2", "05/40" ] }