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GET /api/patches/22544/?format=api
{ "id": 22544, "url": "http://patches.dpdk.org/api/patches/22544/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1490683952-24919-45-git-send-email-rasesh.mody@cavium.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1490683952-24919-45-git-send-email-rasesh.mody@cavium.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1490683952-24919-45-git-send-email-rasesh.mody@cavium.com", "date": "2017-03-28T06:52:14", "name": "[dpdk-dev,v4,44/62] net/qede/base: add coalescing support for VFs", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "6f9149cbd8d731d0dfc0f7974ea70ddae51acc10", "submitter": { "id": 569, "url": "http://patches.dpdk.org/api/people/569/?format=api", "name": "Mody, Rasesh", "email": "rasesh.mody@cavium.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1490683952-24919-45-git-send-email-rasesh.mody@cavium.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/22544/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/22544/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 0B496D482;\n\tTue, 28 Mar 2017 08:56:19 +0200 (CEST)", "from mx0b-0016ce01.pphosted.com (mx0b-0016ce01.pphosted.com\n\t[67.231.156.153]) by dpdk.org (Postfix) with ESMTP id 08AD1101B\n\tfor <dev@dpdk.org>; Tue, 28 Mar 2017 08:55:10 +0200 (CEST)", "from pps.filterd (m0085408.ppops.net [127.0.0.1])\n\tby mx0b-0016ce01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv2S6pgmH000622; Mon, 27 Mar 2017 23:55:08 -0700", "from avcashub1.qlogic.com ([198.186.0.117])\n\tby mx0b-0016ce01.pphosted.com with ESMTP id 29emw0agt1-1\n\t(version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT);\n\tMon, 27 Mar 2017 23:55:08 -0700", "from avluser05.qlc.com (10.1.113.115) by qlc.com (10.1.4.192) with\n\tMicrosoft SMTP Server id 14.3.235.1;\n\tMon, 27 Mar 2017 23:55:07 -0700", "(from rmody@localhost)\tby avluser05.qlc.com (8.14.4/8.14.4/Submit)\n\tid v2S6t7gY025234;\tMon, 27 Mar 2017 23:55:07 -0700" ], "X-Authentication-Warning": "avluser05.qlc.com: rmody set sender to\n\trasesh.mody@cavium.com using -f", "From": "Rasesh Mody <rasesh.mody@cavium.com>", "To": "<ferruh.yigit@intel.com>, <dev@dpdk.org>", "CC": "Rasesh Mody <rasesh.mody@cavium.com>", "Date": "Mon, 27 Mar 2017 23:52:14 -0700", "Message-ID": "<1490683952-24919-45-git-send-email-rasesh.mody@cavium.com>", "X-Mailer": "git-send-email 1.7.10.3", "In-Reply-To": "<798af029-9a26-9065-350b-48781c1d3c55@intel.com>", "References": "<798af029-9a26-9065-350b-48781c1d3c55@intel.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "disclaimer": "bypass", "X-Proofpoint-Virus-Version": "vendor=nai engine=5800 definitions=8480\n\tsignatures=668449", "X-Proofpoint-Spam-Details": "rule=notspam policy=default score=0\n\tpriorityscore=1501 malwarescore=0\n\tsuspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015\n\tlowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam\n\tadjust=0\n\treason=mlx scancount=1 engine=8.0.1-1702020001\n\tdefinitions=main-1703280065", "Subject": "[dpdk-dev] [PATCH v4 44/62] net/qede/base: add coalescing support\n\tfor VFs", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add coalescing support for VFs.\n\nSigned-off-by: Rasesh Mody <rasesh.mody@cavium.com>\n---\n drivers/net/qede/base/ecore_dev.c | 83 ++++++++++++++++++++++-----------\n drivers/net/qede/base/ecore_dev_api.h | 43 ++++++-----------\n drivers/net/qede/base/ecore_sriov.c | 66 +++++++++++++++++++++++++-\n drivers/net/qede/base/ecore_vf.c | 42 +++++++++++++++++\n drivers/net/qede/base/ecore_vf.h | 24 ++++++++++\n drivers/net/qede/base/ecore_vfpf_if.h | 10 ++++\n 6 files changed, 209 insertions(+), 59 deletions(-)", "diff": "diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c\nindex 29dd292..7a876bc 100644\n--- a/drivers/net/qede/base/ecore_dev.c\n+++ b/drivers/net/qede/base/ecore_dev.c\n@@ -30,6 +30,7 @@\n #include \"nvm_cfg.h\"\n #include \"ecore_dev_api.h\"\n #include \"ecore_dcbx.h\"\n+#include \"ecore_l2.h\"\n \n /* TODO - there's a bug in DCBx re-configuration flows in MF, as the QM\n * registers involved are not split and thus configuration is a race where\n@@ -4198,11 +4199,6 @@ static enum _ecore_status_t ecore_set_coalesce(struct ecore_hwfn *p_hwfn,\n {\n \tstruct coalescing_timeset *p_coal_timeset;\n \n-\tif (IS_VF(p_hwfn->p_dev)) {\n-\t\tDP_NOTICE(p_hwfn, true, \"VF coalescing config not supported\\n\");\n-\t\treturn ECORE_INVAL;\n-\t}\n-\n \tif (p_hwfn->p_dev->int_coalescing_mode != ECORE_COAL_MODE_ENABLE) {\n \t\tDP_NOTICE(p_hwfn, true,\n \t\t\t \"Coalescing configuration not enabled\\n\");\n@@ -4218,13 +4214,53 @@ static enum _ecore_status_t ecore_set_coalesce(struct ecore_hwfn *p_hwfn,\n \treturn ECORE_SUCCESS;\n }\n \n+enum _ecore_status_t ecore_set_queue_coalesce(struct ecore_hwfn *p_hwfn,\n+\t\t\t\t\t u16 rx_coal, u16 tx_coal,\n+\t\t\t\t\t void *p_handle)\n+{\n+\tstruct ecore_queue_cid *p_cid = (struct ecore_queue_cid *)p_handle;\n+\tenum _ecore_status_t rc = ECORE_SUCCESS;\n+\tstruct ecore_ptt *p_ptt;\n+\n+\t/* TODO - Configuring a single queue's coalescing but\n+\t * claiming all queues are abiding same configuration\n+\t * for PF and VF both.\n+\t */\n+\n+\tif (IS_VF(p_hwfn->p_dev))\n+\t\treturn ecore_vf_pf_set_coalesce(p_hwfn, rx_coal,\n+\t\t\t\t\t\ttx_coal, p_cid);\n+\n+\tp_ptt = ecore_ptt_acquire(p_hwfn);\n+\tif (!p_ptt)\n+\t\treturn ECORE_AGAIN;\n+\n+\tif (rx_coal) {\n+\t\trc = ecore_set_rxq_coalesce(p_hwfn, p_ptt, rx_coal, p_cid);\n+\t\tif (rc)\n+\t\t\tgoto out;\n+\t\tp_hwfn->p_dev->rx_coalesce_usecs = rx_coal;\n+\t}\n+\n+\tif (tx_coal) {\n+\t\trc = ecore_set_txq_coalesce(p_hwfn, p_ptt, tx_coal, p_cid);\n+\t\tif (rc)\n+\t\t\tgoto out;\n+\t\tp_hwfn->p_dev->tx_coalesce_usecs = tx_coal;\n+\t}\n+out:\n+\tecore_ptt_release(p_hwfn, p_ptt);\n+\n+\treturn rc;\n+}\n+\n enum _ecore_status_t ecore_set_rxq_coalesce(struct ecore_hwfn *p_hwfn,\n \t\t\t\t\t struct ecore_ptt *p_ptt,\n-\t\t\t\t\t u16 coalesce, u16 qid, u16 sb_id)\n+\t\t\t\t\t u16 coalesce,\n+\t\t\t\t\t struct ecore_queue_cid *p_cid)\n {\n \tstruct ustorm_eth_queue_zone eth_qzone;\n \tu8 timeset, timer_res;\n-\tu16 fw_qid = 0;\n \tu32 address;\n \tenum _ecore_status_t rc;\n \n@@ -4241,33 +4277,30 @@ enum _ecore_status_t ecore_set_rxq_coalesce(struct ecore_hwfn *p_hwfn,\n \t}\n \ttimeset = (u8)(coalesce >> timer_res);\n \n-\trc = ecore_fw_l2_queue(p_hwfn, qid, &fw_qid);\n-\tif (rc != ECORE_SUCCESS)\n-\t\treturn rc;\n-\n-\trc = ecore_int_set_timer_res(p_hwfn, p_ptt, timer_res, sb_id, false);\n+\trc = ecore_int_set_timer_res(p_hwfn, p_ptt, timer_res,\n+\t\t\t\t p_cid->abs.sb_idx, false);\n \tif (rc != ECORE_SUCCESS)\n \t\tgoto out;\n \n-\taddress = BAR0_MAP_REG_USDM_RAM + USTORM_ETH_QUEUE_ZONE_OFFSET(fw_qid);\n+\taddress = BAR0_MAP_REG_USDM_RAM +\n+\t\t USTORM_ETH_QUEUE_ZONE_OFFSET(p_cid->abs.queue_id);\n \n \trc = ecore_set_coalesce(p_hwfn, p_ptt, address, ð_qzone,\n \t\t\t\tsizeof(struct ustorm_eth_queue_zone), timeset);\n \tif (rc != ECORE_SUCCESS)\n \t\tgoto out;\n \n-\tp_hwfn->p_dev->rx_coalesce_usecs = coalesce;\n-out:\n+ out:\n \treturn rc;\n }\n \n enum _ecore_status_t ecore_set_txq_coalesce(struct ecore_hwfn *p_hwfn,\n \t\t\t\t\t struct ecore_ptt *p_ptt,\n-\t\t\t\t\t u16 coalesce, u16 qid, u16 sb_id)\n+\t\t\t\t\t u16 coalesce,\n+\t\t\t\t\t struct ecore_queue_cid *p_cid)\n {\n \tstruct xstorm_eth_queue_zone eth_qzone;\n \tu8 timeset, timer_res;\n-\tu16 fw_qid = 0;\n \tu32 address;\n \tenum _ecore_status_t rc;\n \n@@ -4285,23 +4318,17 @@ enum _ecore_status_t ecore_set_txq_coalesce(struct ecore_hwfn *p_hwfn,\n \n \ttimeset = (u8)(coalesce >> timer_res);\n \n-\trc = ecore_fw_l2_queue(p_hwfn, qid, &fw_qid);\n-\tif (rc != ECORE_SUCCESS)\n-\t\treturn rc;\n-\n-\trc = ecore_int_set_timer_res(p_hwfn, p_ptt, timer_res, sb_id, true);\n+\trc = ecore_int_set_timer_res(p_hwfn, p_ptt, timer_res,\n+\t\t\t\t p_cid->abs.sb_idx, true);\n \tif (rc != ECORE_SUCCESS)\n \t\tgoto out;\n \n-\taddress = BAR0_MAP_REG_XSDM_RAM + XSTORM_ETH_QUEUE_ZONE_OFFSET(fw_qid);\n+\taddress = BAR0_MAP_REG_XSDM_RAM +\n+\t\t XSTORM_ETH_QUEUE_ZONE_OFFSET(p_cid->abs.queue_id);\n \n \trc = ecore_set_coalesce(p_hwfn, p_ptt, address, ð_qzone,\n \t\t\t\tsizeof(struct xstorm_eth_queue_zone), timeset);\n-\tif (rc != ECORE_SUCCESS)\n-\t\tgoto out;\n-\n-\tp_hwfn->p_dev->tx_coalesce_usecs = coalesce;\n-out:\n+ out:\n \treturn rc;\n }\n \ndiff --git a/drivers/net/qede/base/ecore_dev_api.h b/drivers/net/qede/base/ecore_dev_api.h\nindex 7e90778..ce764d2 100644\n--- a/drivers/net/qede/base/ecore_dev_api.h\n+++ b/drivers/net/qede/base/ecore_dev_api.h\n@@ -570,41 +570,24 @@ enum _ecore_status_t ecore_final_cleanup(struct ecore_hwfn\t*p_hwfn,\n \t\t\t\t\t struct ecore_ptt\t*p_ptt,\n \t\t\t\t\t u16\t\t\tid,\n \t\t\t\t\t bool\t\t\tis_vf);\n-\n-/**\n- * @brief ecore_set_rxq_coalesce - Configure coalesce parameters for an Rx queue\n- * The fact that we can configure coalescing to up to 511, but on varying\n- * accuracy [the bigger the value the less accurate] up to a mistake of 3usec\n- * for the highest values.\n- *\n- * @param p_hwfn\n- * @param p_ptt\n- * @param coalesce - Coalesce value in micro seconds.\n- * @param qid - Queue index.\n- * @param qid - SB Id\n- *\n- * @return enum _ecore_status_t\n- */\n-enum _ecore_status_t ecore_set_rxq_coalesce(struct ecore_hwfn *p_hwfn,\n-\t\t\t\t\t struct ecore_ptt *p_ptt,\n-\t\t\t\t\t u16 coalesce, u16 qid, u16 sb_id);\n-\n /**\n- * @brief ecore_set_txq_coalesce - Configure coalesce parameters for a Tx queue\n- * While the API allows setting coalescing per-qid, all tx queues sharing a\n- * SB should be in same range [i.e., either 0-0x7f, 0x80-0xff or 0x100-0x1ff]\n+ * @brief ecore_set_queue_coalesce - Configure coalesce parameters for Rx and\n+ * Tx queue. The fact that we can configure coalescing to up to 511, but on\n+ * varying accuracy [the bigger the value the less accurate] up to a mistake\n+ * of 3usec for the highest values.\n+ * While the API allows setting coalescing per-qid, all queues sharing a SB\n+ * should be in same range [i.e., either 0-0x7f, 0x80-0xff or 0x100-0x1ff]\n * otherwise configuration would break.\n *\n * @param p_hwfn\n- * @param p_ptt\n- * @param coalesce - Coalesce value in micro seconds.\n- * @param qid - Queue index.\n- * @param qid - SB Id\n+ * @param rx_coal - Rx Coalesce value in micro seconds.\n+ * @param tx_coal - TX Coalesce value in micro seconds.\n+ * @param p_handle\n *\n * @return enum _ecore_status_t\n- */\n-enum _ecore_status_t ecore_set_txq_coalesce(struct ecore_hwfn *p_hwfn,\n-\t\t\t\t\t struct ecore_ptt *p_ptt,\n-\t\t\t\t\t u16 coalesce, u16 qid, u16 sb_id);\n+ **/\n+enum _ecore_status_t\n+ecore_set_queue_coalesce(struct ecore_hwfn *p_hwfn, u16 rx_coal,\n+\t\t\t u16 tx_coal, void *p_handle);\n \n #endif\ndiff --git a/drivers/net/qede/base/ecore_sriov.c b/drivers/net/qede/base/ecore_sriov.c\nindex 703c1e8..4ffa8d0 100644\n--- a/drivers/net/qede/base/ecore_sriov.c\n+++ b/drivers/net/qede/base/ecore_sriov.c\n@@ -52,6 +52,7 @@ const char *ecore_channel_tlvs_string[] = {\n \t\"CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN\",\n \t\"CHANNEL_TLV_VPORT_UPDATE_SGE_TPA\",\n \t\"CHANNEL_TLV_UPDATE_TUNN_PARAM\",\n+\t\"CHANNEL_TLV_COALESCE_UPDATE\",\n \t\"CHANNEL_TLV_MAX\"\n };\n \n@@ -1939,6 +1940,8 @@ static void ecore_iov_vf_mbx_start_vport(struct ecore_hwfn *p_hwfn,\n \tvf->state = VF_ENABLED;\n \tstart = &mbx->req_virt->start_vport;\n \n+\tecore_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);\n+\n \t/* Initialize Status block in CAU */\n \tfor (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {\n \t\tif (!start->sb_addr[sb_id]) {\n@@ -1953,7 +1956,6 @@ static void ecore_iov_vf_mbx_start_vport(struct ecore_hwfn *p_hwfn,\n \t\t\t\t vf->igu_sbs[sb_id],\n \t\t\t\t vf->abs_vf_id, 1);\n \t}\n-\tecore_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);\n \n \tvf->mtu = start->mtu;\n \tvf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;\n@@ -3226,6 +3228,65 @@ static void ecore_iov_vf_mbx_release(struct ecore_hwfn *p_hwfn,\n \t\t\t length, status);\n }\n \n+static void ecore_iov_vf_pf_set_coalesce(struct ecore_hwfn *p_hwfn,\n+\t\t\t\t\t struct ecore_ptt *p_ptt,\n+\t\t\t\t\t struct ecore_vf_info *vf)\n+{\n+\tstruct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;\n+\tenum _ecore_status_t rc = ECORE_SUCCESS;\n+\tstruct vfpf_update_coalesce *req;\n+\tu8 status = PFVF_STATUS_FAILURE;\n+\tstruct ecore_queue_cid *p_cid;\n+\tu16 rx_coal, tx_coal;\n+\tu16 qid;\n+\n+\treq = &mbx->req_virt->update_coalesce;\n+\n+\trx_coal = req->rx_coal;\n+\ttx_coal = req->tx_coal;\n+\tqid = req->qid;\n+\tp_cid = vf->vf_queues[qid].p_rx_cid;\n+\n+\tif (!ecore_iov_validate_rxq(p_hwfn, vf, qid)) {\n+\t\tDP_ERR(p_hwfn, \"VF[%d]: Invalid Rx queue_id = %d\\n\",\n+\t\t vf->abs_vf_id, qid);\n+\t\tgoto out;\n+\t}\n+\n+\tif (!ecore_iov_validate_txq(p_hwfn, vf, qid)) {\n+\t\tDP_ERR(p_hwfn, \"VF[%d]: Invalid Tx queue_id = %d\\n\",\n+\t\t vf->abs_vf_id, qid);\n+\t\tgoto out;\n+\t}\n+\n+\tDP_VERBOSE(p_hwfn, ECORE_MSG_IOV,\n+\t\t \"VF[%d]: Setting coalesce for VF rx_coal = %d, tx_coal = %d at queue = %d\\n\",\n+\t\t vf->abs_vf_id, rx_coal, tx_coal, qid);\n+\tif (rx_coal) {\n+\t\trc = ecore_set_rxq_coalesce(p_hwfn, p_ptt, rx_coal, p_cid);\n+\t\tif (rc != ECORE_SUCCESS) {\n+\t\t\tDP_VERBOSE(p_hwfn, ECORE_MSG_IOV,\n+\t\t\t\t \"VF[%d]: Unable to set rx queue = %d coalesce\\n\",\n+\t\t\t\t vf->abs_vf_id, vf->vf_queues[qid].fw_rx_qid);\n+\t\t\tgoto out;\n+\t\t}\n+\t}\n+\tif (tx_coal) {\n+\t\trc = ecore_set_txq_coalesce(p_hwfn, p_ptt, tx_coal, p_cid);\n+\t\tif (rc != ECORE_SUCCESS) {\n+\t\t\tDP_VERBOSE(p_hwfn, ECORE_MSG_IOV,\n+\t\t\t\t \"VF[%d]: Unable to set tx queue = %d coalesce\\n\",\n+\t\t\t\t vf->abs_vf_id, vf->vf_queues[qid].fw_tx_qid);\n+\t\t\tgoto out;\n+\t\t}\n+\t}\n+\n+\tstatus = PFVF_STATUS_SUCCESS;\n+out:\n+\tecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_COALESCE_UPDATE,\n+\t\t\t sizeof(struct pfvf_def_resp_tlv), status);\n+}\n+\n static enum _ecore_status_t\n ecore_iov_vf_flr_poll_dorq(struct ecore_hwfn *p_hwfn,\n \t\t\t struct ecore_vf_info *p_vf, struct ecore_ptt *p_ptt)\n@@ -3579,6 +3640,9 @@ void ecore_iov_process_mbx_req(struct ecore_hwfn *p_hwfn,\n \t\tcase CHANNEL_TLV_UPDATE_TUNN_PARAM:\n \t\t\tecore_iov_vf_mbx_update_tunn_param(p_hwfn, p_ptt, p_vf);\n \t\t\tbreak;\n+\t\tcase CHANNEL_TLV_COALESCE_UPDATE:\n+\t\t\tecore_iov_vf_pf_set_coalesce(p_hwfn, p_ptt, p_vf);\n+\t\t\tbreak;\n \t\t}\n \t} else if (ecore_iov_tlv_supported(mbx->first_tlv.tl.type)) {\n \t\t/* If we've received a message from a VF we consider malicious\ndiff --git a/drivers/net/qede/base/ecore_vf.c b/drivers/net/qede/base/ecore_vf.c\nindex a072a81..bf516cc 100644\n--- a/drivers/net/qede/base/ecore_vf.c\n+++ b/drivers/net/qede/base/ecore_vf.c\n@@ -1424,6 +1424,48 @@ exit:\n \treturn rc;\n }\n \n+enum _ecore_status_t\n+ecore_vf_pf_set_coalesce(struct ecore_hwfn *p_hwfn, u16 rx_coal, u16 tx_coal,\n+\t\t\t struct ecore_queue_cid *p_cid)\n+{\n+\tstruct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;\n+\tstruct vfpf_update_coalesce *req;\n+\tstruct pfvf_def_resp_tlv *resp;\n+\tenum _ecore_status_t rc;\n+\n+\t/* clear mailbox and prep header tlv */\n+\treq = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_COALESCE_UPDATE,\n+\t\t\t sizeof(*req));\n+\n+\treq->rx_coal = rx_coal;\n+\treq->tx_coal = tx_coal;\n+\treq->qid = p_cid->rel.queue_id;\n+\n+\tDP_VERBOSE(p_hwfn, ECORE_MSG_IOV,\n+\t\t \"Setting coalesce rx_coal = %d, tx_coal = %d at queue = %d\\n\",\n+\t\t rx_coal, tx_coal, req->qid);\n+\n+\t/* add list termination tlv */\n+\tecore_add_tlv(p_hwfn, &p_iov->offset, CHANNEL_TLV_LIST_END,\n+\t\t sizeof(struct channel_list_end_tlv));\n+\n+\tresp = &p_iov->pf2vf_reply->default_resp;\n+\trc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));\n+\n+\tif (rc != ECORE_SUCCESS)\n+\t\tgoto exit;\n+\n+\tif (resp->hdr.status != PFVF_STATUS_SUCCESS)\n+\t\tgoto exit;\n+\n+\tp_hwfn->p_dev->rx_coalesce_usecs = rx_coal;\n+\tp_hwfn->p_dev->tx_coalesce_usecs = tx_coal;\n+\n+exit:\n+\tecore_vf_pf_req_end(p_hwfn, rc);\n+\treturn rc;\n+}\n+\n u16 ecore_vf_get_igu_sb_id(struct ecore_hwfn *p_hwfn,\n \t\t\t u16 sb_id)\n {\ndiff --git a/drivers/net/qede/base/ecore_vf.h b/drivers/net/qede/base/ecore_vf.h\nindex 0d67054..228bbf0 100644\n--- a/drivers/net/qede/base/ecore_vf.h\n+++ b/drivers/net/qede/base/ecore_vf.h\n@@ -50,6 +50,20 @@ struct ecore_vf_iov {\n enum _ecore_status_t ecore_vf_hw_prepare(struct ecore_hwfn *p_hwfn);\n \n /**\n+ * @brief VF - Set Rx/Tx coalesce per VF's relative queue.\n+ *\tCoalesce value '0' will omit the configuration.\n+ *\n+ *\t@param p_hwfn\n+ *\t@param rx_coal - coalesce value in micro second for rx queue\n+ *\t@param tx_coal - coalesce value in micro second for tx queue\n+ *\t@param qid\n+ *\n+ **/\n+enum _ecore_status_t ecore_vf_pf_set_coalesce(struct ecore_hwfn *p_hwfn,\n+\t\t\t\t\t u16 rx_coal, u16 tx_coal,\n+\t\t\t\t\t struct ecore_queue_cid *p_cid);\n+\n+/**\n * @brief VF - start the RX Queue by sending a message to the PF\n *\n * @param p_hwfn\n@@ -263,5 +277,15 @@ ecore_vf_pf_tunnel_param_update(struct ecore_hwfn *p_hwfn,\n \t\t\t\tstruct ecore_tunnel_info *p_tunn);\n \n void ecore_vf_set_vf_start_tunn_update_param(struct ecore_tunnel_info *p_tun);\n+\n+enum _ecore_status_t ecore_set_rxq_coalesce(struct ecore_hwfn *p_hwfn,\n+\t\t\t\t\t struct ecore_ptt *p_ptt,\n+\t\t\t\t\t u16 coalesce,\n+\t\t\t\t\t struct ecore_queue_cid *p_cid);\n+\n+enum _ecore_status_t ecore_set_txq_coalesce(struct ecore_hwfn *p_hwfn,\n+\t\t\t\t\t struct ecore_ptt *p_ptt,\n+\t\t\t\t\t u16 coalesce,\n+\t\t\t\t\t struct ecore_queue_cid *p_cid);\n #endif\n #endif /* __ECORE_VF_H__ */\ndiff --git a/drivers/net/qede/base/ecore_vfpf_if.h b/drivers/net/qede/base/ecore_vfpf_if.h\nindex 82ed4f5..e0b63bf 100644\n--- a/drivers/net/qede/base/ecore_vfpf_if.h\n+++ b/drivers/net/qede/base/ecore_vfpf_if.h\n@@ -457,6 +457,14 @@ struct tlv_buffer_size {\n \tu8 tlv_buffer[TLV_BUFFER_SIZE];\n };\n \n+struct vfpf_update_coalesce {\n+\tstruct vfpf_first_tlv first_tlv;\n+\tu16 rx_coal;\n+\tu16 tx_coal;\n+\tu16 qid;\n+\tu8 padding[2];\n+};\n+\n union vfpf_tlvs {\n \tstruct vfpf_first_tlv\t\t\tfirst_tlv;\n \tstruct vfpf_acquire_tlv\t\t\tacquire;\n@@ -469,6 +477,7 @@ union vfpf_tlvs {\n \tstruct vfpf_vport_update_tlv\t\tvport_update;\n \tstruct vfpf_ucast_filter_tlv\t\tucast_filter;\n \tstruct vfpf_update_tunn_param_tlv\ttunn_param_update;\n+\tstruct vfpf_update_coalesce\t\tupdate_coalesce;\n \tstruct tlv_buffer_size\t\t\ttlv_buf_size;\n };\n \n@@ -592,6 +601,7 @@ enum {\n \tCHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN,\n \tCHANNEL_TLV_VPORT_UPDATE_SGE_TPA,\n \tCHANNEL_TLV_UPDATE_TUNN_PARAM,\n+\tCHANNEL_TLV_COALESCE_UPDATE,\n \tCHANNEL_TLV_MAX,\n \n \t/* Required for iterating over vport-update tlvs.\n", "prefixes": [ "dpdk-dev", "v4", "44/62" ] }