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GET /api/patches/21835/?format=api
{ "id": 21835, "url": "http://patches.dpdk.org/api/patches/21835/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20170317104512.25969-2-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20170317104512.25969-2-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20170317104512.25969-2-qi.z.zhang@intel.com", "date": "2017-03-17T10:45:10", "name": "[dpdk-dev,v3,1/3] net/i40e: enable per dev PTYPE mapping table", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e8da6b73a75c43a3a93e0de92aa86312b785c172", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20170317104512.25969-2-qi.z.zhang@intel.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/21835/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/21835/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 02176CFA4;\n\tFri, 17 Mar 2017 10:54:35 +0100 (CET)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id D95E26A6E\n\tfor <dev@dpdk.org>; Fri, 17 Mar 2017 10:54:28 +0100 (CET)", "from fmsmga006.fm.intel.com ([10.253.24.20])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t17 Mar 2017 02:54:28 -0700", "from unknown (HELO localhost.localdomain.sh.intel.com)\n\t([10.239.129.229])\n\tby fmsmga006.fm.intel.com with ESMTP; 17 Mar 2017 02:54:27 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=simple/simple;\n\td=intel.com; i=@intel.com; q=dns/txt; s=intel;\n\tt=1489744469; x=1521280469;\n\th=from:to:cc:subject:date:message-id:in-reply-to: references;\n\tbh=GAbSsl5DO/mprA/BNFPZCXISUXrnVJNFOtimiv4/s4Q=;\n\tb=RdlhUiF0GuU4CzAY8iY8EsAL1XHPZqQ1d6swdStrDMsYMTciNEuN+M5g\n\twEJhGj8PrBf6Tb72WSIt7OpwOKDvSA==;", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.36,176,1486454400\"; d=\"scan'208\";a=\"78139850\"", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "jingjing.wu@intel.com,\n\thelin.zhang@intel.com", "Cc": "dev@dpdk.org,\n\tQi Zhang <qi.z.zhang@intel.com>", "Date": "Fri, 17 Mar 2017 06:45:10 -0400", "Message-Id": "<20170317104512.25969-2-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.9.3", "In-Reply-To": "<20170317104512.25969-1-qi.z.zhang@intel.com>", "References": "<20170317104512.25969-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH v3 1/3] net/i40e: enable per dev PTYPE mapping\n\ttable", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The mapping from hardware defined packet type to software defined\npacket type is static for i40e device, the patch let each ethdev to\nto have their own copy of mapping table, this give the possibility\nthat different ethdev can be set different PTYPE mapping rule which\nis the requirement to support following hardware's dynamic PTYPE\nfeature.\n\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/i40e/i40e_ethdev.c | 1 +\n drivers/net/i40e/i40e_ethdev.h | 5 +++++\n drivers/net/i40e/i40e_ethdev_vf.c | 2 +-\n drivers/net/i40e/i40e_rxtx.c | 30 ++++++++++++++++++++++--------\n drivers/net/i40e/i40e_rxtx.h | 3 ++-\n drivers/net/i40e/i40e_rxtx_vec_neon.c | 8 +++++---\n drivers/net/i40e/i40e_rxtx_vec_sse.c | 14 ++++++++------\n 7 files changed, 44 insertions(+), 19 deletions(-)", "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 303027b..3279e60 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -1041,6 +1041,7 @@ eth_i40e_dev_init(struct rte_eth_dev *dev)\n \t\ti40e_set_tx_function(dev);\n \t\treturn 0;\n \t}\n+\ti40e_set_default_ptype_table(dev);\n \tpci_dev = I40E_DEV_TO_PCI(dev);\n \tintr_handle = &pci_dev->intr_handle;\n \ndiff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h\nindex f545850..4b7ad80 100644\n--- a/drivers/net/i40e/i40e_ethdev.h\n+++ b/drivers/net/i40e/i40e_ethdev.h\n@@ -684,6 +684,8 @@ struct i40e_vf {\n \tuint64_t flags;\n };\n \n+#define I40E_MAX_PKT_TYPE 256\n+\n /*\n * Structure to store private data for each PF/VF instance.\n */\n@@ -708,6 +710,9 @@ struct i40e_adapter {\n \tstruct rte_timecounter systime_tc;\n \tstruct rte_timecounter rx_tstamp_tc;\n \tstruct rte_timecounter tx_tstamp_tc;\n+\n+\t/* ptype mapping table */\n+\tuint32_t ptype_tbl[I40E_MAX_PKT_TYPE] __rte_cache_min_aligned;\n };\n \n extern const struct rte_flow_ops i40e_flow_ops;\ndiff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c\nindex 55fd344..a956c50 100644\n--- a/drivers/net/i40e/i40e_ethdev_vf.c\n+++ b/drivers/net/i40e/i40e_ethdev_vf.c\n@@ -1476,7 +1476,7 @@ i40evf_dev_init(struct rte_eth_dev *eth_dev)\n \t\ti40e_set_tx_function(eth_dev);\n \t\treturn 0;\n \t}\n-\n+\ti40e_set_default_ptype_table(eth_dev);\n \trte_eth_copy_pci_info(eth_dev, pci_dev);\n \teth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;\n \ndiff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c\nindex 48429cc..035030f 100644\n--- a/drivers/net/i40e/i40e_rxtx.c\n+++ b/drivers/net/i40e/i40e_rxtx.c\n@@ -61,7 +61,6 @@\n \n #define DEFAULT_TX_RS_THRESH 32\n #define DEFAULT_TX_FREE_THRESH 32\n-#define I40E_MAX_PKT_TYPE 256\n \n #define I40E_TX_MAX_BURST 32\n \n@@ -458,6 +457,7 @@ i40e_rx_scan_hw_ring(struct i40e_rx_queue *rxq)\n \tint32_t s[I40E_LOOK_AHEAD], nb_dd;\n \tint32_t i, j, nb_rx = 0;\n \tuint64_t pkt_flags;\n+\tuint32_t *ptype_tbl = rxq->vsi->adapter->ptype_tbl;\n \n \trxdp = &rxq->rx_ring[rxq->rx_tail];\n \trxep = &rxq->sw_ring[rxq->rx_tail];\n@@ -506,9 +506,9 @@ i40e_rx_scan_hw_ring(struct i40e_rx_queue *rxq)\n \t\t\tpkt_flags = i40e_rxd_status_to_pkt_flags(qword1);\n \t\t\tpkt_flags |= i40e_rxd_error_to_pkt_flags(qword1);\n \t\t\tmb->packet_type =\n-\t\t\t\ti40e_rxd_pkt_type_mapping((uint8_t)((qword1 &\n-\t\t\t\t\t\tI40E_RXD_QW1_PTYPE_MASK) >>\n-\t\t\t\t\t\tI40E_RXD_QW1_PTYPE_SHIFT));\n+\t\t\t\tptype_tbl[(uint8_t)((qword1 &\n+\t\t\t\tI40E_RXD_QW1_PTYPE_MASK) >>\n+\t\t\t\tI40E_RXD_QW1_PTYPE_SHIFT)];\n \t\t\tif (pkt_flags & PKT_RX_RSS_HASH)\n \t\t\t\tmb->hash.rss = rte_le_to_cpu_32(\\\n \t\t\t\t\trxdp[j].wb.qword0.hi_dword.rss);\n@@ -700,6 +700,7 @@ i40e_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n \tuint16_t rx_id, nb_hold;\n \tuint64_t dma_addr;\n \tuint64_t pkt_flags;\n+\tuint32_t *ptype_tbl;\n \n \tnb_rx = 0;\n \tnb_hold = 0;\n@@ -707,6 +708,7 @@ i40e_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n \trx_id = rxq->rx_tail;\n \trx_ring = rxq->rx_ring;\n \tsw_ring = rxq->sw_ring;\n+\tptype_tbl = rxq->vsi->adapter->ptype_tbl;\n \n \twhile (nb_rx < nb_pkts) {\n \t\trxdp = &rx_ring[rx_id];\n@@ -763,8 +765,8 @@ i40e_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n \t\tpkt_flags = i40e_rxd_status_to_pkt_flags(qword1);\n \t\tpkt_flags |= i40e_rxd_error_to_pkt_flags(qword1);\n \t\trxm->packet_type =\n-\t\t\ti40e_rxd_pkt_type_mapping((uint8_t)((qword1 &\n-\t\t\tI40E_RXD_QW1_PTYPE_MASK) >> I40E_RXD_QW1_PTYPE_SHIFT));\n+\t\t\tptype_tbl[(uint8_t)((qword1 &\n+\t\t\tI40E_RXD_QW1_PTYPE_MASK) >> I40E_RXD_QW1_PTYPE_SHIFT)];\n \t\tif (pkt_flags & PKT_RX_RSS_HASH)\n \t\t\trxm->hash.rss =\n \t\t\t\trte_le_to_cpu_32(rxd.wb.qword0.hi_dword.rss);\n@@ -818,6 +820,7 @@ i40e_recv_scattered_pkts(void *rx_queue,\n \tuint64_t qword1;\n \tuint64_t dma_addr;\n \tuint64_t pkt_flags;\n+\tuint32_t *ptype_tbl = rxq->vsi->adapter->ptype_tbl;\n \n \twhile (nb_rx < nb_pkts) {\n \t\trxdp = &rx_ring[rx_id];\n@@ -925,8 +928,8 @@ i40e_recv_scattered_pkts(void *rx_queue,\n \t\tpkt_flags = i40e_rxd_status_to_pkt_flags(qword1);\n \t\tpkt_flags |= i40e_rxd_error_to_pkt_flags(qword1);\n \t\tfirst_seg->packet_type =\n-\t\t\ti40e_rxd_pkt_type_mapping((uint8_t)((qword1 &\n-\t\t\tI40E_RXD_QW1_PTYPE_MASK) >> I40E_RXD_QW1_PTYPE_SHIFT));\n+\t\t\tptype_tbl[(uint8_t)((qword1 &\n+\t\t\tI40E_RXD_QW1_PTYPE_MASK) >> I40E_RXD_QW1_PTYPE_SHIFT)];\n \t\tif (pkt_flags & PKT_RX_RSS_HASH)\n \t\t\tfirst_seg->hash.rss =\n \t\t\t\trte_le_to_cpu_32(rxd.wb.qword0.hi_dword.rss);\n@@ -2853,6 +2856,17 @@ i40e_set_tx_function(struct rte_eth_dev *dev)\n \t}\n }\n \n+void __attribute__((cold))\n+i40e_set_default_ptype_table(struct rte_eth_dev *dev)\n+{\n+\tstruct i40e_adapter *ad =\n+\t\tI40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n+\tint i;\n+\n+\tfor (i = 0; i <= I40E_MAX_PKT_TYPE; i++)\n+\t\tad->ptype_tbl[i] = i40e_get_default_pkt_type(i);\n+}\n+\n /* Stubs needed for linkage when CONFIG_RTE_I40E_INC_VECTOR is set to 'n' */\n int __attribute__((weak))\n i40e_rx_vec_dev_conf_condition_check(struct rte_eth_dev __rte_unused *dev)\ndiff --git a/drivers/net/i40e/i40e_rxtx.h b/drivers/net/i40e/i40e_rxtx.h\nindex 9df8a56..32ec9c2 100644\n--- a/drivers/net/i40e/i40e_rxtx.h\n+++ b/drivers/net/i40e/i40e_rxtx.h\n@@ -262,13 +262,14 @@ void i40e_set_rx_function(struct rte_eth_dev *dev);\n void i40e_set_tx_function_flag(struct rte_eth_dev *dev,\n \t\t\t struct i40e_tx_queue *txq);\n void i40e_set_tx_function(struct rte_eth_dev *dev);\n+void i40e_set_default_ptype_table(struct rte_eth_dev *dev);\n \n /* For each value it means, datasheet of hardware can tell more details\n *\n * @note: fix i40e_dev_supported_ptypes_get() if any change here.\n */\n static inline uint32_t\n-i40e_rxd_pkt_type_mapping(uint8_t ptype)\n+i40e_get_default_pkt_type(uint8_t ptype)\n {\n \tstatic const uint32_t type_table[UINT8_MAX + 1] __rte_cache_aligned = {\n \t\t/* L2 types */\ndiff --git a/drivers/net/i40e/i40e_rxtx_vec_neon.c b/drivers/net/i40e/i40e_rxtx_vec_neon.c\nindex 011c54e..7224756 100644\n--- a/drivers/net/i40e/i40e_rxtx_vec_neon.c\n+++ b/drivers/net/i40e/i40e_rxtx_vec_neon.c\n@@ -196,7 +196,8 @@ desc_to_olflags_v(uint64x2_t descs[4], struct rte_mbuf **rx_pkts)\n #define I40E_VPMD_DESC_DD_MASK\t0x0001000100010001ULL\n \n static inline void\n-desc_to_ptype_v(uint64x2_t descs[4], struct rte_mbuf **rx_pkts)\n+desc_to_ptype_v(uint64x2_t descs[4], struct rte_mbuf **rx_pkts,\n+\t\tuint32_t *ptype_tbl)\n {\n \tint i;\n \tuint8_t ptype;\n@@ -205,7 +206,7 @@ desc_to_ptype_v(uint64x2_t descs[4], struct rte_mbuf **rx_pkts)\n \tfor (i = 0; i < 4; i++) {\n \t\ttmp = vreinterpretq_u8_u64(vshrq_n_u64(descs[i], 30));\n \t\tptype = vgetq_lane_u8(tmp, 8);\n-\t\trx_pkts[0]->packet_type = i40e_rxd_pkt_type_mapping(ptype);\n+\t\trx_pkts[0]->packet_type = ptype_tbl[ptype];\n \t}\n \n }\n@@ -225,6 +226,7 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n \tuint16_t nb_pkts_recd;\n \tint pos;\n \tuint64_t var;\n+\tuint32 *ptype_tbl = rxq->vsi->adapter->ptype_tbl;\n \n \t/* mask to shuffle from desc. to mbuf */\n \tuint8x16_t shuf_msk = {\n@@ -429,7 +431,7 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n \t\t\t pkt_mb2);\n \t\tvst1q_u8((void *)&rx_pkts[pos]->rx_descriptor_fields1,\n \t\t\t pkt_mb1);\n-\t\tdesc_to_ptype_v(descs, &rx_pkts[pos]);\n+\t\tdesc_to_ptype_v(descs, &rx_pkts[pos], ptype_tbl);\n \t\t/* C.4 calc avaialbe number of desc */\n \t\tvar = __builtin_popcountll(stat & I40E_VPMD_DESC_DD_MASK);\n \t\tnb_pkts_recd += var;\ndiff --git a/drivers/net/i40e/i40e_rxtx_vec_sse.c b/drivers/net/i40e/i40e_rxtx_vec_sse.c\nindex b95cc8e..4721582 100644\n--- a/drivers/net/i40e/i40e_rxtx_vec_sse.c\n+++ b/drivers/net/i40e/i40e_rxtx_vec_sse.c\n@@ -218,7 +218,8 @@ desc_to_olflags_v(__m128i descs[4], struct rte_mbuf **rx_pkts)\n #define PKTLEN_SHIFT 10\n \n static inline void\n-desc_to_ptype_v(__m128i descs[4], struct rte_mbuf **rx_pkts)\n+desc_to_ptype_v(__m128i descs[4], struct rte_mbuf **rx_pkts,\n+\t\tuint32_t *ptype_tbl)\n {\n \t__m128i ptype0 = _mm_unpackhi_epi64(descs[0], descs[1]);\n \t__m128i ptype1 = _mm_unpackhi_epi64(descs[2], descs[3]);\n@@ -226,10 +227,10 @@ desc_to_ptype_v(__m128i descs[4], struct rte_mbuf **rx_pkts)\n \tptype0 = _mm_srli_epi64(ptype0, 30);\n \tptype1 = _mm_srli_epi64(ptype1, 30);\n \n-\trx_pkts[0]->packet_type = i40e_rxd_pkt_type_mapping(_mm_extract_epi8(ptype0, 0));\n-\trx_pkts[1]->packet_type = i40e_rxd_pkt_type_mapping(_mm_extract_epi8(ptype0, 8));\n-\trx_pkts[2]->packet_type = i40e_rxd_pkt_type_mapping(_mm_extract_epi8(ptype1, 0));\n-\trx_pkts[3]->packet_type = i40e_rxd_pkt_type_mapping(_mm_extract_epi8(ptype1, 8));\n+\trx_pkts[0]->packet_type = ptype_tbl[_mm_extract_epi8(ptype0, 0)];\n+\trx_pkts[1]->packet_type = ptype_tbl[_mm_extract_epi8(ptype0, 8)];\n+\trx_pkts[2]->packet_type = ptype_tbl[_mm_extract_epi8(ptype1, 0)];\n+\trx_pkts[3]->packet_type = ptype_tbl[_mm_extract_epi8(ptype1, 8)];\n }\n \n /*\n@@ -248,6 +249,7 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n \tint pos;\n \tuint64_t var;\n \t__m128i shuf_msk;\n+\tuint32_t *ptype_tbl = rxq->vsi->adapter->ptype_tbl;\n \n \t__m128i crc_adjust = _mm_set_epi16(\n \t\t\t\t0, 0, 0, /* ignore non-length fields */\n@@ -441,7 +443,7 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n \t\t\t\t pkt_mb2);\n \t\t_mm_storeu_si128((void *)&rx_pkts[pos]->rx_descriptor_fields1,\n \t\t\t\t pkt_mb1);\n-\t\tdesc_to_ptype_v(descs, &rx_pkts[pos]);\n+\t\tdesc_to_ptype_v(descs, &rx_pkts[pos], ptype_tbl);\n \t\t/* C.4 calc avaialbe number of desc */\n \t\tvar = __builtin_popcountll(_mm_cvtsi128_si64(staterr));\n \t\tnb_pkts_recd += var;\n", "prefixes": [ "dpdk-dev", "v3", "1/3" ] }