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GET /api/patches/21550/?format=api
{ "id": 21550, "url": "http://patches.dpdk.org/api/patches/21550/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1488902393-7237-3-git-send-email-olivier.matz@6wind.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1488902393-7237-3-git-send-email-olivier.matz@6wind.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1488902393-7237-3-git-send-email-olivier.matz@6wind.com", "date": "2017-03-07T15:59:49", "name": "[dpdk-dev,v2,2/6] net/ixgbe: implement descriptor status API", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "cb37f9eb8398a68fe687fc3c784da83380790f0c", "submitter": { "id": 8, "url": "http://patches.dpdk.org/api/people/8/?format=api", "name": "Olivier Matz", "email": "olivier.matz@6wind.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1488902393-7237-3-git-send-email-olivier.matz@6wind.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/21550/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/21550/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id DE3666CB4;\n\tTue, 7 Mar 2017 17:01:05 +0100 (CET)", "from proxy.6wind.com (host.76.145.23.62.rev.coltfrance.com\n\t[62.23.145.76]) by dpdk.org (Postfix) with ESMTP id 956761BBE\n\tfor <dev@dpdk.org>; Tue, 7 Mar 2017 17:00:17 +0100 (CET)", "from glumotte.dev.6wind.com (unknown [10.16.0.195])\n\tby proxy.6wind.com (Postfix) with ESMTP id 91C3825E49;\n\tTue, 7 Mar 2017 17:00:12 +0100 (CET)" ], "From": "Olivier Matz <olivier.matz@6wind.com>", "To": "dev@dpdk.org, thomas.monjalon@6wind.com, konstantin.ananyev@intel.com,\n\twenzhuo.lu@intel.com, helin.zhang@intel.com, jingjing.wu@intel.com,\n\tadrien.mazarguil@6wind.com, nelio.laranjeiro@6wind.com", "Cc": "ferruh.yigit@intel.com, bruce.richardson@intel.com,\n\tvenky.venkatesan@intel.com, arybchenko@solarflare.com", "Date": "Tue, 7 Mar 2017 16:59:49 +0100", "Message-Id": "<1488902393-7237-3-git-send-email-olivier.matz@6wind.com>", "X-Mailer": "git-send-email 2.8.1", "In-Reply-To": "<1488902393-7237-1-git-send-email-olivier.matz@6wind.com>", "References": "<1488388752-1819-1-git-send-email-olivier.matz@6wind.com>\n\t<1488902393-7237-1-git-send-email-olivier.matz@6wind.com>", "Subject": "[dpdk-dev] [PATCH v2 2/6] net/ixgbe: implement descriptor status API", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Signed-off-by: Olivier Matz <olivier.matz@6wind.com>\n---\n doc/guides/nics/features/ixgbe.ini | 2 ++\n doc/guides/nics/features/ixgbe_vec.ini | 2 ++\n doc/guides/nics/features/ixgbe_vf.ini | 2 ++\n doc/guides/nics/features/ixgbe_vf_vec.ini | 2 ++\n drivers/net/ixgbe/ixgbe_ethdev.c | 4 +++\n drivers/net/ixgbe/ixgbe_ethdev.h | 3 ++\n drivers/net/ixgbe/ixgbe_rxtx.c | 57 +++++++++++++++++++++++++++++++\n 7 files changed, 72 insertions(+)", "diff": "diff --git a/doc/guides/nics/features/ixgbe.ini b/doc/guides/nics/features/ixgbe.ini\nindex e65bbb8..d59ed43 100644\n--- a/doc/guides/nics/features/ixgbe.ini\n+++ b/doc/guides/nics/features/ixgbe.ini\n@@ -42,6 +42,8 @@ Inner L3 checksum = Y\n Inner L4 checksum = Y\n Packet type parsing = Y\n Timesync = Y\n+Rx Descriptor Status = Y\n+Tx Descriptor Status = Y\n Basic stats = Y\n Extended stats = Y\n Stats per queue = Y\ndiff --git a/doc/guides/nics/features/ixgbe_vec.ini b/doc/guides/nics/features/ixgbe_vec.ini\nindex e1773dd..1a9326e 100644\n--- a/doc/guides/nics/features/ixgbe_vec.ini\n+++ b/doc/guides/nics/features/ixgbe_vec.ini\n@@ -32,6 +32,8 @@ Flow control = Y\n Rate limitation = Y\n Traffic mirroring = Y\n Timesync = Y\n+Rx Descriptor Status = Y\n+Tx Descriptor Status = Y\n Basic stats = Y\n Extended stats = Y\n Stats per queue = Y\ndiff --git a/doc/guides/nics/features/ixgbe_vf.ini b/doc/guides/nics/features/ixgbe_vf.ini\nindex bf28215..8be1db8 100644\n--- a/doc/guides/nics/features/ixgbe_vf.ini\n+++ b/doc/guides/nics/features/ixgbe_vf.ini\n@@ -25,6 +25,8 @@ L4 checksum offload = Y\n Inner L3 checksum = Y\n Inner L4 checksum = Y\n Packet type parsing = Y\n+Rx Descriptor Status = Y\n+Tx Descriptor Status = Y\n Basic stats = Y\n Extended stats = Y\n Registers dump = Y\ndiff --git a/doc/guides/nics/features/ixgbe_vf_vec.ini b/doc/guides/nics/features/ixgbe_vf_vec.ini\nindex 8b8c90b..f02251f 100644\n--- a/doc/guides/nics/features/ixgbe_vf_vec.ini\n+++ b/doc/guides/nics/features/ixgbe_vf_vec.ini\n@@ -17,6 +17,8 @@ RSS hash = Y\n RSS key update = Y\n RSS reta update = Y\n VLAN filter = Y\n+Rx Descriptor Status = Y\n+Tx Descriptor Status = Y\n Basic stats = Y\n Extended stats = Y\n Registers dump = Y\ndiff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c\nindex 7169007..34bd681 100644\n--- a/drivers/net/ixgbe/ixgbe_ethdev.c\n+++ b/drivers/net/ixgbe/ixgbe_ethdev.c\n@@ -554,6 +554,8 @@ static const struct eth_dev_ops ixgbe_eth_dev_ops = {\n \t.rx_queue_release = ixgbe_dev_rx_queue_release,\n \t.rx_queue_count = ixgbe_dev_rx_queue_count,\n \t.rx_descriptor_done = ixgbe_dev_rx_descriptor_done,\n+\t.rx_descriptor_status = ixgbe_dev_rx_descriptor_status,\n+\t.tx_descriptor_status = ixgbe_dev_tx_descriptor_status,\n \t.tx_queue_setup = ixgbe_dev_tx_queue_setup,\n \t.tx_queue_release = ixgbe_dev_tx_queue_release,\n \t.dev_led_on = ixgbe_dev_led_on,\n@@ -632,6 +634,8 @@ static const struct eth_dev_ops ixgbevf_eth_dev_ops = {\n \t.rx_queue_setup = ixgbe_dev_rx_queue_setup,\n \t.rx_queue_release = ixgbe_dev_rx_queue_release,\n \t.rx_descriptor_done = ixgbe_dev_rx_descriptor_done,\n+\t.rx_descriptor_status = ixgbe_dev_rx_descriptor_status,\n+\t.tx_descriptor_status = ixgbe_dev_tx_descriptor_status,\n \t.tx_queue_setup = ixgbe_dev_tx_queue_setup,\n \t.tx_queue_release = ixgbe_dev_tx_queue_release,\n \t.rx_queue_intr_enable = ixgbevf_dev_rx_queue_intr_enable,\ndiff --git a/drivers/net/ixgbe/ixgbe_ethdev.h b/drivers/net/ixgbe/ixgbe_ethdev.h\nindex 680d5d9..fc11d20 100644\n--- a/drivers/net/ixgbe/ixgbe_ethdev.h\n+++ b/drivers/net/ixgbe/ixgbe_ethdev.h\n@@ -516,6 +516,9 @@ uint32_t ixgbe_dev_rx_queue_count(struct rte_eth_dev *dev,\n int ixgbe_dev_rx_descriptor_done(void *rx_queue, uint16_t offset);\n int ixgbevf_dev_rx_descriptor_done(void *rx_queue, uint16_t offset);\n \n+int ixgbe_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);\n+int ixgbe_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);\n+\n int ixgbe_dev_rx_init(struct rte_eth_dev *dev);\n \n void ixgbe_dev_tx_init(struct rte_eth_dev *dev);\ndiff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c\nindex 9502432..216079a 100644\n--- a/drivers/net/ixgbe/ixgbe_rxtx.c\n+++ b/drivers/net/ixgbe/ixgbe_rxtx.c\n@@ -2950,6 +2950,63 @@ ixgbe_dev_rx_descriptor_done(void *rx_queue, uint16_t offset)\n \t\t\trte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD));\n }\n \n+int\n+ixgbe_dev_rx_descriptor_status(void *rx_queue, uint16_t offset)\n+{\n+\tstruct ixgbe_rx_queue *rxq = rx_queue;\n+\tvolatile uint32_t *status;\n+\tuint32_t nb_hold, desc;\n+\n+\tif (unlikely(offset >= rxq->nb_rx_desc))\n+\t\treturn -EINVAL;\n+\n+#ifdef RTE_IXGBE_INC_VECTOR\n+\tif (rxq->rx_using_sse)\n+\t\tnb_hold = rxq->rxrearm_nb;\n+\telse\n+#endif\n+\t\tnb_hold = rxq->nb_rx_hold;\n+\tif (offset >= rxq->nb_rx_desc - nb_hold)\n+\t\treturn RTE_ETH_RX_DESC_UNAVAIL;\n+\n+\tdesc = rxq->rx_tail + offset;\n+\tif (desc >= rxq->nb_rx_desc)\n+\t\tdesc -= rxq->nb_rx_desc;\n+\n+\tstatus = &rxq->rx_ring[desc].wb.upper.status_error;\n+\tif (*status & rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD))\n+\t\treturn RTE_ETH_RX_DESC_DONE;\n+\n+\treturn RTE_ETH_RX_DESC_AVAIL;\n+}\n+\n+int\n+ixgbe_dev_tx_descriptor_status(void *tx_queue, uint16_t offset)\n+{\n+\tstruct ixgbe_tx_queue *txq = tx_queue;\n+\tvolatile uint32_t *status;\n+\tuint32_t desc;\n+\n+\tif (unlikely(offset >= txq->nb_tx_desc))\n+\t\treturn -EINVAL;\n+\n+\tdesc = txq->tx_tail + offset;\n+\t/* go to next desc that has the RS bit */\n+\tdesc = ((desc + txq->tx_rs_thresh - 1) / txq->tx_rs_thresh) *\n+\t\ttxq->tx_rs_thresh;\n+\tif (desc >= txq->nb_tx_desc) {\n+\t\tdesc -= txq->nb_tx_desc;\n+\t\tif (desc >= txq->nb_tx_desc)\n+\t\t\tdesc -= txq->nb_tx_desc;\n+\t}\n+\n+\tstatus = &txq->tx_ring[desc].wb.status;\n+\tif (*status & rte_cpu_to_le_32(IXGBE_ADVTXD_STAT_DD))\n+\t\treturn RTE_ETH_TX_DESC_DONE;\n+\n+\treturn RTE_ETH_TX_DESC_FULL;\n+}\n+\n void __attribute__((cold))\n ixgbe_dev_clear_queues(struct rte_eth_dev *dev)\n {\n", "prefixes": [ "dpdk-dev", "v2", "2/6" ] }