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GET /api/patches/21366/?format=api
{ "id": 21366, "url": "http://patches.dpdk.org/api/patches/21366/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1488562101-6658-9-git-send-email-jerin.jacob@caviumnetworks.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1488562101-6658-9-git-send-email-jerin.jacob@caviumnetworks.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1488562101-6658-9-git-send-email-jerin.jacob@caviumnetworks.com", "date": "2017-03-03T17:27:50", "name": "[dpdk-dev,08/39] event/octeontx: add mailbox support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "9f7aba2c089c4027d930d4e007b299ab50e17f76", "submitter": { "id": 305, "url": "http://patches.dpdk.org/api/people/305/?format=api", "name": "Jerin Jacob", "email": "jerin.jacob@caviumnetworks.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1488562101-6658-9-git-send-email-jerin.jacob@caviumnetworks.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/21366/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/21366/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 2DAD8FA40;\n\tFri, 3 Mar 2017 18:29:30 +0100 (CET)", "from NAM01-BN3-obe.outbound.protection.outlook.com\n\t(mail-bn3nam01on0067.outbound.protection.outlook.com [104.47.33.67])\n\tby dpdk.org (Postfix) with ESMTP id 94E48FA31\n\tfor <dev@dpdk.org>; Fri, 3 Mar 2017 18:29:28 +0100 (CET)", "from localhost.localdomain.localdomain (14.140.2.178) by\n\tBN3PR0701MB1719.namprd07.prod.outlook.com (10.163.39.18) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id\n\t15.1.933.12; Fri, 3 Mar 2017 17:29:23 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=ECF5MrYDVeXc5qJg9Z1wyUHdoVXHF0ivGYVDdJJ5NYg=;\n\tb=SrxDjF8UDy7Icz+n8goed8RXLGon6POivvbcpMuw4GSdRFa9XWdKpCUFp8d2jFMdb4pP86FhJFyHQvUn3awMGsqVcTfSgzHmygivL4+q1V+pDD0ZMLCBc8UABOHGGxhy9iR8CXb09fo6AQrxR2aKcZzOdeOOvqrWZeC0+guyi/8=", "Authentication-Results": "dpdk.org; dkim=none (message not signed)\n\theader.d=none;dpdk.org; dmarc=none action=none\n\theader.from=caviumnetworks.com;", "From": "Jerin Jacob <jerin.jacob@caviumnetworks.com>", "To": "dev@dpdk.org", "Cc": "thomas.monjalon@6wind.com, bruce.richardson@intel.com,\n\tharry.van.haaren@intel.com, hemant.agrawal@nxp.com, gage.eads@intel.com, \n\tnipun.gupta@nxp.com, santosh.shukla@caviumnetworks.com,\n\tJerin Jacob <jerin.jacob@caviumnetworks.com>", "Date": "Fri, 3 Mar 2017 22:57:50 +0530", "Message-Id": "<1488562101-6658-9-git-send-email-jerin.jacob@caviumnetworks.com>", "X-Mailer": "git-send-email 2.5.5", "In-Reply-To": "<1488562101-6658-1-git-send-email-jerin.jacob@caviumnetworks.com>", "References": "<1488562101-6658-1-git-send-email-jerin.jacob@caviumnetworks.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[14.140.2.178]", "X-ClientProxiedBy": "BMXPR01CA0021.INDPRD01.PROD.OUTLOOK.COM (10.174.214.159)\n\tTo\n\tBN3PR0701MB1719.namprd07.prod.outlook.com (10.163.39.18)", "X-MS-Office365-Filtering-Correlation-Id": "903126f0-cd75-4157-dd49-08d4625ad79f", "X-Microsoft-Antispam": "UriScan:; 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PCL:0;\n\tRULEID:(6040375)(601004)(2401047)(8121501046)(5005006)(10201501046)(3002001)(6041248)(20161123555025)(20161123560025)(20161123562025)(20161123558025)(20161123564025)(6072148);\n\tSRVR:BN3PR0701MB1719; BCL:0; PCL:0; RULEID:; SRVR:BN3PR0701MB1719; ", "X-Forefront-PRVS": "0235CBE7D0", "X-Forefront-Antispam-Report": "SFV:NSPM;\n\tSFS:(10009020)(4630300001)(6069001)(6009001)(7916002)(39450400003)(3846002)(50986999)(6116002)(36756003)(81166006)(6512007)(97736004)(2361001)(2351001)(6506006)(5660300001)(15650500001)(42186005)(50226002)(8676002)(6666003)(106356001)(8656002)(2950100002)(2906002)(25786008)(47776003)(6486002)(76176999)(33646002)(7736002)(107886003)(42882006)(66066001)(110136004)(4326008)(38730400002)(6916009)(305945005)(48376002)(92566002)(5009440100003)(5003940100001)(50466002)(189998001)(53936002)(7099028)(110426004);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:BN3PR0701MB1719;\n\tH:localhost.localdomain.localdomain; FPR:; SPF:None; MLV:nov;\n\tPTR:InfoNoRecords; LANG:en; ", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-OriginatorOrg": "caviumnetworks.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "03 Mar 2017 17:29:23.8340\n\t(UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN3PR0701MB1719", "Subject": "[dpdk-dev] [PATCH 08/39] event/octeontx: add mailbox support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "ssovf VF device has mailbox mechanism to communicate\nwith PF device. This patch adds support for a mbox API to\nsend the mailbox request to PF device.\nThe ssovf VF device will be used as the communication channel\nto talk to PF devices of all the network accelerated\nco-processors in Octeontx. Exposing as shared function to\nuse it from pool, crypto, network devices.\n\nSigned-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>\nSigned-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>\n---\n drivers/event/octeontx/Makefile | 1 +\n drivers/event/octeontx/rte_pmd_octeontx_ssovf.h | 8 +\n .../octeontx/rte_pmd_octeontx_ssovf_version.map | 1 +\n drivers/event/octeontx/ssovf_mbox.c | 232 +++++++++++++++++++++\n 4 files changed, 242 insertions(+)\n create mode 100644 drivers/event/octeontx/ssovf_mbox.c", "diff": "diff --git a/drivers/event/octeontx/Makefile b/drivers/event/octeontx/Makefile\nindex 896e556..3076b85 100644\n--- a/drivers/event/octeontx/Makefile\n+++ b/drivers/event/octeontx/Makefile\n@@ -47,6 +47,7 @@ LIBABIVER := 1\n # all source are stored in SRCS-y\n #\n SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_probe.c\n+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_mbox.c\n \n # install this header file\n SYMLINK-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF)-include := rte_pmd_octeontx_ssovf.h\ndiff --git a/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h b/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h\nindex e92a61f..3da7cfd 100644\n--- a/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h\n+++ b/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h\n@@ -46,8 +46,16 @@ enum octeontx_ssovf_type {\n \tOCTEONTX_SSO_HWS, /* SSO hardware workslot vf */\n };\n \n+struct octeontx_mbox_hdr {\n+\tuint16_t vfid; /* VF index or pf resource index local to the domain */\n+\tuint8_t coproc; /* Coprocessor id */\n+\tuint8_t msg; /* Message id */\n+\tuint8_t res_code; /* Functional layer response code */\n+};\n \n int octeontx_ssovf_info(struct octeontx_ssovf_info *info);\n void *octeontx_ssovf_bar(enum octeontx_ssovf_type, uint8_t id, uint8_t bar);\n+int octeontx_ssovf_mbox_send(struct octeontx_mbox_hdr *hdr,\n+\t\tvoid *txdata, uint16_t txlen, void *rxdata, uint16_t rxlen);\n \n #endif /* __RTE_PMD_OCTEONTX_SSOVF_H__ */\ndiff --git a/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map b/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map\nindex c71d4c7..3810a03 100644\n--- a/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map\n+++ b/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map\n@@ -3,6 +3,7 @@ DPDK_17.05 {\n \n \tocteontx_ssovf_info;\n \tocteontx_ssovf_bar;\n+\tocteontx_ssovf_mbox_send;\n \n \tlocal: *;\n };\ndiff --git a/drivers/event/octeontx/ssovf_mbox.c b/drivers/event/octeontx/ssovf_mbox.c\nnew file mode 100644\nindex 0000000..d07750f\n--- /dev/null\n+++ b/drivers/event/octeontx/ssovf_mbox.c\n@@ -0,0 +1,232 @@\n+/*\n+ * BSD LICENSE\n+ *\n+ * Copyright (C) Cavium networks Ltd. 2017.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ * * Neither the name of Cavium networks nor the names of its\n+ * contributors may be used to endorse or promote products derived\n+ * from this software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#include <string.h>\n+\n+#include <rte_atomic.h>\n+#include <rte_common.h>\n+#include <rte_cycles.h>\n+#include <rte_io.h>\n+#include <rte_spinlock.h>\n+\n+#include \"ssovf_evdev.h\"\n+\n+/* Mbox operation timeout in milliseconds */\n+#define MBOX_WAIT_TIME\t\t3000\n+#define MAX_RAM_MBOX_LEN\t((SSOW_BAR4_LEN >> 1) - 8 /* Mbox header */)\n+\n+/* Mbox channel state */\n+enum {\n+\tMBOX_CHAN_STATE_REQ = 1,\n+\tMBOX_CHAN_STATE_RES = 0,\n+};\n+\n+/* Response messages */\n+enum {\n+\tMBOX_RET_SUCCESS,\n+\tMBOX_RET_INVALID,\n+\tMBOX_RET_INTERNAL_ERR,\n+};\n+\n+struct mbox {\n+\tint init_once;\n+\tuint8_t *ram_mbox_base; /* Base address of mbox message stored in ram */\n+\tuint8_t *reg; /* Store to this register triggers PF mbox interrupt */\n+\tuint16_t tag_own; /* Last tag which was written to own channel */\n+\trte_spinlock_t lock;\n+};\n+\n+static struct mbox octeontx_mbox;\n+\n+/*\n+ * Structure used for mbox synchronization\n+ * This structure sits at the begin of Mbox RAM and used as main\n+ * synchronization point for channel communication\n+ */\n+struct mbox_ram_hdr {\n+\tunion {\n+\t\tuint64_t u64;\n+\t\tstruct {\n+\t\t\tuint8_t chan_state : 1;\n+\t\t\tuint8_t coproc : 7;\n+\t\t\tuint8_t msg;\n+\t\t\tuint8_t vfid;\n+\t\t\tuint8_t res_code;\n+\t\t\tuint16_t tag;\n+\t\t\tuint16_t len;\n+\t\t};\n+\t};\n+};\n+\n+static inline void\n+mbox_send_requeust(struct mbox *m, struct octeontx_mbox_hdr *hdr,\n+\t\t\tconst void *txmsg, uint16_t txsize)\n+{\n+\tstruct mbox_ram_hdr old_hdr;\n+\tstruct mbox_ram_hdr new_hdr = {0};\n+\tuint64_t *ram_mbox_hdr = (uint64_t *)m->ram_mbox_base;\n+\tuint8_t *ram_mbox_msg = m->ram_mbox_base + sizeof(struct mbox_ram_hdr);\n+\n+\t/*\n+\t * Initialize the channel with the tag left by last send.\n+\t * On success full mbox send complete, PF increments the tag by one.\n+\t * The sender can validate integrity of PF message with this scheme\n+\t */\n+\told_hdr.u64 = rte_read64(ram_mbox_hdr);\n+\tm->tag_own = (old_hdr.tag + 2) & (~0x1ul); /* next even number */\n+\n+\t/* Copy msg body */\n+\tif (txmsg)\n+\t\tmemcpy(ram_mbox_msg, txmsg, txsize);\n+\n+\t/* Prepare new hdr */\n+\tnew_hdr.chan_state = MBOX_CHAN_STATE_REQ;\n+\tnew_hdr.coproc = hdr->coproc;\n+\tnew_hdr.msg = hdr->msg;\n+\tnew_hdr.vfid = hdr->vfid;\n+\tnew_hdr.tag = m->tag_own;\n+\tnew_hdr.len = txsize;\n+\n+\t/* Write the msg header */\n+\trte_write64(new_hdr.u64, ram_mbox_hdr);\n+\trte_io_wmb();\n+\t/* Notify PF about the new msg - write to MBOX reg generates PF IRQ */\n+\trte_write64(0, m->reg);\n+}\n+\n+static inline int\n+mbox_wait_response(struct mbox *m, struct octeontx_mbox_hdr *hdr,\n+\t\t\tvoid *rxmsg, uint16_t rxsize)\n+{\n+\tint res = 0, wait;\n+\tuint16_t len;\n+\tstruct mbox_ram_hdr rx_hdr;\n+\tuint64_t *ram_mbox_hdr = (uint64_t *)m->ram_mbox_base;\n+\tuint8_t *ram_mbox_msg = m->ram_mbox_base + sizeof(struct mbox_ram_hdr);\n+\n+\t/* Wait for response */\n+\twait = MBOX_WAIT_TIME;\n+\twhile (wait > 0) {\n+\t\trte_delay_us(100);\n+\t\trx_hdr.u64 = rte_read64(ram_mbox_hdr);\n+\t\tif (rx_hdr.chan_state == MBOX_CHAN_STATE_RES)\n+\t\t\tbreak;\n+\t\twait -= 10;\n+\t}\n+\n+\thdr->res_code = rx_hdr.res_code;\n+\tm->tag_own++;\n+\n+\t/* Tag mismatch */\n+\tif (m->tag_own != rx_hdr.tag) {\n+\t\tres = -EBADR;\n+\t\tgoto error;\n+\t}\n+\n+\t/* PF nacked the msg */\n+\tif (rx_hdr.res_code != MBOX_RET_SUCCESS) {\n+\t\tres = -EBADMSG;\n+\t\tgoto error;\n+\t}\n+\n+\t/* Timeout */\n+\tif (wait <= 0) {\n+\t\tres = -ETIMEDOUT;\n+\t\tgoto error;\n+\t}\n+\n+\tlen = RTE_MIN(rx_hdr.len, rxsize);\n+\tif (rxmsg)\n+\t\tmemcpy(rxmsg, ram_mbox_msg, len);\n+\n+\treturn len;\n+\n+error:\n+\tssovf_log_err(\"Failed to send mbox(%d/%d) coproc=%d msg=%d ret=(%d,%d)\",\n+\t\t\tm->tag_own, rx_hdr.tag, hdr->msg, hdr->coproc, res,\n+\t\t\thdr->res_code);\n+\treturn res;\n+}\n+\n+static inline int\n+mbox_send(struct mbox *m, struct octeontx_mbox_hdr *hdr, const void *txmsg,\n+\t\tuint16_t txsize, void *rxmsg, uint16_t rxsize)\n+{\n+\tint res = -EINVAL;\n+\n+\tif (m->init_once == 0 || hdr == NULL ||\n+\t\ttxsize > MAX_RAM_MBOX_LEN || rxsize > MAX_RAM_MBOX_LEN) {\n+\t\tssovf_log_err(\"Invalid init_once=%d hdr=%p txsz=%d rxsz=%d\",\n+\t\t\t\tm->init_once, hdr, txsize, rxsize);\n+\t\treturn res;\n+\t}\n+\n+\trte_spinlock_lock(&m->lock);\n+\n+\tmbox_send_requeust(m, hdr, txmsg, txsize);\n+\tres = mbox_wait_response(m, hdr, rxmsg, rxsize);\n+\n+\trte_spinlock_unlock(&m->lock);\n+\treturn res;\n+}\n+\n+static inline int\n+mbox_setup(struct mbox *m)\n+{\n+\tif (unlikely(m->init_once == 0)) {\n+\t\trte_spinlock_init(&m->lock);\n+\t\tm->ram_mbox_base = octeontx_ssovf_bar(OCTEONTX_SSO_HWS, 0, 4);\n+\t\tm->reg = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, 0, 0);\n+\t\tm->reg += SSO_VHGRP_PF_MBOX(1);\n+\n+\t\tif (m->ram_mbox_base == NULL || m->reg == NULL) {\n+\t\t\tssovf_log_err(\"Invalid ram_mbox_base=%p or reg=%p\",\n+\t\t\t\tm->ram_mbox_base, m->reg);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tm->init_once = 1;\n+\t}\n+\treturn 0;\n+}\n+\n+int\n+octeontx_ssovf_mbox_send(struct octeontx_mbox_hdr *hdr, void *txdata,\n+\t\t\t\t uint16_t txlen, void *rxdata, uint16_t rxlen)\n+{\n+\tstruct mbox *m = &octeontx_mbox;\n+\n+\tRTE_BUILD_BUG_ON(sizeof(struct mbox_ram_hdr) != 8);\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY || mbox_setup(m))\n+\t\treturn -EINVAL;\n+\n+\treturn mbox_send(m, hdr, txdata, txlen, rxdata, rxlen);\n+}\n", "prefixes": [ "dpdk-dev", "08/39" ] }