Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/19802/?format=api
{ "id": 19802, "url": "http://patches.dpdk.org/api/patches/19802/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1484832240-2048-34-git-send-email-hemant.agrawal@nxp.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1484832240-2048-34-git-send-email-hemant.agrawal@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1484832240-2048-34-git-send-email-hemant.agrawal@nxp.com", "date": "2017-01-19T13:23:58", "name": "[dpdk-dev,PATCHv5,31/33] net/dpaa2: enabling the use of physical addresses", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "009ee3081daa76f345f40ad606de443dd2ca05d4", "submitter": { "id": 477, "url": "http://patches.dpdk.org/api/people/477/?format=api", "name": "Hemant Agrawal", "email": "hemant.agrawal@nxp.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1484832240-2048-34-git-send-email-hemant.agrawal@nxp.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/19802/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/19802/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 7D915FAFA;\n\tThu, 19 Jan 2017 14:26:29 +0100 (CET)", "from NAM02-BL2-obe.outbound.protection.outlook.com\n\t(mail-bl2nam02on0056.outbound.protection.outlook.com [104.47.38.56])\n\tby dpdk.org (Postfix) with ESMTP id 5F411FA75\n\tfor <dev@dpdk.org>; Thu, 19 Jan 2017 14:26:00 +0100 (CET)", "from CY4PR03CA0024.namprd03.prod.outlook.com (10.168.162.34) by\n\tCY4PR03MB2472.namprd03.prod.outlook.com (10.168.165.8) with Microsoft\n\tSMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id\n\t15.1.845.12; Thu, 19 Jan 2017 13:25:58 +0000", "from BN1BFFO11FD039.protection.gbl (2a01:111:f400:7c10::1:100) by\n\tCY4PR03CA0024.outlook.office365.com (2603:10b6:903:33::34) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.860.13 via\n\tFrontend Transport; Thu, 19 Jan 2017 13:25:58 +0000", "from tx30smr01.am.freescale.net (192.88.168.50) by\n\tBN1BFFO11FD039.mail.protection.outlook.com (10.58.144.102) with\n\tMicrosoft\n\tSMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id\n\t15.1.803.8 via Frontend Transport; Thu, 19 Jan 2017 13:25:55 +0000", "from bf-netperf1.idc ([10.232.134.28])\n\tby tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tv0JDO4f9015351; Thu, 19 Jan 2017 06:25:51 -0700" ], "Authentication-Results": "spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed)\n\theader.d=none; nxp.com; dmarc=fail action=none header.from=nxp.com;\n\tnxp.com; \n\tdkim=none (message not signed) header.d=none;", "Received-SPF": "Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "From": "Hemant Agrawal <hemant.agrawal@nxp.com>", "To": "<dev@dpdk.org>", "CC": "<thomas.monjalon@6wind.com>, <bruce.richardson@intel.com>,\n\t<shreyansh.jain@nxp.com>, <john.mcnamara@intel.com>,\n\t<ferruh.yigit@intel.com>, <jerin.jacob@caviumnetworks.com>,\n\tHemant Agrawal <hemant.agrawal@nxp.com>", "Date": "Thu, 19 Jan 2017 18:53:58 +0530", "Message-ID": "<1484832240-2048-34-git-send-email-hemant.agrawal@nxp.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1484832240-2048-1-git-send-email-hemant.agrawal@nxp.com>", "References": "<1484679174-4174-1-git-send-email-hemant.agrawal@nxp.com>\n\t<1484832240-2048-1-git-send-email-hemant.agrawal@nxp.com>", "X-EOPAttributedMessage": "0", "X-Matching-Connectors": "131293059583629016;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); 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\n\tHelo=[tx30smr01.am.freescale.net]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CY4PR03MB2472", "Subject": "[dpdk-dev] [PATCHv5 31/33] net/dpaa2: enabling the use of physical\n\taddresses", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "DPAA2 - ARM support both physical and virtual addressing.\nThis patch enables the compile time usages of physical\naddress instead of virtual address.\n\nThe current usages are also set to default as Physical\nAddress.\n\nSigned-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>\n---\n config/common_base | 1 +\n config/defconfig_arm64-dpaa2-linuxapp-gcc | 1 +\n drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 66 +++++++++++++++++++++++++++++++\n drivers/net/dpaa2/base/dpaa2_hw_dpni.c | 4 +-\n drivers/net/dpaa2/dpaa2_rxtx.c | 16 ++++----\n drivers/pool/dpaa2/dpaa2_hw_mempool.c | 19 +++++++--\n 6 files changed, 95 insertions(+), 12 deletions(-)", "diff": "diff --git a/config/common_base b/config/common_base\nindex 5a10e45..ebd6281 100644\n--- a/config/common_base\n+++ b/config/common_base\n@@ -292,6 +292,7 @@ CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_MBOX=n\n #\n CONFIG_RTE_LIBRTE_DPAA2_COMMON=n\n CONFIG_RTE_LIBRTE_DPAA2_POOL=n\n+CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y\n \n #\n # Compile NXP DPAA2 FSL-MC Bus\ndiff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc\nindex 7665912..18c9589 100644\n--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc\n+++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc\n@@ -50,6 +50,7 @@ CONFIG_RTE_PKTMBUF_HEADROOM=256\n CONFIG_RTE_LIBRTE_DPAA2_COMMON=y\n CONFIG_RTE_LIBRTE_DPAA2_POOL=n\n CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS=\"dpaa2\"\n+CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y\n \n #\n # Compile NXP DPAA2 FSL-MC Bus\ndiff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h\nindex 158dfef..052a171 100644\n--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h\n+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h\n@@ -175,6 +175,72 @@ struct qbman_fle {\n */\n #define DPAA2_EQ_RESP_ALWAYS\t\t1\n \n+#ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA\n+static void *dpaa2_mem_ptov(phys_addr_t paddr) __attribute__((unused));\n+/* todo - this is costly, need to write a fast coversion routine */\n+static void *dpaa2_mem_ptov(phys_addr_t paddr)\n+{\n+\tconst struct rte_memseg *memseg = rte_eal_get_physmem_layout();\n+\tint i;\n+\n+\tfor (i = 0; i < RTE_MAX_MEMSEG && memseg[i].addr_64 != 0; i++) {\n+\t\tif (paddr >= memseg[i].phys_addr &&\n+\t\t (char *)paddr < (char *)memseg[i].phys_addr + memseg[i].len)\n+\t\t\treturn (void *)(memseg[i].addr_64\n+\t\t\t\t+ (paddr - memseg[i].phys_addr));\n+\t}\n+\treturn NULL;\n+}\n+\n+static phys_addr_t dpaa2_mem_vtop(uint64_t vaddr) __attribute__((unused));\n+static phys_addr_t dpaa2_mem_vtop(uint64_t vaddr)\n+{\n+\tconst struct rte_memseg *memseg = rte_eal_get_physmem_layout();\n+\tint i;\n+\n+\tfor (i = 0; i < RTE_MAX_MEMSEG && memseg[i].addr_64 != 0; i++) {\n+\t\tif (vaddr >= memseg[i].addr_64 &&\n+\t\t vaddr < memseg[i].addr_64 + memseg[i].len)\n+\t\t\treturn memseg[i].phys_addr\n+\t\t\t\t+ (vaddr - memseg[i].addr_64);\n+\t}\n+\treturn (phys_addr_t)(NULL);\n+}\n+\n+/**\n+ * When we are using Physical addresses as IO Virtual Addresses,\n+ * Need to call conversion routines dpaa2_mem_vtop & dpaa2_mem_ptov\n+ * whereever required.\n+ * These routines are called with help of below MACRO's\n+ */\n+\n+#define DPAA2_MBUF_VADDR_TO_IOVA(mbuf) ((mbuf)->buf_physaddr)\n+\n+/**\n+ * macro to convert Virtual address to IOVA\n+ */\n+#define DPAA2_VADDR_TO_IOVA(_vaddr) dpaa2_mem_vtop((uint64_t)(_vaddr))\n+\n+/**\n+ * macro to convert IOVA to Virtual address\n+ */\n+#define DPAA2_IOVA_TO_VADDR(_iova) dpaa2_mem_ptov((phys_addr_t)(_iova))\n+\n+/**\n+ * macro to convert modify the memory containing IOVA to Virtual address\n+ */\n+#define DPAA2_MODIFY_IOVA_TO_VADDR(_mem, _type) \\\n+\t{_mem = (_type)(dpaa2_mem_ptov((phys_addr_t)(_mem))); }\n+\n+#else\t/* RTE_LIBRTE_DPAA2_USE_PHYS_IOVA */\n+\n+#define DPAA2_MBUF_VADDR_TO_IOVA(mbuf) ((mbuf)->buf_addr)\n+#define DPAA2_VADDR_TO_IOVA(_vaddr) (_vaddr)\n+#define DPAA2_IOVA_TO_VADDR(_iova) (_iova)\n+#define DPAA2_MODIFY_IOVA_TO_VADDR(_mem, _type)\n+\n+#endif /* RTE_LIBRTE_DPAA2_USE_PHYS_IOVA */\n+\n struct dpaa2_dpbp_dev *dpaa2_alloc_dpbp_dev(void);\n void dpaa2_free_dpbp_dev(struct dpaa2_dpbp_dev *dpbp);\n \ndiff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c\nindex 08f53b3..3dc60cc 100644\n--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c\n+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c\n@@ -76,7 +76,7 @@\n \tmemset(&tc_cfg, 0, sizeof(struct dpni_rx_tc_dist_cfg));\n \n \tdpaa2_distset_to_dpkg_profile_cfg(req_dist_set, &kg_cfg);\n-\ttc_cfg.key_cfg_iova = (uint64_t)(p_params);\n+\ttc_cfg.key_cfg_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(p_params));\n \ttc_cfg.dist_size = eth_dev->data->nb_rx_queues;\n \ttc_cfg.dist_mode = DPNI_DIST_MODE_HASH;\n \n@@ -119,7 +119,7 @@ int dpaa2_remove_flow_dist(\n \tmemset(p_params, 0, DIST_PARAM_IOVA_SIZE);\n \tmemset(&tc_cfg, 0, sizeof(struct dpni_rx_tc_dist_cfg));\n \n-\ttc_cfg.key_cfg_iova = (uint64_t)(p_params);\n+\ttc_cfg.key_cfg_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(p_params));\n \ttc_cfg.dist_size = 0;\n \ttc_cfg.dist_mode = DPNI_DIST_MODE_NONE;\n \ndiff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c\nindex 55068e5..4596337 100644\n--- a/drivers/net/dpaa2/dpaa2_rxtx.c\n+++ b/drivers/net/dpaa2/dpaa2_rxtx.c\n@@ -136,7 +136,7 @@ static inline struct rte_mbuf *__attribute__((hot))\n eth_fd_to_mbuf(const struct qbman_fd *fd)\n {\n \tstruct rte_mbuf *mbuf = DPAA2_INLINE_MBUF_FROM_BUF(\n-\t\t\tDPAA2_GET_FD_ADDR(fd),\n+\t\tDPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)),\n \t\t\tbpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size);\n \n \t/* need to repopulated some of the fields,\n@@ -151,10 +151,11 @@ static inline struct rte_mbuf *__attribute__((hot))\n \t/* Parse the packet */\n \t/* parse results are after the private - sw annotation area */\n \tmbuf->packet_type = dpaa2_dev_rx_parse(\n-\t\t\t(uint64_t)(DPAA2_GET_FD_ADDR(fd))\n+\t\t\t(uint64_t)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd))\n \t\t\t + DPAA2_FD_PTA_SIZE);\n \n-\tdpaa2_dev_rx_offload((uint64_t)(DPAA2_GET_FD_ADDR(fd)) +\n+\tdpaa2_dev_rx_offload((uint64_t)DPAA2_IOVA_TO_VADDR(\n+\t\t\t DPAA2_GET_FD_ADDR(fd)) +\n \t\t\t DPAA2_FD_PTA_SIZE, mbuf);\n \n \tmbuf->next = NULL;\n@@ -177,7 +178,7 @@ static void __attribute__ ((noinline)) __attribute__((hot))\n \t/*Resetting the buffer pool id and offset field*/\n \tfd->simple.bpid_offset = 0;\n \n-\tDPAA2_SET_FD_ADDR(fd, (mbuf->buf_addr));\n+\tDPAA2_SET_FD_ADDR(fd, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));\n \tDPAA2_SET_FD_LEN(fd, mbuf->data_len);\n \tDPAA2_SET_FD_BPID(fd, bpid);\n \tDPAA2_SET_FD_OFFSET(fd, mbuf->data_off);\n@@ -218,7 +219,7 @@ static inline int __attribute__((hot))\n \t/*Resetting the buffer pool id and offset field*/\n \tfd->simple.bpid_offset = 0;\n \n-\tDPAA2_SET_FD_ADDR(fd, (m->buf_addr));\n+\tDPAA2_SET_FD_ADDR(fd, DPAA2_MBUF_VADDR_TO_IOVA(m));\n \tDPAA2_SET_FD_LEN(fd, mbuf->data_len);\n \tDPAA2_SET_FD_BPID(fd, bpid);\n \tDPAA2_SET_FD_OFFSET(fd, mbuf->data_off);\n@@ -270,7 +271,7 @@ static inline int __attribute__((hot))\n \tqbman_pull_desc_set_fq(&pulldesc, fqid);\n \t/* todo optimization - we can have dq_storage_phys available*/\n \tqbman_pull_desc_set_storage(&pulldesc, dq_storage,\n-\t\t\t(dma_addr_t)(dq_storage), 1);\n+\t\t\t(dma_addr_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1);\n \n \t/*Issue a volatile dequeue command. */\n \twhile (1) {\n@@ -311,7 +312,8 @@ static inline int __attribute__((hot))\n \t\t}\n \n \t\tfd = qbman_result_DQ_fd(dq_storage);\n-\t\tmbuf = (struct rte_mbuf *)(DPAA2_GET_FD_ADDR(fd)\n+\t\tmbuf = (struct rte_mbuf *)DPAA2_IOVA_TO_VADDR(\n+\t\t\tDPAA2_GET_FD_ADDR(fd)\n \t\t\t - bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size);\n \t\t/* Prefeth mbuf */\n \t\trte_prefetch0(mbuf);\ndiff --git a/drivers/pool/dpaa2/dpaa2_hw_mempool.c b/drivers/pool/dpaa2/dpaa2_hw_mempool.c\nindex f36e909..3875d7c 100644\n--- a/drivers/pool/dpaa2/dpaa2_hw_mempool.c\n+++ b/drivers/pool/dpaa2/dpaa2_hw_mempool.c\n@@ -203,9 +203,14 @@ void dpaa2_mbuf_release(struct rte_mempool *pool __rte_unused,\n \tn = count % DPAA2_MBUF_MAX_ACQ_REL;\n \n \t/* convert mbuf to buffers for the remainder*/\n-\tfor (i = 0; i < n ; i++)\n+\tfor (i = 0; i < n ; i++) {\n+#ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA\n+\t\tbufs[i] = (uint64_t)rte_mempool_virt2phy(pool, obj_table[i])\n+\t\t\t\t+ meta_data_size;\n+#else\n \t\tbufs[i] = (uint64_t)obj_table[i] + meta_data_size;\n-\n+#endif\n+\t}\n \t/* feed them to bman*/\n \tdo {\n \t\tret = qbman_swp_release(swp, &releasedesc, bufs, n);\n@@ -214,8 +219,15 @@ void dpaa2_mbuf_release(struct rte_mempool *pool __rte_unused,\n \t/* if there are more buffers to free */\n \twhile (n < count) {\n \t\t/* convert mbuf to buffers */\n-\t\tfor (i = 0; i < DPAA2_MBUF_MAX_ACQ_REL; i++)\n+\t\tfor (i = 0; i < DPAA2_MBUF_MAX_ACQ_REL; i++) {\n+#ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA\n+\t\t\tbufs[i] = (uint64_t)\n+\t\t\t\trte_mempool_virt2phy(pool, obj_table[n + i])\n+\t\t\t\t\t+ meta_data_size;\n+#else\n \t\t\tbufs[i] = (uint64_t)obj_table[n + i] + meta_data_size;\n+#endif\n+\t\t}\n \n \t\tdo {\n \t\t\tret = qbman_swp_release(swp, &releasedesc, bufs,\n@@ -288,6 +300,7 @@ int hw_mbuf_alloc_bulk(struct rte_mempool *pool,\n \t\t\t * i.e. first buffer is valid,\n \t\t\t * remaining 6 buffers may be null\n \t\t\t */\n+\t\t\tDPAA2_MODIFY_IOVA_TO_VADDR(bufs[i], uint64_t);\n \t\t\tobj_table[n] = (struct rte_mbuf *)(bufs[i] - mbuf_size);\n \t\t\trte_mbuf_refcnt_set((struct rte_mbuf *)obj_table[n], 0);\n \t\t\tPMD_TX_LOG(DEBUG, \"Acquired %p address %p from BMAN\",\n", "prefixes": [ "dpdk-dev", "PATCHv5", "31/33" ] }