Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/18176/?format=api
{ "id": 18176, "url": "http://patches.dpdk.org/api/patches/18176/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1482180853-18823-17-git-send-email-hemant.agrawal@nxp.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1482180853-18823-17-git-send-email-hemant.agrawal@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1482180853-18823-17-git-send-email-hemant.agrawal@nxp.com", "date": "2016-12-19T20:53:55", "name": "[dpdk-dev,PATCHv2,16/34] drivers/pool/dpaa2: adding hw offloaded mempool", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "99c4b71a8fe7e49ef7913157edb58fc7da14cba3", "submitter": { "id": 477, "url": "http://patches.dpdk.org/api/people/477/?format=api", "name": "Hemant Agrawal", "email": "hemant.agrawal@nxp.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1482180853-18823-17-git-send-email-hemant.agrawal@nxp.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/18176/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/18176/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id EAC67FAC1;\n\tMon, 19 Dec 2016 16:21:53 +0100 (CET)", "from NAM02-CY1-obe.outbound.protection.outlook.com\n\t(mail-cys01nam02on0076.outbound.protection.outlook.com\n\t[104.47.37.76]) by dpdk.org (Postfix) with ESMTP id 435A8FA58\n\tfor <dev@dpdk.org>; Mon, 19 Dec 2016 16:21:29 +0100 (CET)", "from CY4PR03CA0019.namprd03.prod.outlook.com (10.168.162.29) by\n\tDM5PR03MB2473.namprd03.prod.outlook.com (10.168.233.19) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id\n\t15.1.789.14; Mon, 19 Dec 2016 15:21:28 +0000", "from BN1AFFO11FD007.protection.gbl (2a01:111:f400:7c10::124) by\n\tCY4PR03CA0019.outlook.office365.com (2603:10b6:903:33::29) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.789.14 via\n\tFrontend Transport; Mon, 19 Dec 2016 15:21:28 +0000", "from az84smr01.freescale.net (192.88.158.2) by\n\tBN1AFFO11FD007.mail.protection.outlook.com (10.58.52.67) with\n\tMicrosoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.789.10\n\tvia Frontend Transport; Mon, 19 Dec 2016 15:21:27 +0000", "from bf-netperf1.idc ([10.232.134.28])\n\tby az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tuBJFKMhf029110; Mon, 19 Dec 2016 08:21:24 -0700" ], "Authentication-Results": "spf=fail (sender IP is 192.88.158.2)\n\tsmtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed)\n\theader.d=none; nxp.com; dmarc=fail action=none header.from=nxp.com;\n\tnxp.com; \n\tdkim=none (message not signed) header.d=none;", "Received-SPF": "Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.158.2 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.158.2; helo=az84smr01.freescale.net;", "From": "Hemant Agrawal <hemant.agrawal@nxp.com>", "To": "<dev@dpdk.org>", "CC": "<thomas.monjalon@6wind.com>, <bruce.richardson@intel.com>,\n\t<shreyansh.jain@nxp.com>, <john.mcnamara@intel.com>,\n\t<ferruh.yigit@intel.com>, <jerin.jacob@caviumnetworks.com>,\n\tHemant Agrawal <hemant.agrawal@nxp.com>", "Date": "Tue, 20 Dec 2016 02:23:55 +0530", "Message-ID": "<1482180853-18823-17-git-send-email-hemant.agrawal@nxp.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1482180853-18823-1-git-send-email-hemant.agrawal@nxp.com>", "References": "<1480875447-23680-1-git-send-email-hemant.agrawal@nxp.com>\n\t<1482180853-18823-1-git-send-email-hemant.agrawal@nxp.com>", "X-EOPAttributedMessage": "0", "X-Matching-Connectors": "131266344877649359;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); ()", "X-Forefront-Antispam-Report": "CIP:192.88.158.2; IPV:NLI; CTRY:US; EFV:NLI;\n\tSFV:NSPM;\n\tSFS:(10009020)(6009001)(336005)(7916002)(39860400002)(39400400002)(39410400002)(39850400002)(39380400002)(39450400003)(39840400002)(2980300002)(1110001)(1109001)(339900001)(189002)(199003)(626004)(92566002)(5003940100001)(105606002)(104016004)(6916009)(305945005)(77096006)(189998001)(48376002)(76176999)(5660300001)(85426001)(33646002)(106466001)(36756003)(50986999)(50466002)(86362001)(97736004)(2906002)(110136003)(6666003)(2950100002)(8936002)(2351001)(50226002)(38730400001)(8676002)(69596002)(356003)(68736007)(4326007)(81156014)(47776003)(81166006)(8666005)(7059030);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:DM5PR03MB2473;\n\tH:az84smr01.freescale.net; FPR:; \n\tSPF:Fail; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; ", "X-Microsoft-Exchange-Diagnostics": [ "1; BN1AFFO11FD007;\n\t1:JDwoTYwqkgqGsKWsJ8nfipS2YDZlOyqPqVMOk5MYjmPxDWpt6M36L9ZhEKiAoFXhF8Et7afv8jQZvuS+SV3NJhPeSN2NMVz37RbJjpDJCK5liDf7x0WwPFZCxkpvwFLiVG0bL61c4jmELT89UL18QMjgLu1s+JZvKm91dKDzCk0kH+bTrA3n3iCrVvvYXL0vTwHwkKs1uPaYYjJEx3IEXZuW2Oygxgp3/h1AztbajNE2+sseaXM3BuFsRXtTNumcZKiXI1RQJ5OUqDZVfvSjfAqqhySP//aS7e68+K4HOdKvYBjb1ysmtnUdC7uSPoW+rDC5G7swI+Q7sxgu1eh/MQGC1AXmT+VEhtHNrtizZfD1bSjGtXqy+mkjLWiOOcScCkprvFI7CWf+TdafvdwfETS0/IF3YYUawfta1uCBA86Rdp2kJQqmDrCdPrREXxMBpN3rOMbbIToft7mA5aXwkuU5B8RsZ2O6g0bv2N8NCiMMqBr8HkOxWtQK0lM2rnKoj3uFF4fCmXKzB8vSpSPkfrH5iM/u+pPxIsXOHwgLMMq/DGQSnY7zeAPMu2QpBUIy3DTYh8kPdVxdClgQUMir3niU90rTKTjzFVk8ixY2cPx48z5V8Nz2FwPbg9jvslwJAQmTzRdqPGmgaRJvqNW0WXxJmv8s/z18Yr9r2iAsVraSlJeCHLhDHvx4CCDfCL+OJ2p123RY5uyBUDvcgW3jvxWXa2GZ6A0/35xRtxDTdFu3Aupb/PZ7uVf/i1F68ourDhUfhFI9Fyu99fIxPm6oAA==", "1; DM5PR03MB2473;\n\t3:6oufexm/woVyMfAhjoISxdR++OjeOsnFaAn5Ec8HDGBWgt58oPAmMQdPglMT6zyl3P5ScbCF61fdmBFDw+XppkTihFEzzjjmRtelv8U2ii9ZFLfzRvblb17wCEMLTfBVkIQqY1xqMOdRkWajkyXRZ8dIQrGGNSLST4d7tO3QXmvpBrINjWUG6t0bdwJIsqUl9z3QAsQOcHTt3XugRBV11om5GT4fE3QR0PGo9MMNDqWLY/KBl2CInv37tztryLURdQK8dQM+OU7DU3q6l6s6cWoiWwFGiuxM2tYyXwxmz4SFgmRJqGSDxhFL2wKaeN06QMTtBl7xb8mZqFC8jMnVlGYcAR1iTDuBF4nxlXq0uJajrqLFQ61sHDBPloVS8eff;\n\t25:EbrfmyxK8s9WKMVL3rWShAeNYHZKwrC83OyFMTJB3ieWkmzsCPG+Dvqj5j8lZuUqXbrDjjmfdy/gPIIdkQmpQS1o66t7wI+mjKHbs1fTPSA5LKe/MHuvSB3uhGEyeWbhhVDjfy1jzyW4bXe7BHQyuHJxfsTAvKTQEKx4P+8nv3f1v0PjTILnYb+VA6EnMMJvr8b1exFDGfpM/A2pI+RMCM40OU+UFS3fOSLixFXckArHhMnFHe7ujGCLO4CSc5G89i/L7c8/Ae/1uckqvPLlebPBT335EXEFEiZCE7mSav5xWJeVO/uVu029rOgF+VWR9WemPdYO8642JOI1Z3Bbfq1eB6jI03lXVwyNNM4DnnPC3UqdvZZ7E4m+z5NRAP7FvzJCWQkVDbNcQZliFdMk9Qka1a8wX6cffaCNqRVOPs/nLrxpakNSp8exssiNAmYiC8aLGJ7Z8WzUX8hH1LNmSw==", "1; DM5PR03MB2473;\n\t31:DzBakNmqGuCKmgPgHQwPM2lvyVS9nJD0mOOX3BdlWvPp+18w/vBQwF/7jfhwQckPW3LIDLg+dVeTldDe92ThubbwRWyZwCftbHsE0IEcVjDwqrmTi1rjRSUZSB6zVEiBavWDiXQMqscP/Jce65A2fYykiB3dvOlqD/bL8pY5FQgyMZfIci9e6Tr0L80SsFyukLY65+ab730P2vmaN1jY0MbgWzjYtIGQbaEfaZRC9N0Qepd+Dy8ffzHxZtcRDN0fAYmCpQbvXBzseojQJpDy1KWImF1AlKBNcqEFX+mdcqY=", "1; DM5PR03MB2473;\n\t4:KkCmMJXSIawrKNwgqs9lVCWBDsyuPSUDJazknc4R02bik2x8YxVZgNTIQdVHlvF1PzyBWJPi4HXb6MsZWJqMjEV7B78wtq0+axbuFVebil9OdUf+fwO2TJaMC45IL+22XZTZnAW+JmKlrP18xhbKX05Mu4ZTEMMP1bjP6A2v8aFgDooukwaBu6DKK2mxtLF1+/WOTK2M5bU5CfUSB3vQHwGuzC3U+G5lqjWWMXElrpi6KhIUzfdsqlR6mIPektY+Wr6RsJ4LQHsm+1u34zeMrZQ+u9ftkRYxKZeDQ4FodKTEnaz83K32Wv9Asm4s36Jeh/jpw+myWbimIIu7FU5n8SwjCnRSp+nVQdqKncmJBzSXIztOWutI/nFPw4T787Wj0EFtgbNZHYCdF3HRNeQSqClNUZeViy2wEK+lFjvBsDksc7cBfvN2ZszDnuS4wafFPx1aNTMEXyZkYcTIc+1ukUYaozfXDqDdGC4kGMQfx4RcPYjC+hjkmr0oCO93bAOJ5jAbWXAqfbO9C+g5splPn2VxUlmAcKPjgajsuzcMaoTeejYN33ne6M4iw8mwov3HR6hcCSx7gCR7NYNZ/hNd5/ijpSafkQmu165p0lVouqD7BEi/f32LnMkbmmIETdXW1Sr0fwey0tDTzmxKuQS5Ga8sRP6TXblWwV9lwCpmv1P13xOHgRyEgrFsXMTNFSwpOImIqDDa3Uqc008obcCJY+lc0lgkvlriBb3/Zi6xiNZ1wMcVBk2amGoGwrxw0ok1Tq85JIDwoaO1m5Y6nMllBw==", "=?us-ascii?Q?1; DM5PR03MB2473;\n\t23:e5SEKgaSYzqhSUgU4s15+dj0EWtI5UQacQCh8yfxz?=\n\tch1s6F1AbIsdj4D8sbCJv5DcthgQmg+24yuo3yaKKy6ZeCj7oCpfaCBb6lzLs3V8dqJoIdzVqKYYfenKnUoRY8Fxlxfx2rT4e6hMLLDCOf85RbKhhCNtF27dSXT3IIjJFs+yQPEZPSg1KUDmEQpljFD6whTwfL1SkwSauhuc6cNbFY9occqUciB2XwIlIwXUoBkWkO8AoYsGkysDqX6a0RiNarrz+vHNN8JUyWQ0CvGgLrmZKytoSSLnYoSuFV4LNxRfXH8whtGmN3QZ7slYQa3VAC7AF1BKlQPFjR5I8bAWiPpTeLXb/QIwzKYdldO7v/7+Ui+88yV28HQu7xtEM27q2G7vOpl7v18rWT+ByvSxb71LHxepTSAgZmxpqRzV49tOeTg6dCmDiKVnQKMUL4Gm7b0bjWiUXixdWU2lipQHMFmuApHmVUySmGFpdfZBUfCmsAyxmewYf4pAgziE5ThfDimOdTMuZyE56y2R4lVS5opTYwf2WALPVT716hgUHBHAVzQmj9mT7h08/YqPnOTnnR4vS6VX6W0LH4HY8oF4tQQcbjdQha+UwiSnJK/gm6h0OotvWgNI6y6GccZ38+B5raCUpZkC5Vw4C2PQYpjQ9KfqNFns6JMUiQn8kw1xVVDnSuFkBIBUoVdzZppwhn9AWSwzmUWY8ArMqCGT1ao6UlmB5PyBHvOieaSJqPWZZllVSzTVrduPkQGhiC5OEmdl6vHKzfYqx1x2A8FQRBhdMLvCc7KwK9+7UFHlUAbik/q2TIs0fYyUUX49agSplVVUXLgEP5nmwAUuBjtLyBIu+saVqY3SSDaolY61IxhqAgFmEYIeLe7Y+93soyc8aHgdKlfHmVj31tmztstoktArig00kgwYOFr2KQ8RlatcYDaghBCLQ25SK4pvXk/KW8VC119un8RwxmhzAZbENMNiiPKe4QuMHwvwl80lIiQWGnS8Fz2wDqjXktDBD5jCSc8NbIxpn39uPWQXSlP3zSg7KlVoY5d1gKem0D7+Czeud/pukeCv4VHksH/0NWwHF4Az1fTnfcpcMEdZOuUBSd8LeA0M9zc9TuCsQuQgA//inFdsmazOoshGeBkuohLkb6RzRhCPfd/Hc2Fa4D5/5fWLNxQoD0G9cNNPCzgbLvNa0JGZS1V4CzHBXMkktJfyanlfszo4RKL3Axc7FrT5S9Kfndu3E1dQwwxV2GOTDNEZjEQ62zDMumkR8yN2hWv99zSwMVZKWNpi/wLZBrJbLQiZdV2gjHBxxF1nZvDOI4V74w=", "1; DM5PR03MB2473;\n\t6:SpJYvAITU/xrZKes2A4PfZCg0270eKmwS4t1CzQzCdJjbD9uIGIqgOuhvFfzQxKaALZEx3YqIle0I39OjvgNPPjl5dSqf+QErXiTTDafAgOhHkc+5gqAFLxko+gcNsjWhhxn3t9DKylvhtO98GhrGKldV2AoEoQItbl4PbRalDUBlVGDPrh/pE66B6deACNchptK7atws1tqJ0AChRQiBYm/6uyjXHlz/E2bYGYN9aTvkzUZwx/CerZiObI1l31ZWthPlwPK9USLe4/8HUTX20eitKMqATj6GmcKulmFp0dt8QGCiI9fOtPMZkWHERoT3QjLrKS4y114tft6ug/L76CUKFXfdd9MNzivj4XPpNqHlPeCUdYiV6CtoMekLBSjajUTMv+EFR26451S88Qx/CukZncfHE4tCZbgrkVm7VzCv70vlk+lRPvBVU64raPe;\n\t5:WvHw/FrIZBVfWevEqArPq3Ob3e/SnyM1txXOXO154rBu+vbEV6gvoJaMIc8Z/OIU8d6GA6nnyv/EUshYLyIRwZArnI5lvQ1mBivVejn6uPU8GOEZM6ZoUINsDkPHtO05q5pianqGFV2ShmtrxpfGb5tNYb+HvX0x8egjxi5CdsWuB/+rUjpVZqQZ+uOFmleQ;\n\t24:+I/1PJXPSznW9MqyLV+T76qctX/8O9ZHvGgGsRl87tmMk5okkE1c2l56sXzLSCEIRmVXX9Iu0gKJK7oSwVlCcTFPf3zc2y+daCX+3Ybh1qw=", "1; DM5PR03MB2473;\n\t7:qBAUo1943EuC/A2QiYw3n/+ffpgI5d8BnK8FEiraJykyF1hWGm+8YQ4zcDr8ek5GEtPhUAuTTf8/dl+fgsVDI5BLsFnlmDq8gYlLJsHxSYhk8Ypj2+oukVl2UclridQqPwIuiNjULLO/OY6Q8G0euSHNXRBWygxsNgNpMcNk4kRR7KJ+L0Un8ieEUHeDyo75Tt70n32DKi94rH2Hv4bK0KhbDmjJbpxQtImoaxVn+3oG7i1FWPBx2m7WfZlgx6Qbh1ef4tzvHLJclf6siVflN2KEGHEJAgaBhJykcKRJBuj03HzQ+jbFcQMQly0M6urAobTeitxxe42JHwVr9mXaiF/6LwIwPoWOoni7p/gYoV2Kdod7PJNosh9q7iyByQSk6hZhP9Jc7eQCrjmKbFTtFoMHEC4MLSfiqox/xjmZFrPFqDZ82scUguBXMy8HUwFDyK18+UHyqEvGIubN+JDNZw==" ], "MIME-Version": "1.0", "Content-Type": "text/plain", "X-MS-Office365-Filtering-Correlation-Id": "6e88bb76-8aa7-4f5b-0c6d-08d42822b3da", "X-Microsoft-Antispam": "UriScan:; BCL:0; PCL:0; RULEID:(22001);\n\tSRVR:DM5PR03MB2473; ", "X-Microsoft-Antispam-PRVS": "<DM5PR03MB2473D793875B4DE84E7331D989910@DM5PR03MB2473.namprd03.prod.outlook.com>", "X-Exchange-Antispam-Report-Test": "UriScan:(185117386973197)(275809806118684); ", "X-Exchange-Antispam-Report-CFA-Test": "BCL:0; PCL:0;\n\tRULEID:(6095060)(601004)(2401047)(5005006)(8121501046)(13023025)(13024025)(13015025)(13017025)(13018025)(3002001)(10201501046)(6055026)(6096035)(20161123563025)(20161123561025)(20161123556025)(20161123565025)(20161123559025);\n\tSRVR:DM5PR03MB2473; BCL:0; PCL:0; RULEID:(400006); SRVR:DM5PR03MB2473;", "X-Forefront-PRVS": "01613DFDC8", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "19 Dec 2016 15:21:27.5153\n\t(UTC)", "X-MS-Exchange-CrossTenant-Id": "5afe0b00-7697-4969-b663-5eab37d5f47e", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.158.2]; \n\tHelo=[az84smr01.freescale.net]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM5PR03MB2473", "Subject": "[dpdk-dev] [PATCHv2 16/34] drivers/pool/dpaa2: adding hw offloaded\n\tmempool", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Adding NXP DPAA2 architecture specific mempool support\nEach mempool instance is represented by a DPBP object\nfrom the FSL-MC bus.\n\nThis patch also registers a dpaa2 type MEMPOOL OPS\n\nSigned-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>\n---\n config/common_base | 1 +\n config/defconfig_arm64-dpaa2-linuxapp-gcc | 4 +\n drivers/Makefile | 1 +\n drivers/bus/fslmc/Makefile | 1 +\n drivers/bus/fslmc/fslmc_vfio.c | 10 +-\n drivers/common/Makefile | 3 +\n drivers/common/dpaa2/dpio/dpaa2_hw_pvt.h | 7 +\n drivers/pool/Makefile | 38 +++\n drivers/pool/dpaa2/Makefile | 66 ++++\n drivers/pool/dpaa2/dpaa2_hw_mempool.c | 362 ++++++++++++++++++++++\n drivers/pool/dpaa2/dpaa2_hw_mempool.h | 104 +++++++\n drivers/pool/dpaa2/rte_pmd_dpaa2_pool_version.map | 8 +\n mk/rte.app.mk | 1 +\n 13 files changed, 605 insertions(+), 1 deletion(-)\n create mode 100644 drivers/pool/Makefile\n create mode 100644 drivers/pool/dpaa2/Makefile\n create mode 100644 drivers/pool/dpaa2/dpaa2_hw_mempool.c\n create mode 100644 drivers/pool/dpaa2/dpaa2_hw_mempool.h\n create mode 100644 drivers/pool/dpaa2/rte_pmd_dpaa2_pool_version.map", "diff": "diff --git a/config/common_base b/config/common_base\nindex d605e85..493811f 100644\n--- a/config/common_base\n+++ b/config/common_base\n@@ -276,6 +276,7 @@ CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_MBOX=n\n # Compile Support Libraries for NXP DPAA2\n #\n CONFIG_RTE_LIBRTE_DPAA2_COMMON=n\n+CONFIG_RTE_LIBRTE_DPAA2_POOL=n\n \n #\n # Compile NXP DPAA2 FSL-MC Bus\ndiff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc\nindex d3bc9d8..7665912 100644\n--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc\n+++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc\n@@ -42,10 +42,14 @@ CONFIG_RTE_ARCH_ARM_TUNE=\"cortex-a57+fp+simd\"\n CONFIG_RTE_MAX_LCORE=8\n CONFIG_RTE_MAX_NUMA_NODES=1\n \n+CONFIG_RTE_PKTMBUF_HEADROOM=256\n+\n #\n # Compile Support Libraries for DPAA2\n #\n CONFIG_RTE_LIBRTE_DPAA2_COMMON=y\n+CONFIG_RTE_LIBRTE_DPAA2_POOL=n\n+CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS=\"dpaa2\"\n \n #\n # Compile NXP DPAA2 FSL-MC Bus\ndiff --git a/drivers/Makefile b/drivers/Makefile\nindex bdae63b..609523d 100644\n--- a/drivers/Makefile\n+++ b/drivers/Makefile\n@@ -34,6 +34,7 @@ include $(RTE_SDK)/mk/rte.vars.mk\n DIRS-y += common\n DIRS-y += bus\n DIRS-y += net\n+DIRS-y += pool\n DIRS-$(CONFIG_RTE_LIBRTE_CRYPTODEV) += crypto\n \n include $(RTE_SDK)/mk/rte.subdir.mk\ndiff --git a/drivers/bus/fslmc/Makefile b/drivers/bus/fslmc/Makefile\nindex cc6d7c2..a830701 100644\n--- a/drivers/bus/fslmc/Makefile\n+++ b/drivers/bus/fslmc/Makefile\n@@ -48,6 +48,7 @@ CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc\n CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc/mc\n CFLAGS += -I$(RTE_SDK)/drivers/common/dpaa2/qbman/include\n CFLAGS += -I$(RTE_SDK)/drivers/common/dpaa2/dpio\n+CFLAGS += -I$(RTE_SDK)/drivers/pool/dpaa2\n CFLAGS += -I$(RTE_SDK)/lib/librte_eal/linuxapp/eal\n \n # versioning export map\ndiff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c\nindex 1c80bf9..8d6a3eb 100644\n--- a/drivers/bus/fslmc/fslmc_vfio.c\n+++ b/drivers/bus/fslmc/fslmc_vfio.c\n@@ -63,6 +63,7 @@\n \n #include \"dpaa2_hw_pvt.h\"\n #include \"dpaa2_hw_dpio.h\"\n+#include \"dpaa2_hw_mempool.h\"\n \n #define VFIO_MAX_CONTAINERS\t1\n \n@@ -270,7 +271,7 @@ int fslmc_vfio_process_group(struct rte_bus *bus)\n \tchar path[PATH_MAX];\n \tint64_t v_addr;\n \tint ndev_count;\n-\tint dpio_count = 0;\n+\tint dpio_count = 0, dpbp_count = 0;\n \tstruct fslmc_vfio_group *group = &vfio_groups[0];\n \tstatic int process_once;\n \n@@ -420,6 +421,11 @@ int fslmc_vfio_process_group(struct rte_bus *bus)\n \t\t\tif (!ret)\n \t\t\t\tdpio_count++;\n \t\t}\n+\t\tif (!strcmp(object_type, \"dpbp\")) {\n+\t\t\tret = dpaa2_create_dpbp_device(object_id);\n+\t\t\tif (!ret)\n+\t\t\t\tdpbp_count++;\n+\t\t}\n \t}\n \tclosedir(d);\n \n@@ -427,6 +433,8 @@ int fslmc_vfio_process_group(struct rte_bus *bus)\n \tif (ret)\n \t\tFSLMC_VFIO_LOG(DEBUG, \"Error in affining qbman swp %d\", ret);\n \n+\tFSLMC_VFIO_LOG(DEBUG, \"DPAA2: Added dpbp_count = %d dpio_count=%d\\n\",\n+\t\t dpbp_count, dpio_count);\n \treturn 0;\n \n FAILURE:\ndiff --git a/drivers/common/Makefile b/drivers/common/Makefile\nindex 434280f..0a6d8db 100644\n--- a/drivers/common/Makefile\n+++ b/drivers/common/Makefile\n@@ -34,6 +34,9 @@ include $(RTE_SDK)/mk/rte.vars.mk\n CONFIG_RTE_LIBRTE_DPAA2_COMMON = $(CONFIG_RTE_LIBRTE_DPAA2_PMD)\n \n ifneq ($(CONFIG_RTE_LIBRTE_DPAA2_COMMON),y)\n+CONFIG_RTE_LIBRTE_DPAA2_COMMON = $(CONFIG_RTE_LIBRTE_DPAA2_POOL)\n+endif\n+ifneq ($(CONFIG_RTE_LIBRTE_DPAA2_COMMON),y)\n CONFIG_RTE_LIBRTE_DPAA2_COMMON = $(CONFIG_RTE_LIBRTE_FSLMC_BUS)\n endif\n \ndiff --git a/drivers/common/dpaa2/dpio/dpaa2_hw_pvt.h b/drivers/common/dpaa2/dpio/dpaa2_hw_pvt.h\nindex ef3eb71..dda6243 100644\n--- a/drivers/common/dpaa2/dpio/dpaa2_hw_pvt.h\n+++ b/drivers/common/dpaa2/dpio/dpaa2_hw_pvt.h\n@@ -41,6 +41,13 @@\n #define MC_PORTAL_INDEX\t\t0\n #define NUM_DPIO_REGIONS\t2\n \n+#define MEMPOOL_F_HW_PKT_POOL 0x8000 /**< mpool flag to check offloaded pool */\n+\n+/* Maximum release/acquire from QBMAN */\n+#define DPAA2_MBUF_MAX_ACQ_REL\t7\n+\n+#define MAX_BPID 256\n+\n struct dpaa2_dpio_dev {\n \tTAILQ_ENTRY(dpaa2_dpio_dev) next;\n \t\t/**< Pointer to Next device instance */\ndiff --git a/drivers/pool/Makefile b/drivers/pool/Makefile\nnew file mode 100644\nindex 0000000..4325edd\n--- /dev/null\n+++ b/drivers/pool/Makefile\n@@ -0,0 +1,38 @@\n+# BSD LICENSE\n+#\n+# Copyright(c) 2016 NXP. All rights reserved.\n+# All rights reserved.\n+#\n+# Redistribution and use in source and binary forms, with or without\n+# modification, are permitted provided that the following conditions\n+# are met:\n+#\n+# * Redistributions of source code must retain the above copyright\n+# notice, this list of conditions and the following disclaimer.\n+# * Redistributions in binary form must reproduce the above copyright\n+# notice, this list of conditions and the following disclaimer in\n+# the documentation and/or other materials provided with the\n+# distribution.\n+# * Neither the name of NXP nor the names of its\n+# contributors may be used to endorse or promote products derived\n+# from this software without specific prior written permission.\n+#\n+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+# \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+\n+include $(RTE_SDK)/mk/rte.vars.mk\n+\n+CONFIG_RTE_LIBRTE_DPAA2_POOL = $(CONFIG_RTE_LIBRTE_DPAA2_PMD)\n+\n+DIRS-$(CONFIG_RTE_LIBRTE_DPAA2_COMMON) += dpaa2\n+\n+include $(RTE_SDK)/mk/rte.subdir.mk\ndiff --git a/drivers/pool/dpaa2/Makefile b/drivers/pool/dpaa2/Makefile\nnew file mode 100644\nindex 0000000..c33e631\n--- /dev/null\n+++ b/drivers/pool/dpaa2/Makefile\n@@ -0,0 +1,66 @@\n+# BSD LICENSE\n+#\n+# Copyright(c) 2016 NXP. All rights reserved.\n+# All rights reserved.\n+#\n+# Redistribution and use in source and binary forms, with or without\n+# modification, are permitted provided that the following conditions\n+# are met:\n+#\n+# * Redistributions of source code must retain the above copyright\n+# notice, this list of conditions and the following disclaimer.\n+# * Redistributions in binary form must reproduce the above copyright\n+# notice, this list of conditions and the following disclaimer in\n+# the documentation and/or other materials provided with the\n+# distribution.\n+# * Neither the name of NXP nor the names of its\n+# contributors may be used to endorse or promote products derived\n+# from this software without specific prior written permission.\n+#\n+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+# \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+\n+include $(RTE_SDK)/mk/rte.vars.mk\n+\n+#\n+# library name\n+#\n+LIB = librte_pmd_dpaa2_pool.a\n+\n+ifeq ($(CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT),y)\n+CFLAGS += -O0 -g\n+CFLAGS += \"-Wno-error\"\n+else\n+CFLAGS += -O3\n+CFLAGS += $(WERROR_FLAGS)\n+endif\n+\n+CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc\n+CFLAGS += -I$(RTE_SDK)/drivers/common/dpaa2/dpio\n+CFLAGS += -I$(RTE_SDK)/drivers/common/dpaa2/qbman/include\n+CFLAGS += -I$(RTE_SDK)/lib/librte_eal/linuxapp/eal\n+\n+# versioning export map\n+EXPORT_MAP := rte_pmd_dpaa2_pool_version.map\n+\n+# Lbrary version\n+LIBABIVER := 1\n+\n+# all source are stored in SRCS-y\n+#\n+SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_COMMON) += dpaa2_hw_mempool.c\n+\n+# library dependencies\n+DEPDIRS-y += lib/librte_eal\n+DEPDIRS-y += lib/librte_mempool\n+\n+include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/pool/dpaa2/dpaa2_hw_mempool.c b/drivers/pool/dpaa2/dpaa2_hw_mempool.c\nnew file mode 100644\nindex 0000000..f609af7\n--- /dev/null\n+++ b/drivers/pool/dpaa2/dpaa2_hw_mempool.c\n@@ -0,0 +1,362 @@\n+/*-\n+ * BSD LICENSE\n+ *\n+ * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.\n+ * Copyright (c) 2016 NXP. All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ * * Neither the name of Freescale Semiconductor, Inc nor the names of its\n+ * contributors may be used to endorse or promote products derived\n+ * from this software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#include <unistd.h>\n+#include <stdio.h>\n+#include <sys/types.h>\n+#include <string.h>\n+#include <stdlib.h>\n+#include <fcntl.h>\n+#include <errno.h>\n+\n+#include <rte_mbuf.h>\n+#include <rte_ethdev.h>\n+#include <rte_malloc.h>\n+#include <rte_memcpy.h>\n+#include <rte_string_fns.h>\n+#include <rte_cycles.h>\n+#include <rte_kvargs.h>\n+#include <rte_dev.h>\n+#include <rte_ethdev.h>\n+\n+#include <fslmc_logs.h>\n+#include <fslmc_vfio.h>\n+#include <mc/fsl_dpbp.h>\n+#include <dpaa2_hw_pvt.h>\n+#include <dpaa2_hw_dpio.h>\n+#include \"dpaa2_hw_mempool.h\"\n+\n+static struct dpbp_node *g_dpbp_list;\n+static struct dpbp_node *avail_dpbp;\n+\n+struct dpaa2_bp_info bpid_info[MAX_BPID];\n+\n+struct dpaa2_bp_list *h_bp_list;\n+\n+int\n+dpaa2_create_dpbp_device(\n+\t\tint dpbp_id)\n+{\n+\tstruct dpbp_node *dpbp_node;\n+\tint ret;\n+\n+\t/* Allocate DPAA2 dpbp handle */\n+\tdpbp_node = (struct dpbp_node *)malloc(sizeof(struct dpbp_node));\n+\tif (!dpbp_node) {\n+\t\tPMD_INIT_LOG(ERR, \"Memory allocation failed for DPBP Device\");\n+\t\treturn -1;\n+\t}\n+\n+\t/* Open the dpbp object */\n+\tdpbp_node->dpbp.regs = mcp_ptr_list[MC_PORTAL_INDEX];\n+\tret = dpbp_open(&dpbp_node->dpbp,\n+\t\t\tCMD_PRI_LOW, dpbp_id, &dpbp_node->token);\n+\tif (ret) {\n+\t\tPMD_INIT_LOG(ERR, \"Resource alloc failure with err code: %d\",\n+\t\t\t ret);\n+\t\tfree(dpbp_node);\n+\t\treturn -1;\n+\t}\n+\n+\t/* Clean the device first */\n+\tret = dpbp_reset(&dpbp_node->dpbp, CMD_PRI_LOW, dpbp_node->token);\n+\tif (ret) {\n+\t\tPMD_INIT_LOG(ERR, \"Failure cleaning dpbp device with\"\n+\t\t\t\t\t\" error code %d\\n\", ret);\n+\t\treturn -1;\n+\t}\n+\n+\tdpbp_node->dpbp_id = dpbp_id;\n+\t/* Add the dpbp handle into the global list */\n+\tdpbp_node->next = g_dpbp_list;\n+\tg_dpbp_list = dpbp_node;\n+\tavail_dpbp = g_dpbp_list;\n+\n+\tPMD_INIT_LOG(DEBUG, \"Buffer pool resource initialized %d\", dpbp_id);\n+\n+\treturn 0;\n+}\n+\n+static int\n+hw_mbuf_create_pool(struct rte_mempool *mp)\n+{\n+\tstruct dpaa2_bp_list *bp_list;\n+\tstruct dpbp_attr dpbp_attr;\n+\tuint32_t bpid;\n+\tint ret;\n+\n+\tif (!avail_dpbp) {\n+\t\tPMD_DRV_LOG(ERR, \"DPAA2 resources not available\");\n+\t\treturn -1;\n+\t}\n+\n+\tret = dpbp_enable(&avail_dpbp->dpbp, CMD_PRI_LOW, avail_dpbp->token);\n+\tif (ret != 0) {\n+\t\tPMD_INIT_LOG(ERR, \"Resource enable failure with\"\n+\t\t\t\" err code: %d\\n\", ret);\n+\t\treturn -1;\n+\t}\n+\n+\tret = dpbp_get_attributes(&avail_dpbp->dpbp, CMD_PRI_LOW,\n+\t\t\t\t avail_dpbp->token, &dpbp_attr);\n+\tif (ret != 0) {\n+\t\tPMD_INIT_LOG(ERR, \"Resource read failure with\"\n+\t\t\t \" err code: %d\\n\", ret);\n+\t\tret = dpbp_disable(&avail_dpbp->dpbp, CMD_PRI_LOW,\n+\t\t\t\t avail_dpbp->token);\n+\t\treturn -1;\n+\t}\n+\n+\t/* Allocate the bp_list which will be added into global_bp_list */\n+\tbp_list = (struct dpaa2_bp_list *)malloc(sizeof(struct dpaa2_bp_list));\n+\tif (!bp_list) {\n+\t\tPMD_INIT_LOG(ERR, \"No heap memory available\");\n+\t\treturn -1;\n+\t}\n+\n+\t/* Set parameters of buffer pool list */\n+\tbp_list->buf_pool.num_bufs = mp->size;\n+\tbp_list->buf_pool.size = mp->elt_size\n+\t\t\t- sizeof(struct rte_mbuf) - rte_pktmbuf_priv_size(mp);\n+\tbp_list->buf_pool.bpid = dpbp_attr.bpid;\n+\tbp_list->buf_pool.h_bpool_mem = NULL;\n+\tbp_list->buf_pool.mp = mp;\n+\tbp_list->buf_pool.dpbp_node = avail_dpbp;\n+\tbp_list->next = h_bp_list;\n+\n+\tbpid = dpbp_attr.bpid;\n+\n+\t/* Increment the available DPBP */\n+\tavail_dpbp = avail_dpbp->next;\n+\n+\tbpid_info[bpid].meta_data_size = sizeof(struct rte_mbuf)\n+\t\t\t\t+ rte_pktmbuf_priv_size(mp);\n+\tbpid_info[bpid].bp_list = bp_list;\n+\tbpid_info[bpid].bpid = bpid;\n+\n+\tmp->pool_data = (void *)&bpid_info[bpid];\n+\n+\tPMD_INIT_LOG(DEBUG, \"BP List created for bpid =%d\", dpbp_attr.bpid);\n+\n+\th_bp_list = bp_list;\n+\t/* Identification for our offloaded pool_data structure\n+\t */\n+\tmp->flags |= MEMPOOL_F_HW_PKT_POOL;\n+\treturn 0;\n+}\n+\n+static void\n+hw_mbuf_free_pool(struct rte_mempool *mp __rte_unused)\n+{\n+\t/* TODO:\n+\t * 1. Release bp_list memory allocation\n+\t * 2. opposite of dpbp_enable()\n+\t * <More>\n+\t */\n+\tstruct dpaa2_bp_list *bp;\n+\n+\t/* Iterate over h_bp_list linked list and release each element */\n+\twhile (h_bp_list) {\n+\t\tbp = h_bp_list;\n+\t\th_bp_list = bp->next;\n+\n+\t\t/* TODO: Should be changed to rte_free */\n+\t\tfree(bp);\n+\t}\n+}\n+\n+static\n+void dpaa2_mbuf_release(struct rte_mempool *pool __rte_unused,\n+\t\t\tvoid * const *obj_table,\n+\t\t\tuint32_t bpid,\n+\t\t\tuint32_t meta_data_size,\n+\t\t\tint count)\n+{\n+\tstruct qbman_release_desc releasedesc;\n+\tstruct qbman_swp *swp;\n+\tint ret;\n+\tint i, n;\n+\tuint64_t bufs[DPAA2_MBUF_MAX_ACQ_REL];\n+\n+\tif (unlikely(!DPAA2_PER_LCORE_DPIO)) {\n+\t\tret = dpaa2_affine_qbman_swp();\n+\t\tif (ret != 0) {\n+\t\t\tRTE_LOG(ERR, PMD, \"Failed to allocate IO portal\");\n+\t\t\treturn;\n+\t\t}\n+\t}\n+\tswp = DPAA2_PER_LCORE_PORTAL;\n+\n+\t/* Create a release descriptor required for releasing\n+\t * buffers into QBMAN\n+\t */\n+\tqbman_release_desc_clear(&releasedesc);\n+\tqbman_release_desc_set_bpid(&releasedesc, bpid);\n+\n+\tn = count % DPAA2_MBUF_MAX_ACQ_REL;\n+\n+\t/* convert mbuf to buffers for the remainder*/\n+\tfor (i = 0; i < n ; i++)\n+\t\tbufs[i] = (uint64_t)obj_table[i] + meta_data_size;\n+\n+\t/* feed them to bman*/\n+\tdo {\n+\t\tret = qbman_swp_release(swp, &releasedesc, bufs, n);\n+\t} while (ret == -EBUSY);\n+\n+\t/* if there are more buffers to free */\n+\twhile (n < count) {\n+\t\t/* convert mbuf to buffers */\n+\t\tfor (i = 0; i < DPAA2_MBUF_MAX_ACQ_REL; i++)\n+\t\t\tbufs[i] = (uint64_t)obj_table[n + i] + meta_data_size;\n+\n+\t\tdo {\n+\t\t\tret = qbman_swp_release(swp, &releasedesc, bufs,\n+\t\t\t\t\t\tDPAA2_MBUF_MAX_ACQ_REL);\n+\t\t\t} while (ret == -EBUSY);\n+\t\tn += DPAA2_MBUF_MAX_ACQ_REL;\n+\t}\n+}\n+\n+int hw_mbuf_alloc_bulk(struct rte_mempool *pool,\n+\t\t void **obj_table, unsigned int count)\n+{\n+#ifdef RTE_LIBRTE_DPAA2_DEBUG_DRIVER\n+\tstatic int alloc;\n+#endif\n+\tstruct qbman_swp *swp;\n+\tuint32_t mbuf_size;\n+\tuint16_t bpid;\n+\tuint64_t bufs[DPAA2_MBUF_MAX_ACQ_REL];\n+\tint i, ret;\n+\tunsigned int n = 0;\n+\tstruct dpaa2_bp_info *bp_info;\n+\n+\tbp_info = mempool_to_bpinfo(pool);\n+\n+\tif (!(bp_info->bp_list)) {\n+\t\tRTE_LOG(ERR, PMD, \"DPAA2 buffer pool not configured\\n\");\n+\t\treturn -2;\n+\t}\n+\n+\tbpid = bp_info->bpid;\n+\n+\tif (unlikely(!DPAA2_PER_LCORE_DPIO)) {\n+\t\tret = dpaa2_affine_qbman_swp();\n+\t\tif (ret != 0) {\n+\t\t\tRTE_LOG(ERR, PMD, \"Failed to allocate IO portal\");\n+\t\t\treturn -1;\n+\t\t}\n+\t}\n+\tswp = DPAA2_PER_LCORE_PORTAL;\n+\n+\tmbuf_size = sizeof(struct rte_mbuf) + rte_pktmbuf_priv_size(pool);\n+\n+\twhile (n < count) {\n+\t\t/* Acquire is all-or-nothing, so we drain in 7s,\n+\t\t * then the remainder.\n+\t\t */\n+\t\tif ((count - n) > DPAA2_MBUF_MAX_ACQ_REL) {\n+\t\t\tret = qbman_swp_acquire(swp, bpid, bufs,\n+\t\t\t\t\t\tDPAA2_MBUF_MAX_ACQ_REL);\n+\t\t} else {\n+\t\t\tret = qbman_swp_acquire(swp, bpid, bufs,\n+\t\t\t\t\t\tcount - n);\n+\t\t}\n+\t\t/* In case of less than requested number of buffers available\n+\t\t * in pool, qbman_swp_acquire returns 0\n+\t\t */\n+\t\tif (ret <= 0) {\n+\t\t\tPMD_TX_LOG(ERR, \"Buffer acquire failed with\"\n+\t\t\t\t \" err code: %d\", ret);\n+\t\t\t/* The API expect the exact number of requested bufs */\n+\t\t\t/* Releasing all buffers allocated */\n+\t\t\tdpaa2_mbuf_release(pool, obj_table, bpid,\n+\t\t\t\t\t bp_info->meta_data_size, n);\n+\t\t\treturn -1;\n+\t\t}\n+\t\t/* assigning mbuf from the acquired objects */\n+\t\tfor (i = 0; (i < ret) && bufs[i]; i++) {\n+\t\t\t/* TODO-errata - observed that bufs may be null\n+\t\t\t * i.e. first buffer is valid,\n+\t\t\t * remaining 6 buffers may be null\n+\t\t\t */\n+\t\t\tobj_table[n] = (struct rte_mbuf *)(bufs[i] - mbuf_size);\n+\t\t\trte_mbuf_refcnt_set((struct rte_mbuf *)obj_table[n], 0);\n+\t\t\tPMD_TX_LOG(DEBUG, \"Acquired %p address %p from BMAN\",\n+\t\t\t\t (void *)bufs[i], (void *)obj_table[n]);\n+\t\t\tn++;\n+\t\t}\n+\t}\n+\n+#ifdef RTE_LIBRTE_DPAA2_DEBUG_DRIVER\n+\talloc += n;\n+\tPMD_TX_LOG(DEBUG, \"Total = %d , req = %d done = %d\",\n+\t\t alloc, count, n);\n+#endif\n+\treturn 0;\n+}\n+\n+static int\n+hw_mbuf_free_bulk(struct rte_mempool *pool,\n+\t\t void * const *obj_table, unsigned int n)\n+{\n+\tstruct dpaa2_bp_info *bp_info;\n+\n+\tbp_info = mempool_to_bpinfo(pool);\n+\tif (!(bp_info->bp_list)) {\n+\t\tRTE_LOG(ERR, PMD, \"DPAA2 buffer pool not configured\");\n+\t\treturn -1;\n+\t}\n+\tdpaa2_mbuf_release(pool, obj_table, bp_info->bpid,\n+\t\t\t bp_info->meta_data_size, n);\n+\n+\treturn 0;\n+}\n+\n+static unsigned\n+hw_mbuf_get_count(const struct rte_mempool *mp __rte_unused)\n+{\n+\treturn 0;\n+}\n+\n+struct rte_mempool_ops dpaa2_mpool_ops = {\n+\t.name = \"dpaa2\",\n+\t.alloc = hw_mbuf_create_pool,\n+\t.free = hw_mbuf_free_pool,\n+\t.enqueue = hw_mbuf_free_bulk,\n+\t.dequeue = hw_mbuf_alloc_bulk,\n+\t.get_count = hw_mbuf_get_count,\n+};\n+\n+MEMPOOL_REGISTER_OPS(dpaa2_mpool_ops);\ndiff --git a/drivers/pool/dpaa2/dpaa2_hw_mempool.h b/drivers/pool/dpaa2/dpaa2_hw_mempool.h\nnew file mode 100644\nindex 0000000..4d6d645\n--- /dev/null\n+++ b/drivers/pool/dpaa2/dpaa2_hw_mempool.h\n@@ -0,0 +1,104 @@\n+/*-\n+ * BSD LICENSE\n+ *\n+ * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.\n+ * Copyright (c) 2016 NXP. All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ * * Neither the name of Freescale Semiconductor, Inc nor the names of its\n+ * contributors may be used to endorse or promote products derived\n+ * from this software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#ifndef _DPAA2_HW_DPBP_H_\n+#define _DPAA2_HW_DPBP_H_\n+\n+#define DPAA2_MAX_BUF_POOLS\t8\n+\n+struct dpbp_node {\n+\tstruct dpbp_node *next;\n+\tstruct fsl_mc_io dpbp;\n+\tuint16_t token;\n+\tint dpbp_id;\n+};\n+\n+struct buf_pool_cfg {\n+\tvoid *addr; /*!< The address from where DPAA2 will carve out the\n+\t\t * buffers. 'addr' should be 'NULL' if user wants\n+\t\t * to create buffers from the memory which user\n+\t\t * asked DPAA2 to reserve during 'nadk init'\n+\t\t */\n+\tphys_addr_t phys_addr; /*!< corresponding physical address\n+\t\t\t\t * of the memory provided in addr\n+\t\t\t\t */\n+\tuint32_t num; /*!< number of buffers */\n+\tuint32_t size; /*!< size of each buffer. 'size' should include\n+\t\t\t* any headroom to be reserved and alignment\n+\t\t\t*/\n+\tuint16_t align; /*!< Buffer alignment (in bytes) */\n+\tuint16_t bpid; /*!< The buffer pool id. This will be filled\n+\t\t\t*in by DPAA2 for each buffer pool\n+\t\t\t*/\n+};\n+\n+struct buf_pool {\n+\tuint32_t size;\n+\tuint32_t num_bufs;\n+\tuint16_t bpid;\n+\tuint8_t *h_bpool_mem;\n+\tstruct rte_mempool *mp;\n+\tstruct dpbp_node *dpbp_node;\n+};\n+\n+/*!\n+ * Buffer pool list configuration structure. User need to give DPAA2 the\n+ * valid number of 'num_buf_pools'.\n+ */\n+struct dpaa2_bp_list_cfg {\n+\tstruct buf_pool_cfg buf_pool; /* Configuration of each buffer pool*/\n+};\n+\n+struct dpaa2_bp_list {\n+\tstruct dpaa2_bp_list *next;\n+\tstruct rte_mempool *mp;\n+\tstruct buf_pool buf_pool;\n+};\n+\n+struct dpaa2_bp_info {\n+\tuint32_t meta_data_size;\n+\tuint32_t bpid;\n+\tstruct dpaa2_bp_list *bp_list;\n+};\n+\n+#define mempool_to_bpinfo(mp) ((struct dpaa2_bp_info *)(mp)->pool_data)\n+#define mempool_to_bpid(mp) ((mempool_to_bpinfo(mp))->bpid)\n+\n+extern struct dpaa2_bp_info bpid_info[MAX_BPID];\n+\n+int dpaa2_create_dpbp_device(int dpbp_id);\n+\n+int hw_mbuf_alloc_bulk(struct rte_mempool *pool,\n+\t\t void **obj_table, unsigned int count);\n+\n+#endif /* _DPAA2_HW_DPBP_H_ */\ndiff --git a/drivers/pool/dpaa2/rte_pmd_dpaa2_pool_version.map b/drivers/pool/dpaa2/rte_pmd_dpaa2_pool_version.map\nnew file mode 100644\nindex 0000000..d18e076\n--- /dev/null\n+++ b/drivers/pool/dpaa2/rte_pmd_dpaa2_pool_version.map\n@@ -0,0 +1,8 @@\n+DPDK_17.02 {\n+\tglobal:\n+\tbpid_info;\n+\tdpaa2_create_dpbp_device;\n+\thw_mbuf_alloc_bulk;\n+\n+\tlocal: *;\n+};\ndiff --git a/mk/rte.app.mk b/mk/rte.app.mk\nindex f380c88..1f1157f 100644\n--- a/mk/rte.app.mk\n+++ b/mk/rte.app.mk\n@@ -113,6 +113,7 @@ ifeq ($(CONFIG_RTE_LIBRTE_DPAA2_COMMON),y)\n _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_pmd_dpaa2\n _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_pmd_dpaa2_qbman\n _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_pmd_dpaa2_dpio\n+_LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_pmd_dpaa2_pool\n _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_pmd_fslmcbus\n endif\n _LDLIBS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += -lrte_pmd_e1000\n", "prefixes": [ "dpdk-dev", "PATCHv2", "16/34" ] }