Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/18175/?format=api
{ "id": 18175, "url": "http://patches.dpdk.org/api/patches/18175/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1482180853-18823-16-git-send-email-hemant.agrawal@nxp.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1482180853-18823-16-git-send-email-hemant.agrawal@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1482180853-18823-16-git-send-email-hemant.agrawal@nxp.com", "date": "2016-12-19T20:53:54", "name": "[dpdk-dev,PATCHv2,15/34] drivers/common/dpaa2: dpio object driver", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "f16e58b269c1890d0b241dae1ac5d8d182c0c935", "submitter": { "id": 477, "url": "http://patches.dpdk.org/api/people/477/?format=api", "name": "Hemant Agrawal", "email": "hemant.agrawal@nxp.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1482180853-18823-16-git-send-email-hemant.agrawal@nxp.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/18175/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/18175/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id A5816FABB;\n\tMon, 19 Dec 2016 16:21:50 +0100 (CET)", "from NAM02-CY1-obe.outbound.protection.outlook.com\n\t(mail-cys01nam02on0050.outbound.protection.outlook.com\n\t[104.47.37.50]) by dpdk.org (Postfix) with ESMTP id 40D89FA4F\n\tfor <dev@dpdk.org>; Mon, 19 Dec 2016 16:21:26 +0100 (CET)", "from BN3PR0301CA0032.namprd03.prod.outlook.com (10.160.180.170) by\n\tBN1PR0301MB0738.namprd03.prod.outlook.com (10.160.78.145) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id\n\t15.1.789.14; Mon, 19 Dec 2016 15:21:24 +0000", "from BL2FFO11FD039.protection.gbl (2a01:111:f400:7c09::137) by\n\tBN3PR0301CA0032.outlook.office365.com (2a01:111:e400:4000::42) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.789.14 via\n\tFrontend Transport; Mon, 19 Dec 2016 15:21:24 +0000", "from az84smr01.freescale.net (192.88.158.2) by\n\tBL2FFO11FD039.mail.protection.outlook.com (10.173.161.135) with\n\tMicrosoft\n\tSMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id\n\t15.1.789.10 via Frontend Transport; Mon, 19 Dec 2016 15:21:24 +0000", "from bf-netperf1.idc ([10.232.134.28])\n\tby az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tuBJFKMhe029110; Mon, 19 Dec 2016 08:21:20 -0700" ], "Authentication-Results": "spf=fail (sender IP is 192.88.158.2)\n\tsmtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed)\n\theader.d=none; nxp.com; dmarc=fail action=none header.from=nxp.com;\n\tnxp.com; \n\tdkim=none (message not signed) header.d=none;", "Received-SPF": "Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.158.2 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.158.2; helo=az84smr01.freescale.net;", "From": "Hemant Agrawal <hemant.agrawal@nxp.com>", "To": "<dev@dpdk.org>", "CC": "<thomas.monjalon@6wind.com>, <bruce.richardson@intel.com>,\n\t<shreyansh.jain@nxp.com>, <john.mcnamara@intel.com>,\n\t<ferruh.yigit@intel.com>, <jerin.jacob@caviumnetworks.com>,\n\tHemant Agrawal <hemant.agrawal@nxp.com>", "Date": "Tue, 20 Dec 2016 02:23:54 +0530", "Message-ID": "<1482180853-18823-16-git-send-email-hemant.agrawal@nxp.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1482180853-18823-1-git-send-email-hemant.agrawal@nxp.com>", "References": "<1480875447-23680-1-git-send-email-hemant.agrawal@nxp.com>\n\t<1482180853-18823-1-git-send-email-hemant.agrawal@nxp.com>", "X-EOPAttributedMessage": "0", "X-Matching-Connectors": "131266344843395417;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); ()", "X-Forefront-Antispam-Report": "CIP:192.88.158.2; IPV:NLI; CTRY:US; EFV:NLI;\n\tSFV:NSPM;\n\tSFS:(10009020)(6009001)(336005)(7916002)(39450400003)(39380400002)(39840400002)(39850400002)(39400400002)(39410400002)(39860400002)(2980300002)(1109001)(1110001)(339900001)(199003)(189002)(626004)(77096006)(305945005)(8676002)(92566002)(38730400001)(8936002)(68736007)(36756003)(48376002)(50466002)(86362001)(81156014)(81166006)(47776003)(189998001)(104016004)(50226002)(97736004)(5660300001)(106466001)(110136003)(2351001)(50986999)(4326007)(85426001)(76176999)(2906002)(105606002)(5003940100001)(8666005)(356003)(6916009)(551934003)(33646002)(2950100002)(69596002)(6666003)(7059030);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:BN1PR0301MB0738;\n\tH:az84smr01.freescale.net; \n\tFPR:; SPF:Fail; PTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; ", "X-Microsoft-Exchange-Diagnostics": [ "1; BL2FFO11FD039;\n\t1:wLFJFSvFMH9KWmt+h16ziEx5UPoCNhnfKnuWhy6eWjDJMujV0cLS+NT68V27H9bDWL/68TZaf06L5vYYkLej+R1ggn7I4ziVAsEKPdPWtEudI/nW1rMZ3i3T+oknWrTIrP7OdZyfm9KLcbQG08Q0YG7Nv8cjZA7YbFIq/Uoq27HDWz9QdU1AE01rwNIjK6rHPwRGZrUqVy240A2FLBCMrlyYUBCvYGyZ/44MoFZr2ewSrh2uRkykKmZVAPQprE8AZ+mJ22+0CbKnVi+A2EVcebENWTHPTBzhW3Z9lN7zw3ccWoaU1tNi2ncckqWCy/cTQAEpAtd2jbfByojhiOm6ZJXpEZmCrXw3rnacLYZinIsyu5BoIbFTqe5KccTTDtA3zekjTi1x5zIrs5Y3TODB6IqW9L2via4g2IVY+LXCdaLhTYuLBzmpmig3avKydMRFgLyMaHK75RJSSkQTRemCwr+xWJrIjPlbAASnk02jTJebgYclXJKMsv+bJf5t+5uc9DcLxLCBo4s95ZyFUKyGMU4Xmcjiai6NhxBHeu2OqX4+EE4ib8zaYsVCMCkjvU43zeDe+WbHO9F82MieOtyfTW6RVc/mRH5nYF3VRqnyStMtMb06QyMwd2dZAxAg35o+F9dfrAYp6MSgWRQs4QVS0s8z8gUjreesoglyqroKPhXU2Wq5IrXBK6hJkWs0AAKs3kDC6J9/V5GeqnMw4zUKMu+P4VSwVPBm3DyQK4z90SN4wbQxVbv1uLaKCh4vQi04gXIGSVX3t3QytT8yFJovNQ==", "1; BN1PR0301MB0738;\n\t3:ddQcLkRnpm/wdfhVRJSFm9kHBP8NQg+K4Cs+zHduAznLmDFgI2AQjceUayJDRIu0+X2QDjsJqlValIySuat0sNpf+sN4TdgQFMVMbsjeSCqha4PCyEbzbgH2cNHv2H2RXvj1p3KCHGyrxMIWSEcpPumUnU/+P74olV2TWjCRAgFvmlhUQa+El6jfVrx8+PNNxgFD6onGWJqLQDwfOaB1iBHaonmcq71CtVCs/QJPwLKv1B9r80RLkT+fIdD3EHshR5e5hzqkIr1yyqjOt6mXYy8r1f6Bq9spPuqZv39FlslLvcK8W9WBooQ8YnXgejqaPEVV+uHqFNaRU9QUEy0JNCZY6j/GcCI+ruCxZQd5/Hn3SXrIeIMG8+DtJ0OPbflp", "1; BN1PR0301MB0738;\n\t25:FAjhmnr0WG9mTtAPRzKaH3VO5RF7UNS2DaJn0IkXG0QVS3VSgCClG76kRHO7swgJ+k7mcVxLOx9fRgBmnB/wTaHhiKliQVQ4qbSZRVcULJS+NrU4V4zdzWpik3z//myR4N8n4Az3aRAvnzFJSekE447Sb8HY7pmSZSG1wvBmX6Rd83aDuV3BzjnHvQwqkAKbEo2c/+CgVGT0De3W0eO7Rwl5H17pBS+giLvMbBiALGlZgS8/uOpVFMS5UxBHcfBqLZKNuBoDIMmiAK4vOLYUEh9jKEUCg9iu/T4MYAZt/t9PiSKaxV5KdGiO7AJ+zUiKkG53TiFu5yGlK357CDwhMXgpkBf8L2CcU0FLxYIJLqHbikkVlfqSpSZMKYwq+vVmgdl8a1brYj8HwhA+375AQOUL/EYLACJvwM+z6EvgRCLAgR18V1G6InH8jPgZRYk50EueaHraSgjGK4UbLAKA05E8PNA9DrzrJ8fDTmsMmYL/xgsXz/pnQH0bzhSSRgJPaboLRg91IuHajhlX7YdvVReZQ18lj3AQpGzqtKYrvHU2CQFCQmcbg9aBWcorjgv0W4u9echsZ0kO8qJWasS9YHV6Mi69lbFy9K4lZofduI3bATbjdhIq9xnGeXAokJePx1No2i3zOa9qFPq18ZnapYq8x0oBJVbFht0DFTv90eMxEit1FxWnBefagU7pjMz/+xZcUF9ykc+fWyoylfHM61DdkTrSdlq09cSGu8o9xndAC/mJzWPUTpACd2bxQLUzZENXXR8flH4of26MapG1HA==", "1; BN1PR0301MB0738;\n\t31:CbWhkVokUrGFlVTrjsuarYujr4pO/yfl/hN3hVNxW19M3JXvy8UXnRmIvAt2ZjCpz/e4z1zCQCNbYsJfA8J33nGNnDNB7BLfYkkdS37gAns6PRjV64q40OyGKYUfQSqlTe5z+xJBcJMrlpsHi7f5JA7FqreKKgJ0/LecTCyhx4oMbuwXwWEMusTFd9CmRdYguClJ2+smlFfQBcRdeyn7JW4HFOu70hKKDfVEhNmcbh9U1gS9A39bQxSYamfpYYL2fRChCmZem+q+LFeNDXQb4w==", "1; BN1PR0301MB0738;\n\t4:kUeu2hIYuZPus1RwJsyXb8lf0m2NEmCn8Y5JWzWPylzN61aNt7s38J7cOReqmp/t2EtV3x41ONmNJ+bzAOxNuT0n/dLiuYyVYM0OhaTprqm2C3Qyp3nM4o84z224azdQY8RFQxEQ4Go2FI+034TlNYQnIiKS5PDEE+WiicV0YNgiMG1+kGjRS5rRg121EaFgBkhqUcufLZ8+25khTlsWhyowl/nijrdsjWXvQmMeuZvLQGau/doGNUOhvR0Efy0A2FP3XmmgmKDvCtClVQWZOfPP3qIbL6c7N6DujvMiIlaULF/B66z+Oik7PBg/sjWWsSnSDQY3BLxEDuuf4tbxX4cB8oO2OVoKvbvRE/ehu5KV/AQBv9BVvdIGvQh15484GH9Ru3y849WeCLbrbob+6iuANmXkFCPBTasUPjJZqC1fiH22EWk5LgW/9SHajM2OJ44N8Wj2by3chipI2cmgNGvZwfmklK+EJWjlaZjSBrveUPrz8gPkBZ9ZfkWgs2UuOj3fFHjG+DeOoADjOdDF3WiE2Zpi8dPHrb+i/OJ1V9F88Eg5imTnBw0WCad9zMcekzJTbcHXrdAMlCFuVBVECjZR9kGP3+DoHu6E6wm564yCBTsnzPT7R8gKfANK2ylTrGYuLm62buRPM5J3JdqCpLZuqsi+Bqfsij32on5oqBzjF8MZsOnC7iWUUyp+4pLQFYzBF2Y2xU2BcUrLEXVzuyDSDdsffxom0CLOT0qctqRN6lTJcBevKXiGQE+MsGTCDem04SacWYrlMD8K85Zdzw==", "=?us-ascii?Q?1; BN1PR0301MB0738;\n\t23:fBMd3Zh44JU6Bug0xilL1CXmCwOAZjlu/4CjwN7?=\n\tPq6mj9p0L04V4cgjua8zm5QIdcZ/r6JRfJ5dvQtXZTM+MTLMgarblpQxtpl8DGCJc+9BQ5GPlqJDeJuZUasN/A4EYBf+e71FMpj+HK8tZRAP9ZO6jd1XTASUNB2xXcEY3EtXBWrhmvkmyPggXfVHSg15BotphiebZOGxRufNBA85Oqm6IbkDGFAAg/6NmXGja4n5xAwMUJJQ6Cul9i0R2Nlyg/sJlDL509O4TTMvcx10bDDInq3HUU/+uOS/t+4WbcUtq5MrWL/UVhniFVxhlaLlpdlrbqKinLrPhzXPO4ClGBG5w25969j5TFQonrJvSyjffS8LQd1l5+2oxULWy0BjagW/thdb8pLQYCX0u8G4JnEOaI+bZKBeNly6BZ+H1w42gAPWX6Uxf9cXYuFOmFBEXy4MhhBEri2ch/DEr23VUoFseS3Dmn2pD0TLBZghSNezJSqXQqh60wUTUHdR4yzCoKcYsE/2aKxJCO8+hYku9FLjir2FXcTaKdzbiOf/4zI3EdCbHiJM3KlN94JiJwX7Nxz0znd5EvAnkW3EgwinbrQuiCTCvg1czrAuNvITvYBlnIHrl6wgGDG/pHtOzK7dejLqm7c896pN+m4mdSZGkn7SaiwCnlEmkir3kSOQBdiVbkkXl4sERpG6O/ePHexDSskYChuhZ5xNTGC+EhwK82+UL+3fnlyuSFswNUyIsNU5oMKXYJCb+3AowmaQJL3Zol6lmc0+/XquLeCw7/VnUW4Z6wk8HrKLETRZAR1SHMFccc2BUTRjsNggKc7WotGBZsuQlrb3IVERQJzQaib3dh9N/xX1gqTigR7lGrHKMm79E2S8oOAc0q168/AW7kJXhOngM1hOUDkgAPeOfGOdlmsK/YqrprBj7XZHSqFdpmM8YzmL/s+OmIbPDnlfRxIjG2lP0LjK1Z4Dd9CBgGPP19K0clG05MH3sdwrpBx6LCXH3dpLr9YaaBwV9zTCfjkN9hEt3O7ewTduE65fUC+Zw8I8MB8hGv9mH5TCwNJ/ujdzqjBVfVWOssXj6RjTe+KbS43vblF5NQnI1TikvXsu9Yre/1CWi1UcHnSHA7WBgaZW68O8X3o+Gk8nl5dgNlh+Qg81uGPe6mdQ9T9DnHv5JjvDApQ+g+/vo3QKGrcwxquQdDh9Kq6IHnMj4vcyDxLbxNhUh6XN0HIkfFQu6uiblTBv2ww3ymm6VeEIPPOX4NY8U0007Lizq/1RkkKsVkXxkOiObN6dQ1gfK/8TYOXNMBJ8vB0YusWeK9HAinaKixJ+FkfmQMhBuXAPRK9WPyt5c", "1; BN1PR0301MB0738;\n\t6:RxLsIZ9GkwsT9ty7t93nidSBkX0Ne5FrBAEqJYE52MZKaDKiFaBNbhN+II8uKcKNqk4DystBMSGzH8jpK8NwDOfob9I6WFk8PTP61pjm0D86XBFy+yZZjA8sKcLHgiAnn2+3F/UVKZ+T6zhP5iFCi6R3+wQIaY50E9fJ5/vdlN1rGk6cPQ4VMEjw09NiXif4HJNJ4USKo0kMopy9UTdaWg4pJN8AEeH1r/I0O0ZPRueV0K2BONoPLV7gRE4shEjzdp699OaYRgFUm7J22IfQQR4AV74BMGd6rpvBYAksma6nqZUrMckLsisTdx9v/XENyNlckBCMrOrDjCLjIpY/R19J8Db3vFWhrlakiYJy0Z9xT0q1B49tS1nBuG/qaMEg/HcieI6VpNtByU1TIfFc0iZmJOvK5Ko4WOFpq6gyxw7ylLdwMIcCkxMg0poMisrK;\n\t5:NN3G7FtTZmkT6yhpfNTi56XqgJ3pbuYtav3v2HdzNArJXymnjkwyclVl92qU03fsstlxe3ONN6d8Vf3b1wjBhwAEKMGuMfwzNgmUZ8aSuH+beB+fpz93QKcwRl/YJRiDJmWSoyNNBdC0AJ+IjxrdFtX8vU2ZJp0htBkjPC23ZUACMGn0Q57TRzRg8BoDDIQZ;\n\t24:lqho08jQRmViKmwLkWDVv9fLWFLgZYG1LPG2yD1c5ZHcBatsKHahkfslGrlcaw5hICAS+X3/jJlQURUqHnXJ/fvJW8AuPxLFDzQPgYvhqMw=", "1; BN1PR0301MB0738;\n\t7:wPIpo6xfv1B9XH0655nrNrBRyDZh43GGiRZaOVInCl7wlZoaAUpFOwQPX+ZycJIXOyIsfqTUebG/Mr5eE1Q8MFyDBKbOuF/SUePAh+BnXvJoLZquewtinSHqYwAA6AjiwMUtiyN1c6NDGvoLR18m2oT0wq7LhSrSOzB2WxYTGxCTyrZOE65yz4aDp/fqQFdNsLL1sDEm132FQJchY9uk4duZQCaRgdsu8V4WTCCVaIEtykVEF1dpD98GVSJA9sOPlGzKKSBfZlmTLsGmy88nIKRm6HCOyr8NVaUvHRWtcGxdLE8MnqZXpksjEbnTiU/POmXhMnWdPDTkctpIR/zMbHNxoOjFCZ/Rf7jQUpHC2gFdHdyvpCoHV9Mdj3Q8fks8NPrjXEEfxUY7+g/LeLjj1KrwBxpAzICyio/3ReuB2494PI+mpEvrgnbLIdUiPcD8FKxToVtSz7Yqvog2HnLE1w==" ], "MIME-Version": "1.0", "Content-Type": "text/plain", "X-MS-Office365-Filtering-Correlation-Id": "f7cc8c0b-e239-4d17-c159-08d42822b1d1", "X-Microsoft-Antispam": "UriScan:; BCL:0; PCL:0; RULEID:(22001);\n\tSRVR:BN1PR0301MB0738; ", "X-Microsoft-Antispam-PRVS": "<BN1PR0301MB0738BE8CA587CF0067BE82BB89910@BN1PR0301MB0738.namprd03.prod.outlook.com>", "X-Exchange-Antispam-Report-Test": "UriScan:(185117386973197)(275809806118684); ", "X-Exchange-Antispam-Report-CFA-Test": "BCL:0; PCL:0;\n\tRULEID:(6095060)(601004)(2401047)(8121501046)(13018025)(13015025)(13024025)(5005006)(13023025)(13017025)(3002001)(10201501046)(6055026)(6096035)(20161123565025)(20161123563025)(20161123559025)(20161123561025)(20161123556025);\n\tSRVR:BN1PR0301MB0738; BCL:0; PCL:0; RULEID:(400006);\n\tSRVR:BN1PR0301MB0738; ", "X-Forefront-PRVS": "01613DFDC8", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "19 Dec 2016 15:21:24.1211\n\t(UTC)", "X-MS-Exchange-CrossTenant-Id": "5afe0b00-7697-4969-b663-5eab37d5f47e", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.158.2]; \n\tHelo=[az84smr01.freescale.net]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN1PR0301MB0738", "Subject": "[dpdk-dev] [PATCHv2 15/34] drivers/common/dpaa2: dpio object driver", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The DPIO driver is bound to DPIO objects discovered on the fsl-mc bus and\nprovides services that:\n- allow other drivers, such as the Ethernet driver, to enqueue and dequeue\n frames for their respective objects\n\nA system will typically allocate 1 DPIO object per CPU to allow queuing\noperations to happen simultaneously across all CPUs.\n\nSigned-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>\n---\n drivers/bus/fslmc/Makefile | 2 +\n drivers/bus/fslmc/fslmc_vfio.c | 21 +-\n drivers/common/Makefile | 4 +\n drivers/common/dpaa2/Makefile | 1 +\n drivers/common/dpaa2/dpio/Makefile | 64 ++++\n drivers/common/dpaa2/dpio/dpaa2_hw_dpio.c | 364 +++++++++++++++++++++\n drivers/common/dpaa2/dpio/dpaa2_hw_dpio.h | 64 ++++\n drivers/common/dpaa2/dpio/dpaa2_hw_pvt.h | 68 ++++\n .../dpaa2/dpio/rte_pmd_dpaa2_dpio_version.map | 8 +\n mk/rte.app.mk | 1 +\n 10 files changed, 594 insertions(+), 3 deletions(-)\n create mode 100644 drivers/common/dpaa2/dpio/Makefile\n create mode 100644 drivers/common/dpaa2/dpio/dpaa2_hw_dpio.c\n create mode 100644 drivers/common/dpaa2/dpio/dpaa2_hw_dpio.h\n create mode 100644 drivers/common/dpaa2/dpio/dpaa2_hw_pvt.h\n create mode 100644 drivers/common/dpaa2/dpio/rte_pmd_dpaa2_dpio_version.map", "diff": "diff --git a/drivers/bus/fslmc/Makefile b/drivers/bus/fslmc/Makefile\nindex a8b1666..cc6d7c2 100644\n--- a/drivers/bus/fslmc/Makefile\n+++ b/drivers/bus/fslmc/Makefile\n@@ -46,6 +46,8 @@ CFLAGS += \"-Wno-strict-aliasing\"\n \n CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc\n CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc/mc\n+CFLAGS += -I$(RTE_SDK)/drivers/common/dpaa2/qbman/include\n+CFLAGS += -I$(RTE_SDK)/drivers/common/dpaa2/dpio\n CFLAGS += -I$(RTE_SDK)/lib/librte_eal/linuxapp/eal\n \n # versioning export map\ndiff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c\nindex 7739493..1c80bf9 100644\n--- a/drivers/bus/fslmc/fslmc_vfio.c\n+++ b/drivers/bus/fslmc/fslmc_vfio.c\n@@ -61,6 +61,9 @@\n #include \"rte_fslmc.h\"\n #include \"fslmc_vfio.h\"\n \n+#include \"dpaa2_hw_pvt.h\"\n+#include \"dpaa2_hw_dpio.h\"\n+\n #define VFIO_MAX_CONTAINERS\t1\n \n #define FSLMC_VFIO_LOG(level, fmt, args...) \\\n@@ -224,7 +227,7 @@ static int64_t vfio_map_mcp_obj(struct fslmc_vfio_group *group, char *mcp_obj)\n }\n \n static void\n-dpaa2_bus_add_device(struct rte_bus *bus, struct rte_dpaa2_device *dev)\n+fslmc_bus_add_device(struct rte_bus *bus, struct rte_dpaa2_device *dev)\n {\n \t/* device is valid, add in list (sorted) */\n \tif (TAILQ_EMPTY(&bus->device_list)) {\n@@ -261,12 +264,13 @@ int fslmc_vfio_process_group(struct rte_bus *bus)\n \tstruct fslmc_vfio_device *vdev;\n \tstruct vfio_device_info device_info = { .argsz = sizeof(device_info) };\n \tchar *temp_obj, *object_type, *mcp_obj, *dev_name;\n-\tint32_t object_id, i, dev_fd;\n+\tint32_t object_id, i, dev_fd, ret;\n \tDIR *d;\n \tstruct dirent *dir;\n \tchar path[PATH_MAX];\n \tint64_t v_addr;\n \tint ndev_count;\n+\tint dpio_count = 0;\n \tstruct fslmc_vfio_group *group = &vfio_groups[0];\n \tstatic int process_once;\n \n@@ -407,11 +411,22 @@ int fslmc_vfio_process_group(struct rte_bus *bus)\n \t\t\tFSLMC_VFIO_LOG(DEBUG, \"DPAA2: Added [%s-%d]\\n\",\n \t\t\t\t object_type, object_id);\n \n-\t\t\tdpaa2_bus_add_device(bus, dev);\n+\t\t\tfslmc_bus_add_device(bus, dev);\n+\t\t}\n+\t\tif (!strcmp(object_type, \"dpio\")) {\n+\t\t\tret = dpaa2_create_dpio_device(vdev,\n+\t\t\t\t\t\t &device_info,\n+\t\t\t\t\t\t object_id);\n+\t\t\tif (!ret)\n+\t\t\t\tdpio_count++;\n \t\t}\n \t}\n \tclosedir(d);\n \n+\tret = dpaa2_affine_qbman_swp();\n+\tif (ret)\n+\t\tFSLMC_VFIO_LOG(DEBUG, \"Error in affining qbman swp %d\", ret);\n+\n \treturn 0;\n \n FAILURE:\ndiff --git a/drivers/common/Makefile b/drivers/common/Makefile\nindex 76ec2d1..434280f 100644\n--- a/drivers/common/Makefile\n+++ b/drivers/common/Makefile\n@@ -33,6 +33,10 @@ include $(RTE_SDK)/mk/rte.vars.mk\n \n CONFIG_RTE_LIBRTE_DPAA2_COMMON = $(CONFIG_RTE_LIBRTE_DPAA2_PMD)\n \n+ifneq ($(CONFIG_RTE_LIBRTE_DPAA2_COMMON),y)\n+CONFIG_RTE_LIBRTE_DPAA2_COMMON = $(CONFIG_RTE_LIBRTE_FSLMC_BUS)\n+endif\n+\n DIRS-$(CONFIG_RTE_LIBRTE_DPAA2_COMMON) += dpaa2\n \n include $(RTE_SDK)/mk/rte.subdir.mk\ndiff --git a/drivers/common/dpaa2/Makefile b/drivers/common/dpaa2/Makefile\nindex 4960ebe..4ccaf26 100644\n--- a/drivers/common/dpaa2/Makefile\n+++ b/drivers/common/dpaa2/Makefile\n@@ -32,5 +32,6 @@\n include $(RTE_SDK)/mk/rte.vars.mk\n \n DIRS-$(CONFIG_RTE_LIBRTE_DPAA2_COMMON) += qbman\n+DIRS-$(CONFIG_RTE_LIBRTE_DPAA2_COMMON) += dpio\n \n include $(RTE_SDK)/mk/rte.subdir.mk\ndiff --git a/drivers/common/dpaa2/dpio/Makefile b/drivers/common/dpaa2/dpio/Makefile\nnew file mode 100644\nindex 0000000..762597f\n--- /dev/null\n+++ b/drivers/common/dpaa2/dpio/Makefile\n@@ -0,0 +1,64 @@\n+# BSD LICENSE\n+#\n+# Copyright(c) 2016 NXP. All rights reserved.\n+# All rights reserved.\n+#\n+# Redistribution and use in source and binary forms, with or without\n+# modification, are permitted provided that the following conditions\n+# are met:\n+#\n+# * Redistributions of source code must retain the above copyright\n+# notice, this list of conditions and the following disclaimer.\n+# * Redistributions in binary form must reproduce the above copyright\n+# notice, this list of conditions and the following disclaimer in\n+# the documentation and/or other materials provided with the\n+# distribution.\n+# * Neither the name of NXP nor the names of its\n+# contributors may be used to endorse or promote products derived\n+# from this software without specific prior written permission.\n+#\n+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+# \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+\n+include $(RTE_SDK)/mk/rte.vars.mk\n+\n+#\n+# library name\n+#\n+LIB = librte_pmd_dpaa2_dpio.a\n+\n+ifeq ($(CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT),y)\n+CFLAGS += -O0 -g\n+CFLAGS += \"-Wno-error\"\n+else\n+CFLAGS += -O3\n+CFLAGS += $(WERROR_FLAGS)\n+endif\n+\n+CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc\n+CFLAGS += -I$(RTE_SDK)/drivers/common/dpaa2/qbman/include\n+CFLAGS += -I$(RTE_SDK)/lib/librte_eal/linuxapp/eal\n+\n+# versioning export map\n+EXPORT_MAP := rte_pmd_dpaa2_dpio_version.map\n+\n+# library version\n+LIBABIVER := 1\n+\n+# all source are stored in SRCS-y\n+#\n+SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_COMMON) += dpaa2_hw_dpio.c\n+\n+# library dependencies\n+DEPDIRS-y += lib/librte_eal\n+\n+include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/common/dpaa2/dpio/dpaa2_hw_dpio.c b/drivers/common/dpaa2/dpio/dpaa2_hw_dpio.c\nnew file mode 100644\nindex 0000000..011bd9f\n--- /dev/null\n+++ b/drivers/common/dpaa2/dpio/dpaa2_hw_dpio.c\n@@ -0,0 +1,364 @@\n+/*-\n+ * BSD LICENSE\n+ *\n+ * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.\n+ * Copyright (c) 2016 NXP. All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ * * Neither the name of Freescale Semiconductor, Inc nor the names of its\n+ * contributors may be used to endorse or promote products derived\n+ * from this software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+#include <unistd.h>\n+#include <stdio.h>\n+#include <string.h>\n+#include <stdlib.h>\n+#include <fcntl.h>\n+#include <errno.h>\n+#include <stdarg.h>\n+#include <inttypes.h>\n+#include <signal.h>\n+#include <pthread.h>\n+#include <sys/types.h>\n+#include <sys/queue.h>\n+#include <sys/ioctl.h>\n+#include <sys/stat.h>\n+#include <sys/mman.h>\n+#include <sys/syscall.h>\n+\n+#include <rte_mbuf.h>\n+#include <rte_ethdev.h>\n+#include <rte_malloc.h>\n+#include <rte_memcpy.h>\n+#include <rte_string_fns.h>\n+#include <rte_cycles.h>\n+#include <rte_kvargs.h>\n+#include <rte_dev.h>\n+#include <rte_ethdev.h>\n+\n+#include <fslmc_logs.h>\n+#include <fslmc_vfio.h>\n+#include \"dpaa2_hw_pvt.h\"\n+#include \"dpaa2_hw_dpio.h\"\n+\n+#define NUM_HOST_CPUS RTE_MAX_LCORE\n+\n+struct dpaa2_io_portal_t dpaa2_io_portal[RTE_MAX_LCORE];\n+RTE_DEFINE_PER_LCORE(struct dpaa2_io_portal_t, _dpaa2_io);\n+\n+TAILQ_HEAD(dpio_device_list, dpaa2_dpio_dev);\n+static struct dpio_device_list *dpio_dev_list; /*!< DPIO device list */\n+static uint32_t io_space_count;\n+\n+/*Stashing Macros default for LS208x*/\n+static int dpaa2_core_cluster_base = 0x04;\n+static int dpaa2_cluster_sz = 2;\n+\n+/* For LS208X platform There are four clusters with following mapping:\n+ * Cluster 1 (ID = x04) : CPU0, CPU1;\n+ * Cluster 2 (ID = x05) : CPU2, CPU3;\n+ * Cluster 3 (ID = x06) : CPU4, CPU5;\n+ * Cluster 4 (ID = x07) : CPU6, CPU7;\n+ */\n+/* For LS108X platform There are two clusters with following mapping:\n+ * Cluster 1 (ID = x02) : CPU0, CPU1, CPU2, CPU3;\n+ * Cluster 2 (ID = x03) : CPU4, CPU5, CPU6, CPU7;\n+ */\n+\n+/* Set the STASH Destination depending on Current CPU ID.\n+ * e.g. Valid values of SDEST are 4,5,6,7. Where,\n+ * CPU 0-1 will have SDEST 4\n+ * CPU 2-3 will have SDEST 5.....and so on.\n+ */\n+static int\n+dpaa2_core_cluster_sdest(int cpu_id)\n+{\n+\tint x = cpu_id / dpaa2_cluster_sz;\n+\n+\tif (x > 3)\n+\t\tx = 3;\n+\n+\treturn dpaa2_core_cluster_base + x;\n+}\n+\n+static int\n+configure_dpio_qbman_swp(struct dpaa2_dpio_dev *dpio_dev)\n+{\n+\tstruct qbman_swp_desc p_des;\n+\tstruct dpio_attr attr;\n+\n+\tdpio_dev->dpio = malloc(sizeof(struct fsl_mc_io));\n+\tif (!dpio_dev->dpio) {\n+\t\tPMD_INIT_LOG(ERR, \"Memory allocation failure\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tPMD_DRV_LOG(DEBUG, \"\\t Allocated DPIO Portal[%p]\", dpio_dev->dpio);\n+\tdpio_dev->dpio->regs = dpio_dev->mc_portal;\n+\tif (dpio_open(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->hw_id,\n+\t\t &dpio_dev->token)) {\n+\t\tPMD_INIT_LOG(ERR, \"Failed to allocate IO space\\n\");\n+\t\tfree(dpio_dev->dpio);\n+\t\treturn -1;\n+\t}\n+\n+\tif (dpio_reset(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token)) {\n+\t\tPMD_INIT_LOG(ERR, \"Failed to reset dpio\\n\");\n+\t\tdpio_close(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token);\n+\t\tfree(dpio_dev->dpio);\n+\t\treturn -1;\n+\t}\n+\n+\tif (dpio_enable(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token)) {\n+\t\tPMD_INIT_LOG(ERR, \"Failed to Enable dpio\\n\");\n+\t\tdpio_close(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token);\n+\t\tfree(dpio_dev->dpio);\n+\t\treturn -1;\n+\t}\n+\n+\tif (dpio_get_attributes(dpio_dev->dpio, CMD_PRI_LOW,\n+\t\t\t\tdpio_dev->token, &attr)) {\n+\t\tPMD_INIT_LOG(ERR, \"DPIO Get attribute failed\\n\");\n+\t\tdpio_disable(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token);\n+\t\tdpio_close(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token);\n+\t\tfree(dpio_dev->dpio);\n+\t\treturn -1;\n+\t}\n+\n+\tPMD_INIT_LOG(DEBUG, \"Qbman Portal ID %d\", attr.qbman_portal_id);\n+\tPMD_INIT_LOG(DEBUG, \"Portal CE adr 0x%lX\", attr.qbman_portal_ce_offset);\n+\tPMD_INIT_LOG(DEBUG, \"Portal CI adr 0x%lX\", attr.qbman_portal_ci_offset);\n+\n+\t/* Configure & setup SW portal */\n+\tp_des.block = NULL;\n+\tp_des.idx = attr.qbman_portal_id;\n+\tp_des.cena_bar = (void *)(dpio_dev->qbman_portal_ce_paddr);\n+\tp_des.cinh_bar = (void *)(dpio_dev->qbman_portal_ci_paddr);\n+\tp_des.irq = -1;\n+\tp_des.qman_version = attr.qbman_version;\n+\n+\tdpio_dev->sw_portal = qbman_swp_init(&p_des);\n+\tif (dpio_dev->sw_portal == NULL) {\n+\t\tPMD_DRV_LOG(ERR, \" QBMan SW Portal Init failed\\n\");\n+\t\tdpio_close(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->token);\n+\t\tfree(dpio_dev->dpio);\n+\t\treturn -1;\n+\t}\n+\n+\tPMD_INIT_LOG(DEBUG, \"QBMan SW Portal 0x%p\\n\", dpio_dev->sw_portal);\n+\n+\treturn 0;\n+}\n+\n+static int\n+dpaa2_configure_stashing(struct dpaa2_dpio_dev *dpio_dev)\n+{\n+\tint sdest;\n+\tint cpu_id, ret;\n+\n+\t/* Set the Stashing Destination */\n+\tcpu_id = rte_lcore_id();\n+\tif (cpu_id < 0) {\n+\t\tcpu_id = rte_get_master_lcore();\n+\t\tif (cpu_id < 0) {\n+\t\t\tRTE_LOG(ERR, PMD, \"\\tGetting CPU Index failed\\n\");\n+\t\t\treturn -1;\n+\t\t}\n+\t}\n+\t/* Set the STASH Destination depending on Current CPU ID.\n+\t * Valid values of SDEST are 4,5,6,7. Where,\n+\t * CPU 0-1 will have SDEST 4\n+\t * CPU 2-3 will have SDEST 5.....and so on.\n+\t */\n+\n+\tsdest = dpaa2_core_cluster_sdest(cpu_id);\n+\tPMD_DRV_LOG(DEBUG, \"Portal= %d CPU= %u SDEST= %d\",\n+\t\t dpio_dev->index, cpu_id, sdest);\n+\n+\tret = dpio_set_stashing_destination(dpio_dev->dpio, CMD_PRI_LOW,\n+\t\t\t\t\t dpio_dev->token, sdest);\n+\tif (ret) {\n+\t\tPMD_DRV_LOG(ERR, \"%d ERROR in SDEST\\n\", ret);\n+\t\treturn -1;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static inline struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(void)\n+{\n+\tstruct dpaa2_dpio_dev *dpio_dev = NULL;\n+\tint ret;\n+\n+\t/* Get DPIO dev handle from list using index */\n+\tTAILQ_FOREACH(dpio_dev, dpio_dev_list, next) {\n+\t\tif (dpio_dev && rte_atomic16_test_and_set(&dpio_dev->ref_count))\n+\t\t\tbreak;\n+\t}\n+\tif (!dpio_dev)\n+\t\treturn NULL;\n+\n+\tPMD_DRV_LOG(DEBUG, \"New Portal=0x%x (%d) affined thread - %lu\",\n+\t\t dpio_dev, dpio_dev->index, syscall(SYS_gettid));\n+\n+\tret = dpaa2_configure_stashing(dpio_dev);\n+\tif (ret)\n+\t\tPMD_DRV_LOG(ERR, \"dpaa2_configure_stashing failed\");\n+\n+\treturn dpio_dev;\n+}\n+\n+int\n+dpaa2_affine_qbman_swp(void)\n+{\n+\tunsigned int lcore_id = rte_lcore_id();\n+\tuint64_t tid = syscall(SYS_gettid);\n+\n+\tif (lcore_id == LCORE_ID_ANY)\n+\t\tlcore_id = rte_get_master_lcore();\n+\t/* if the core id is not supported */\n+\telse if (lcore_id >= RTE_MAX_LCORE)\n+\t\treturn -1;\n+\n+\tif (dpaa2_io_portal[lcore_id].dpio_dev) {\n+\t\tPMD_DRV_LOG(INFO, \"DPAA Portal=0x%x (%d) is being shared\"\n+\t\t\t \" between thread %lu and current %lu\",\n+\t\t\t dpaa2_io_portal[lcore_id].dpio_dev,\n+\t\t\t dpaa2_io_portal[lcore_id].dpio_dev->index,\n+\t\t\t dpaa2_io_portal[lcore_id].net_tid,\n+\t\t\t tid);\n+\t\tRTE_PER_LCORE(_dpaa2_io).dpio_dev\n+\t\t\t= dpaa2_io_portal[lcore_id].dpio_dev;\n+\t\trte_atomic16_inc(&dpaa2_io_portal\n+\t\t\t\t [lcore_id].dpio_dev->ref_count);\n+\t\tdpaa2_io_portal[lcore_id].net_tid = tid;\n+\n+\t\tPMD_DRV_LOG(DEBUG, \"Old Portal=0x%x (%d) affined thread - %lu\",\n+\t\t\t dpaa2_io_portal[lcore_id].dpio_dev,\n+\t\t\t dpaa2_io_portal[lcore_id].dpio_dev->index,\n+\t\t\t tid);\n+\t\treturn 0;\n+\t}\n+\n+\t/* Populate the dpaa2_io_portal structure */\n+\tdpaa2_io_portal[lcore_id].dpio_dev = dpaa2_get_qbman_swp();\n+\n+\tif (dpaa2_io_portal[lcore_id].dpio_dev) {\n+\t\tRTE_PER_LCORE(_dpaa2_io).dpio_dev\n+\t\t\t= dpaa2_io_portal[lcore_id].dpio_dev;\n+\t\tdpaa2_io_portal[lcore_id].net_tid = tid;\n+\n+\t\treturn 0;\n+\t} else {\n+\t\treturn -1;\n+\t}\n+}\n+\n+int\n+dpaa2_create_dpio_device(struct fslmc_vfio_device *vdev,\n+\t\t\t struct vfio_device_info *obj_info,\n+\t\tint object_id)\n+{\n+\tstruct dpaa2_dpio_dev *dpio_dev;\n+\tstruct vfio_region_info reg_info = { .argsz = sizeof(reg_info)};\n+\n+\tif (obj_info->num_regions < NUM_DPIO_REGIONS) {\n+\t\tPMD_INIT_LOG(ERR, \"ERROR, Not sufficient number \"\n+\t\t\t\t\"of DPIO regions.\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tif (!dpio_dev_list) {\n+\t\tdpio_dev_list = malloc(sizeof(struct dpio_device_list));\n+\t\tif (!dpio_dev_list) {\n+\t\t\tPMD_INIT_LOG(ERR, \"Memory alloc failed in DPIO list\\n\");\n+\t\t\treturn -1;\n+\t\t}\n+\n+\t\t/* Initialize the DPIO List */\n+\t\tTAILQ_INIT(dpio_dev_list);\n+\t}\n+\n+\tdpio_dev = malloc(sizeof(struct dpaa2_dpio_dev));\n+\tif (!dpio_dev) {\n+\t\tPMD_INIT_LOG(ERR, \"Memory allocation failed for DPIO Device\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tPMD_DRV_LOG(INFO, \"\\t Aloocated DPIO [%p]\", dpio_dev);\n+\tdpio_dev->dpio = NULL;\n+\tdpio_dev->hw_id = object_id;\n+\tdpio_dev->vfio_fd = vdev->fd;\n+\trte_atomic16_init(&dpio_dev->ref_count);\n+\t/* Using single portal for all devices */\n+\tdpio_dev->mc_portal = mcp_ptr_list[MC_PORTAL_INDEX];\n+\n+\treg_info.index = 0;\n+\tif (ioctl(dpio_dev->vfio_fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {\n+\t\tPMD_INIT_LOG(ERR, \"vfio: error getting region info\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tPMD_DRV_LOG(DEBUG, \"\\t Region Offset = %llx\", reg_info.offset);\n+\tPMD_DRV_LOG(DEBUG, \"\\t Region Size = %llx\", reg_info.size);\n+\tdpio_dev->ce_size = reg_info.size;\n+\tdpio_dev->qbman_portal_ce_paddr = (uint64_t)mmap(NULL, reg_info.size,\n+\t\t\t\tPROT_WRITE | PROT_READ, MAP_SHARED,\n+\t\t\t\tdpio_dev->vfio_fd, reg_info.offset);\n+\n+\t/* Create Mapping for QBMan Cache Enabled area. This is a fix for\n+\t * SMMU fault for DQRR statshing transaction.\n+\t */\n+\tif (vfio_dmamap_mem_region(dpio_dev->qbman_portal_ce_paddr,\n+\t\t\t\t reg_info.offset, reg_info.size)) {\n+\t\tPMD_INIT_LOG(ERR, \"DMAMAP for Portal CE area failed.\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\treg_info.index = 1;\n+\tif (ioctl(dpio_dev->vfio_fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {\n+\t\tPMD_INIT_LOG(ERR, \"vfio: error getting region info\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tPMD_DRV_LOG(DEBUG, \"\\t Region Offset = %llx\", reg_info.offset);\n+\tPMD_DRV_LOG(DEBUG, \"\\t Region Size = %llx\", reg_info.size);\n+\tdpio_dev->ci_size = reg_info.size;\n+\tdpio_dev->qbman_portal_ci_paddr = (uint64_t)mmap(NULL, reg_info.size,\n+\t\t\t\tPROT_WRITE | PROT_READ, MAP_SHARED,\n+\t\t\t\tdpio_dev->vfio_fd, reg_info.offset);\n+\n+\tif (configure_dpio_qbman_swp(dpio_dev)) {\n+\t\tPMD_INIT_LOG(ERR,\n+\t\t\t \"Fail to configure the dpio qbman portal for %d\\n\",\n+\t\t\t dpio_dev->hw_id);\n+\t\treturn -1;\n+\t}\n+\n+\tio_space_count++;\n+\tdpio_dev->index = io_space_count;\n+\tTAILQ_INSERT_HEAD(dpio_dev_list, dpio_dev, next);\n+\n+\treturn 0;\n+}\ndiff --git a/drivers/common/dpaa2/dpio/dpaa2_hw_dpio.h b/drivers/common/dpaa2/dpio/dpaa2_hw_dpio.h\nnew file mode 100644\nindex 0000000..889c2c0\n--- /dev/null\n+++ b/drivers/common/dpaa2/dpio/dpaa2_hw_dpio.h\n@@ -0,0 +1,64 @@\n+/*-\n+ * BSD LICENSE\n+ *\n+ * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.\n+ * Copyright (c) 2016 NXP. All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ * * Neither the name of Freescale Semiconductor, Inc nor the names of its\n+ * contributors may be used to endorse or promote products derived\n+ * from this software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#ifndef _FSLMC_DPIO_H_\n+#define _FSLMC_DPIO_H_\n+\n+#include <mc/fsl_dpio.h>\n+#include <mc/fsl_mc_sys.h>\n+\n+struct dpaa2_io_portal_t {\n+\tstruct dpaa2_dpio_dev *dpio_dev;\n+\tstruct dpaa2_dpio_dev *sec_dpio_dev;\n+\tuint64_t net_tid;\n+\tuint64_t sec_tid;\n+};\n+\n+/*! Global per thread DPIO portal */\n+RTE_DECLARE_PER_LCORE(struct dpaa2_io_portal_t, _dpaa2_io);\n+\n+#define DPAA2_PER_LCORE_DPIO RTE_PER_LCORE(_dpaa2_io).dpio_dev\n+#define DPAA2_PER_LCORE_PORTAL DPAA2_PER_LCORE_DPIO->sw_portal\n+\n+#define DPAA2_PER_LCORE_SEC_DPIO RTE_PER_LCORE(_dpaa2_io).sec_dpio_dev\n+#define DPAA2_PER_LCORE_SEC_PORTAL DPAA2_PER_LCORE_SEC_DPIO->sw_portal\n+\n+/* Affine a DPIO portal to current processing thread */\n+int dpaa2_affine_qbman_swp(void);\n+\n+/* create dpio device */\n+int dpaa2_create_dpio_device(struct fslmc_vfio_device *vdev,\n+\t\t\t struct vfio_device_info *obj_info,\n+\t\t\t int object_id);\n+\n+#endif /* _FSLMC_DPIO_H_ */\ndiff --git a/drivers/common/dpaa2/dpio/dpaa2_hw_pvt.h b/drivers/common/dpaa2/dpio/dpaa2_hw_pvt.h\nnew file mode 100644\nindex 0000000..ef3eb71\n--- /dev/null\n+++ b/drivers/common/dpaa2/dpio/dpaa2_hw_pvt.h\n@@ -0,0 +1,68 @@\n+/*-\n+ * BSD LICENSE\n+ *\n+ * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.\n+ * Copyright (c) 2016 NXP. All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ * * Neither the name of Freescale Semiconductor, Inc nor the names of its\n+ * contributors may be used to endorse or promote products derived\n+ * from this software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#ifndef _DPAA2_HW_PVT_H_\n+#define _DPAA2_HW_PVT_H_\n+\n+#include <mc/fsl_mc_sys.h>\n+#include <fsl_qbman_portal.h>\n+\n+\n+#define MC_PORTAL_INDEX\t\t0\n+#define NUM_DPIO_REGIONS\t2\n+\n+struct dpaa2_dpio_dev {\n+\tTAILQ_ENTRY(dpaa2_dpio_dev) next;\n+\t\t/**< Pointer to Next device instance */\n+\tuint16_t index; /**< Index of a instance in the list */\n+\trte_atomic16_t ref_count;\n+\t\t/**< How many thread contexts are sharing this.*/\n+\tstruct fsl_mc_io *dpio; /** handle to DPIO portal object */\n+\tuint16_t token;\n+\tstruct qbman_swp *sw_portal; /** SW portal object */\n+\tconst struct qbman_result *dqrr[4];\n+\t\t/**< DQRR Entry for this SW portal */\n+\tvoid *mc_portal; /**< MC Portal for configuring this device */\n+\tuintptr_t qbman_portal_ce_paddr;\n+\t\t/**< Physical address of Cache Enabled Area */\n+\tuintptr_t ce_size; /**< Size of the CE region */\n+\tuintptr_t qbman_portal_ci_paddr;\n+\t\t/**< Physical address of Cache Inhibit Area */\n+\tuintptr_t ci_size; /**< Size of the CI region */\n+\tint32_t\tvfio_fd; /**< File descriptor received via VFIO */\n+\tint32_t hw_id; /**< An unique ID of this DPIO device instance */\n+};\n+\n+/*! Global MCP list */\n+extern void *(*mcp_ptr_list);\n+#endif\ndiff --git a/drivers/common/dpaa2/dpio/rte_pmd_dpaa2_dpio_version.map b/drivers/common/dpaa2/dpio/rte_pmd_dpaa2_dpio_version.map\nnew file mode 100644\nindex 0000000..597cdbd\n--- /dev/null\n+++ b/drivers/common/dpaa2/dpio/rte_pmd_dpaa2_dpio_version.map\n@@ -0,0 +1,8 @@\n+DPDK_17.02 {\n+\tglobal:\n+\tper_lcore__dpaa2_io;\n+\tdpaa2_affine_qbman_swp;\n+\tdpaa2_create_dpio_device;\n+\n+\tlocal: *;\n+};\ndiff --git a/mk/rte.app.mk b/mk/rte.app.mk\nindex 438fa2c..f380c88 100644\n--- a/mk/rte.app.mk\n+++ b/mk/rte.app.mk\n@@ -112,6 +112,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += -lrte_pmd_cxgbe\n ifeq ($(CONFIG_RTE_LIBRTE_DPAA2_COMMON),y)\n _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_pmd_dpaa2\n _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_pmd_dpaa2_qbman\n+_LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_pmd_dpaa2_dpio\n _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += -lrte_pmd_fslmcbus\n endif\n _LDLIBS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += -lrte_pmd_e1000\n", "prefixes": [ "dpdk-dev", "PATCHv2", "15/34" ] }