Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/18163/?format=api
{ "id": 18163, "url": "http://patches.dpdk.org/api/patches/18163/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1482180853-18823-4-git-send-email-hemant.agrawal@nxp.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1482180853-18823-4-git-send-email-hemant.agrawal@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1482180853-18823-4-git-send-email-hemant.agrawal@nxp.com", "date": "2016-12-19T20:53:42", "name": "[dpdk-dev,PATCHv2,03/34] doc: add dpaa2 nic details", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "f0f4e75215d6336bdf1f68c0665e170b3fb8fa5c", "submitter": { "id": 477, "url": "http://patches.dpdk.org/api/people/477/?format=api", "name": "Hemant Agrawal", "email": "hemant.agrawal@nxp.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1482180853-18823-4-git-send-email-hemant.agrawal@nxp.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/18163/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/18163/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 2A48EF97B;\n\tMon, 19 Dec 2016 16:21:08 +0100 (CET)", "from NAM02-BL2-obe.outbound.protection.outlook.com\n\t(mail-bl2nam02on0054.outbound.protection.outlook.com [104.47.38.54])\n\tby dpdk.org (Postfix) with ESMTP id 7F17FF969\n\tfor <dev@dpdk.org>; Mon, 19 Dec 2016 16:20:41 +0100 (CET)", "from BN3PR0301CA0024.namprd03.prod.outlook.com (10.160.180.162) by\n\tBN1PR0301MB0737.namprd03.prod.outlook.com (10.160.78.144) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id\n\t15.1.789.14; Mon, 19 Dec 2016 15:20:39 +0000", "from BL2FFO11FD010.protection.gbl (2a01:111:f400:7c09::193) by\n\tBN3PR0301CA0024.outlook.office365.com (2a01:111:e400:4000::34) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.789.14 via\n\tFrontend Transport; Mon, 19 Dec 2016 15:20:39 +0000", "from az84smr01.freescale.net (192.88.158.2) by\n\tBL2FFO11FD010.mail.protection.outlook.com (10.173.161.16) with\n\tMicrosoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.789.10\n\tvia Frontend Transport; Mon, 19 Dec 2016 15:20:39 +0000", "from bf-netperf1.idc ([10.232.134.28])\n\tby az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tuBJFKMhS029110; Mon, 19 Dec 2016 08:20:35 -0700" ], "Authentication-Results": "spf=fail (sender IP is 192.88.158.2)\n\tsmtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed)\n\theader.d=none; nxp.com; dmarc=fail action=none header.from=nxp.com;\n\tnxp.com; \n\tdkim=none (message not signed) header.d=none;", "Received-SPF": "Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.158.2 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.158.2; helo=az84smr01.freescale.net;", "From": "Hemant Agrawal <hemant.agrawal@nxp.com>", "To": "<dev@dpdk.org>", "CC": "<thomas.monjalon@6wind.com>, <bruce.richardson@intel.com>,\n\t<shreyansh.jain@nxp.com>, <john.mcnamara@intel.com>,\n\t<ferruh.yigit@intel.com>, <jerin.jacob@caviumnetworks.com>,\n\tHemant Agrawal <hemant.agrawal@nxp.com>", "Date": "Tue, 20 Dec 2016 02:23:42 +0530", "Message-ID": "<1482180853-18823-4-git-send-email-hemant.agrawal@nxp.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1482180853-18823-1-git-send-email-hemant.agrawal@nxp.com>", "References": "<1480875447-23680-1-git-send-email-hemant.agrawal@nxp.com>\n\t<1482180853-18823-1-git-send-email-hemant.agrawal@nxp.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; 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\n\tHelo=[az84smr01.freescale.net]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN1PR0301MB0737", "Subject": "[dpdk-dev] [PATCHv2 03/34] doc: add dpaa2 nic details", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds the NXP dpaa2 architecture and pmd details\nin the Network interfaces section.\n\nSigned-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>\n---\n MAINTAINERS | 7 +\n doc/guides/nics/dpaa2.rst | 596 +++++++++++++++++++++++++++++++++\n doc/guides/nics/features/dpaa2.ini | 8 +\n doc/guides/nics/index.rst | 1 +\n doc/guides/rel_notes/release_17_02.rst | 11 +\n 5 files changed, 623 insertions(+)\n create mode 100644 doc/guides/nics/dpaa2.rst\n create mode 100644 doc/guides/nics/features/dpaa2.ini", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex 26d9590..2f072b5 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -350,6 +350,13 @@ M: Alejandro Lucero <alejandro.lucero@netronome.com>\n F: drivers/net/nfp/\n F: doc/guides/nics/nfp.rst\n \n+NXP DPAA2 PMD\n+M: Hemant Agrawal <hemant.agrawal@nxp.com>\n+F: drivers/bus/fslmc/\n+F: drivers/common/dpaa2/\n+F: drivers/net/dpaa2/\n+F: doc/guides/nics/dpaa2.rst\n+\n QLogic bnx2x\n M: Sony Chacko <sony.chacko@qlogic.com>\n M: Harish Patil <harish.patil@qlogic.com>\ndiff --git a/doc/guides/nics/dpaa2.rst b/doc/guides/nics/dpaa2.rst\nnew file mode 100644\nindex 0000000..88c671b\n--- /dev/null\n+++ b/doc/guides/nics/dpaa2.rst\n@@ -0,0 +1,596 @@\n+.. BSD LICENSE\n+ Copyright (C) NXP. 2016.\n+ All rights reserved.\n+\n+ Redistribution and use in source and binary forms, with or without\n+ modification, are permitted provided that the following conditions\n+ are met:\n+\n+ * Redistributions of source code must retain the above copyright\n+ notice, this list of conditions and the following disclaimer.\n+ * Redistributions in binary form must reproduce the above copyright\n+ notice, this list of conditions and the following disclaimer in\n+ the documentation and/or other materials provided with the\n+ distribution.\n+ * Neither the name of NXP nor the names of its\n+ contributors may be used to endorse or promote products derived\n+ from this software without specific prior written permission.\n+\n+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+\n+DPAA2 Poll Mode Driver\n+======================\n+\n+The DPAA2 NIC PMD (**librte_pmd_dpaa2**) provides poll mode driver\n+support for the inbuilt NIC found in the **NXP DPAA2** SoC family.\n+\n+More information can be found at `NXP Official Website\n+<http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-arm-processors:QORIQ-ARM>`_.\n+\n+NXP DPAA2 (Data Path Acceleration Architecture Gen2)\n+----------------------------------------------------\n+\n+This section provides an overview of the NXP DPAA2 architecture\n+and how it is integrated into the DPDK.\n+\n+Contents summary\n+\n+- DPAA2 overview\n+- Overview of DPAA2 objects\n+- DPAA2 driver architecture overview\n+\n+DPAA2 Overview\n+~~~~~~~~~~~~~~\n+\n+Reference: `FSL MC BUS in Linux Kernel <https://www.kernel.org/doc/readme/drivers-staging-fsl-mc-README.txt>`_.\n+\n+DPAA2 is a hardware architecture designed for high-speed network\n+packet processing. DPAA2 consists of sophisticated mechanisms for\n+processing Ethernet packets, queue management, buffer management,\n+autonomous L2 switching, virtual Ethernet bridging, and accelerator\n+(e.g. crypto) sharing.\n+\n+A DPAA2 hardware component called the Management Complex (or MC) manages the\n+DPAA2 hardware resources. The MC provides an object-based abstraction for\n+software drivers to use the DPAA2 hardware.\n+\n+The MC uses DPAA2 hardware resources such as queues, buffer pools, and\n+network ports to create functional objects/devices such as network\n+interfaces, an L2 switch, or accelerator instances.\n+\n+The MC provides memory-mapped I/O command interfaces (MC portals)\n+which DPAA2 software drivers use to operate on DPAA2 objects:\n+\n+The diagram below shows an overview of the DPAA2 resource management\n+architecture:\n+\n+.. code-block:: console\n+\n+ +--------------------------------------+\n+ | OS |\n+ | DPAA2 drivers |\n+ | | |\n+ +-----------------------------|--------+\n+ |\n+ | (create,discover,connect\n+ | config,use,destroy)\n+ |\n+ DPAA2 |\n+ +------------------------| mc portal |-+\n+ | | |\n+ | +- - - - - - - - - - - - -V- - -+ |\n+ | | | |\n+ | | Management Complex (MC) | |\n+ | | | |\n+ | +- - - - - - - - - - - - - - - -+ |\n+ | |\n+ | Hardware Hardware |\n+ | Resources Objects |\n+ | --------- ------- |\n+ | -queues -DPRC |\n+ | -buffer pools -DPMCP |\n+ | -Eth MACs/ports -DPIO |\n+ | -network interface -DPNI |\n+ | profiles -DPMAC |\n+ | -queue portals -DPBP |\n+ | -MC portals ... |\n+ | ... |\n+ | |\n+ +--------------------------------------+\n+\n+The MC mediates operations such as create, discover,\n+connect, configuration, and destroy. Fast-path operations\n+on data, such as packet transmit/receive, are not mediated by\n+the MC and are done directly using memory mapped regions in\n+DPIO objects.\n+\n+Overview of DPAA2 Objects\n+~~~~~~~~~~~~~~~~~~~~~~~~~\n+\n+The section provides a brief overview of some key DPAA2 objects.\n+A simple scenario is described illustrating the objects involved\n+in creating a network interfaces.\n+\n+DPRC (Datapath Resource Container)\n+\n+ A DPRC is a container object that holds all the other\n+ types of DPAA2 objects. In the example diagram below there\n+ are 8 objects of 5 types (DPMCP, DPIO, DPBP, DPNI, and DPMAC)\n+ in the container.\n+\n+.. code-block:: console\n+\n+ +---------------------------------------------------------+\n+ | DPRC |\n+ | |\n+ | +-------+ +-------+ +-------+ +-------+ +-------+ |\n+ | | DPMCP | | DPIO | | DPBP | | DPNI | | DPMAC | |\n+ | +-------+ +-------+ +-------+ +---+---+ +---+---+ |\n+ | | DPMCP | | DPIO | |\n+ | +-------+ +-------+ |\n+ | | DPMCP | |\n+ | +-------+ |\n+ | |\n+ +---------------------------------------------------------+\n+\n+From the point of view of an OS, a DPRC behaves similar to a plug and\n+play bus, like PCI. DPRC commands can be used to enumerate the contents\n+of the DPRC, discover the hardware objects present (including mappable\n+regions and interrupts).\n+\n+.. code-block:: console\n+\n+ DPRC.1 (bus)\n+ |\n+ +--+--------+-------+-------+-------+\n+ | | | | |\n+ DPMCP.1 DPIO.1 DPBP.1 DPNI.1 DPMAC.1\n+ DPMCP.2 DPIO.2\n+ DPMCP.3\n+\n+Hardware objects can be created and destroyed dynamically, providing\n+the ability to hot plug/unplug objects in and out of the DPRC.\n+\n+A DPRC has a mappable MMIO region (an MC portal) that can be used\n+to send MC commands. It has an interrupt for status events (like\n+hotplug).\n+\n+All objects in a container share the same hardware \"isolation context\".\n+This means that with respect to an IOMMU the isolation granularity\n+is at the DPRC (container) level, not at the individual object\n+level.\n+\n+DPRCs can be defined statically and populated with objects\n+via a config file passed to the MC when firmware starts\n+it. There is also a Linux user space tool called \"restool\"\n+that can be used to create/destroy containers and objects\n+dynamically.\n+\n+DPAA2 Objects for an Ethernet Network Interface\n+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n+\n+A typical Ethernet NIC is monolithic-- the NIC device contains TX/RX\n+queuing mechanisms, configuration mechanisms, buffer management,\n+physical ports, and interrupts. DPAA2 uses a more granular approach\n+utilizing multiple hardware objects. Each object provides specialized\n+functions. Groups of these objects are used by software to provide\n+Ethernet network interface functionality. This approach provides\n+efficient use of finite hardware resources, flexibility, and\n+performance advantages.\n+\n+The diagram below shows the objects needed for a simple\n+network interface configuration on a system with 2 CPUs.\n+\n+.. code-block:: console\n+\n+ +---+---+ +---+---+\n+ CPU0 CPU1\n+ +---+---+ +---+---+\n+ | |\n+ +---+---+ +---+---+\n+ DPIO DPIO\n+ +---+---+ +---+---+\n+ \\ /\n+ \\ /\n+ \\ /\n+ +---+---+\n+ DPNI --- DPBP,DPMCP\n+ +---+---+\n+ |\n+ |\n+ +---+---+\n+ DPMAC\n+ +---+---+\n+ |\n+ port/PHY\n+\n+Below the objects are described. For each object a brief description\n+is provided along with a summary of the kinds of operations the object\n+supports and a summary of key resources of the object (MMIO regions\n+and IRQs).\n+\n+DPMAC (Datapath Ethernet MAC): represents an Ethernet MAC, a\n+hardware device that connects to an Ethernet PHY and allows\n+physical transmission and reception of Ethernet frames.\n+\n+- MMIO regions: none\n+- IRQs: DPNI link change\n+- commands: set link up/down, link config, get stats, IRQ config, enable, reset\n+\n+DPNI (Datapath Network Interface): contains TX/RX queues,\n+network interface configuration, and RX buffer pool configuration\n+mechanisms. The TX/RX queues are in memory and are identified by\n+queue number.\n+\n+- MMIO regions: none\n+- IRQs: link state\n+- commands: port config, offload config, queue config, parse/classify config, IRQ config, enable, reset\n+\n+DPIO (Datapath I/O): provides interfaces to enqueue and dequeue\n+packets and do hardware buffer pool management operations. The DPAA2\n+architecture separates the mechanism to access queues (the DPIO object)\n+from the queues themselves. The DPIO provides an MMIO interface to\n+enqueue/dequeue packets. To enqueue something a descriptor is written\n+to the DPIO MMIO region, which includes the target queue number.\n+There will typically be one DPIO assigned to each CPU. This allows all\n+CPUs to simultaneously perform enqueue/dequeued operations. DPIOs are\n+expected to be shared by different DPAA2 drivers.\n+\n+- MMIO regions: queue operations, buffer management\n+- IRQs: data availability, congestion notification, buffer pool depletion\n+- commands: IRQ config, enable, reset\n+\n+DPBP (Datapath Buffer Pool): represents a hardware buffer\n+pool.\n+\n+- MMIO regions: none\n+- IRQs: none\n+- commands: enable, reset\n+\n+DPMCP (Datapath MC Portal): provides an MC command portal.\n+Used by drivers to send commands to the MC to manage\n+objects.\n+\n+- MMIO regions: MC command portal\n+- IRQs: command completion\n+- commands: IRQ config, enable, reset\n+\n+Object Connections\n+~~~~~~~~~~~~~~~~~~\n+\n+Some objects have explicit relationships that must\n+be configured:\n+\n+- DPNI <--> DPMAC\n+- DPNI <--> DPNI\n+- DPNI <--> L2-switch-port\n+\n+A DPNI must be connected to something such as a DPMAC,\n+another DPNI, or L2 switch port. The DPNI connection\n+is made via a DPRC command.\n+\n+.. code-block:: console\n+\n+ +-------+ +-------+\n+ | DPNI | | DPMAC |\n+ +---+---+ +---+---+\n+ | |\n+ +==========+\n+\n+- DPNI <--> DPBP\n+\n+A network interface requires a 'buffer pool' (DPBP object) which provides\n+a list of pointers to memory where received Ethernet data is to be copied.\n+The Ethernet driver configures the DPBPs associated with the network\n+interface.\n+\n+Interrupts\n+~~~~~~~~~~\n+\n+All interrupts generated by DPAA2 objects are message\n+interrupts. At the hardware level message interrupts\n+generated by devices will normally have 3 components--\n+1) a non-spoofable 'device-id' expressed on the hardware\n+bus, 2) an address, 3) a data value.\n+\n+In the case of DPAA2 devices/objects, all objects in the\n+same container/DPRC share the same 'device-id'.\n+For ARM-based SoC this is the same as the stream ID.\n+\n+\n+DPAA2 DPDK - Poll Mode Driver Overview\n+--------------------------------------\n+\n+This section provides an overview of the drivers for\n+DPAA2-- 1) the bus driver and associated \"DPAA2 infrastructure\"\n+drivers and 2) functional object drivers (such as Ethernet).\n+\n+As described previously, a DPRC is a container that holds the other\n+types of DPAA2 objects. It is functionally similar to a plug-and-play\n+bus controller.\n+\n+Each object in the DPRC is a Linux \"device\" and is bound to a driver.\n+The diagram below shows the dpaa2 drivers involved in a networking\n+scenario and the objects bound to each driver. A brief description\n+of each driver follows.\n+\n+.. code-block: console\n+\n+\n+ +------------+\n+ | DPDK DPAA2 |\n+ | PMD |\n+ +------------+ +------------+\n+ | Ethernet |.......| Mempool |\n+ . . . . . . . . . | (DPNI) | | (DPBP) |\n+ . +---+---+----+ +-----+------+\n+ . ^ | .\n+ . | |<enqueue, .\n+ . | | dequeue> .\n+ . | | .\n+ . +---+---V----+ .\n+ . . . . . . . . . . .| DPIO driver| .\n+ . . | (DPIO) | .\n+ . . +-----+------+ .\n+ . . | QBMAN | .\n+ . . | Driver | .\n+ +----+------+-------+ +-----+----- | .\n+ | dpaa2 bus | | .\n+ | VFIO fslmc-bus |....................|.....................\n+ | | |\n+ | /bus/fslmc | |\n+ +-------------------+ |\n+ |\n+ ========================== HARDWARE =====|=======================\n+ DPIO\n+ |\n+ DPNI---DPBP\n+ |\n+ DPMAC\n+ |\n+ PHY\n+ =========================================|========================\n+\n+\n+A brief description of each driver is provided below.\n+\n+DPAA2 bus driver\n+~~~~~~~~~~~~~~~~\n+\n+The DPAA2 bus driver is a rte_bus driver which scans the fsl-mc bus.\n+Key functions include:\n+\n+- Reading the container and setting up vfio group\n+- Scanning and parsing the various MC objects and adding them to\n+ their respective device list.\n+\n+Additionally, it also provides the object driver for generic MC objects.\n+\n+DPIO driver\n+~~~~~~~~~~~\n+\n+The DPIO driver is bound to DPIO objects and provides services that allow\n+other drivers such as the Ethernet driver to enqueue and dequeue data for\n+their respective objects.\n+Key services include:\n+\n+- Data availability notifications\n+- Hardware queuing operations (enqueue and dequeue of data)\n+- Hardware buffer pool management\n+\n+To transmit a packet the Ethernet driver puts data on a queue and\n+invokes a DPIO API. For receive, the Ethernet driver registers\n+a data availability notification callback. To dequeue a packet\n+a DPIO API is used.\n+\n+There is typically one DPIO object per physical CPU for optimum\n+performance, allowing different CPUs to simultaneously enqueue\n+and dequeue data.\n+\n+The DPIO driver operates on behalf of all DPAA2 drivers\n+active -- Ethernet, crypto, compression, etc.\n+\n+DPBP based Mempool driver\n+~~~~~~~~~~~~~~~~~~~~~~~~~\n+\n+The DPBP driver is bound to a DPBP objects and provides sevices to\n+create a hardware offloaded packet buffer mempool.\n+\n+DPAA2 NIC Driver\n+~~~~~~~~~~~~~~~~\n+The Ethernet driver is bound to a DPNI and implements the kernel\n+interfaces needed to connect the DPAA2 network interface to\n+the network stack.\n+\n+Each DPNI corresponds to a DPDK network interface.\n+\n+Features\n+^^^^^^^^\n+\n+Features of the DPAA2 PMD are:\n+\n+- Multiple queues for TX and RX\n+- Receive Side Scaling (RSS)\n+- Packet type information\n+- Checksum offload\n+- Promiscuous mode\n+\n+Supported DPAA2 SoCs\n+--------------------\n+\n+- LS2080A/LS2040A\n+- LS2084A/LS2044A\n+- LS2088A/LS2048A\n+- LS1088A/LS1048A\n+\n+Prerequisites\n+-------------\n+\n+This driver relies on external libraries and kernel drivers for resources\n+allocations and initialization. The following dependencies are not part of\n+DPDK and must be installed separately:\n+\n+- **NXP Linux SDK**\n+\n+ NXP Linux software development kit (SDK) includes support for family\n+ of QorIQ® ARM-Architecture-based system on chip (SoC) processors\n+ and corresponding boards.\n+\n+ It includes the Linux board support packages (BSPs) for NXP SoCs,\n+ a fully operational tool chain, kernel and board specific modules.\n+\n+ SDK and related information can be obtained from: `NXP QorIQ SDK <http://www.nxp.com/products/software-and-tools/run-time-software/linux-sdk/linux-sdk-for-qoriq-processors:SDKLINUX>`_.\n+\n+- **DPDK Helper Scripts**\n+\n+ DPAA2 based resources can be configured easily with the help of ready scripts\n+ as provided in the DPDK helper repository.\n+\n+ `DPDK Helper Scripts <https://github.com/qoriq-open-source/dpdk-helper>`_.\n+\n+Currently supported by DPDK:\n+\n+- NXP SDK **2.0+**.\n+- MC Firmware version **10.0.0** and higher.\n+- Supported architectures: **arm64 LE**.\n+\n+- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic DPDK environment.\n+\n+Pre-Installation Configuration\n+------------------------------\n+\n+Config File Options\n+~~~~~~~~~~~~~~~~~~~\n+\n+The following options can be modified in the ``config`` file.\n+Please note that enabling debugging options may affect system performance.\n+\n+- ``CONFIG_RTE_LIBRTE_FSLMC_BUS`` (default ``n``)\n+\n+ By default it is enabled only for defconfig_arm64-dpaa2-* config.\n+ Toggle compilation of the ``librte_pmd_fslmcbus`` driver.\n+\n+- ``CONFIG_RTE_LIBRTE_DPAA2_PMD`` (default ``n``)\n+\n+ By default it is enabled only for defconfig_arm64-dpaa2-* config.\n+ Toggle compilation of the ``librte_pmd_dpaa2`` driver.\n+\n+- ``CONFIG_RTE_LIBRTE_DPAA2_COMMON`` (default ``n``)\n+\n+ By default it is enabled only for defconfig_arm64-dpaa2-* config.\n+ Toggle compilation of the ``librte_pmd_dpaa2_qbman``,\n+ and ``librte_pmd_dpaa2_dpio`` driver.\n+\n+- ``CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER`` (default ``n``)\n+\n+ Toggle display of generic debugging messages\n+\n+- ``CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA`` (default ``y``)\n+\n+ Toggle to use physical address vs virtual address for hardware accelerators.\n+\n+- ``CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT`` (default ``n``)\n+\n+ Toggle display of initialization related messages.\n+\n+- ``CONFIG_RTE_LIBRTE_DPAA2_DEBUG_RX`` (default ``n``)\n+\n+ Toggle display of receive fast path run-time message\n+\n+- ``CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX`` (default ``n``)\n+\n+ Toggle display of transmit fast path run-time message\n+\n+- ``CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX_FREE`` (default ``n``)\n+\n+ Toggle display of transmit fast path buffer free run-time message\n+\n+\n+Driver Compilation\n+~~~~~~~~~~~~~~~~~~\n+\n+To compile the DPAA2 PMD for Linux arm64 gcc target, run the\n+following ``make`` command:\n+\n+.. code-block:: console\n+\n+ cd <DPDK-source-directory>\n+ make config T=arm64-dpaa2-linuxapp-gcc install\n+\n+.. _dpaa2_testpmd_example:\n+\n+Running testpmd\n+~~~~~~~~~~~~~~~\n+\n+This section demonstrates how to launch ``testpmd`` with DPAA2 device\n+managed by ``librte_pmd_dpaa2`` in the Linux operating system.\n+\n+#. Configure the resource container,\n+\n+Configure resources in MC and create the DPRC container\n+\n+ .. code-block:: console\n+\n+ export the DPRC container\n+ e.g. export DPRCT=dprc.2\n+\n+#. Start ``testpmd`` with basic parameters:\n+\n+ .. code-block:: console\n+\n+ ./arm64-dpaa2-linuxapp-gcc/testpmd -c 0xff -n 1 \\\n+ -- -i --portmask=0x3 --nb-cores=1 --no-flush-rx\n+\n+ Example output:\n+\n+ .. code-block:: console\n+\n+ ...\n+\n+ EAL: Registered [pci] bus.\n+ EAL: Registered [fslmc] bus.\n+ EAL: Detected 8 lcore(s)\n+ EAL: Probing VFIO support...\n+ EAL: VFIO support initialized\n+ .....\n+ PMD: DPAA2: Processing Container = dprc.2\n+ EAL: fslmc: DPRC contains = 51 devices\n+ EAL: fslmc: Bus scan completed\n+ .....\n+ Configuring Port 0 (socket 0)\n+ Port 0: 00:00:00:00:00:01\n+ Configuring Port 1 (socket 0)\n+ Port 1: 00:00:00:00:00:02\n+ ....\n+ Checking link statuses...\n+ Port 0 Link Up - speed 10000 Mbps - full-duplex\n+ Port 1 Link Up - speed 10000 Mbps - full-duplex\n+ Done\n+ testpmd>\n+\n+\n+Limitations\n+-----------\n+\n+Platform Requirement\n+~~~~~~~~~~~~~~~~~~~~\n+DPAA2 drivers for DPDK can only work on NXP SoCs as listed in the\n+``Supported DPAA2 SoCs``.\n+\n+Maximum packet length\n+~~~~~~~~~~~~~~~~~~~~~\n+\n+The DPAA2 SoC family support a maximum of a 10240 jumbo frame. The value\n+is fixed and cannot be changed. So, even when the ``rxmode.max_rx_pkt_len``\n+member of ``struct rte_eth_conf`` is set to a value lower than 10240, frames\n+up to 10240 bytes can still reach the host interface.\ndiff --git a/doc/guides/nics/features/dpaa2.ini b/doc/guides/nics/features/dpaa2.ini\nnew file mode 100644\nindex 0000000..b2ad6ec\n--- /dev/null\n+++ b/doc/guides/nics/features/dpaa2.ini\n@@ -0,0 +1,8 @@\n+;\n+; Supported features of the 'dpaa2' network poll mode driver.\n+;\n+; Refer to default.ini for the full list of available PMD features.\n+;\n+[Features]\n+ARMv8 = Y\n+Usage doc = Y\ndiff --git a/doc/guides/nics/index.rst b/doc/guides/nics/index.rst\nindex 92d56a5..fa01662 100644\n--- a/doc/guides/nics/index.rst\n+++ b/doc/guides/nics/index.rst\n@@ -39,6 +39,7 @@ Network Interface Controller Drivers\n bnx2x\n bnxt\n cxgbe\n+ dpaa2\n e1000em\n ena\n enic\ndiff --git a/doc/guides/rel_notes/release_17_02.rst b/doc/guides/rel_notes/release_17_02.rst\nindex 3b65038..3e742b3 100644\n--- a/doc/guides/rel_notes/release_17_02.rst\n+++ b/doc/guides/rel_notes/release_17_02.rst\n@@ -38,6 +38,17 @@ New Features\n Also, make sure to start the actual text at the margin.\n =========================================================\n \n+* **Added a new driver for NXP DPAA2 - FSLMC bus.**\n+\n+ Added the new bus \"fslmc\" driver for NXP DPAA2 devices. See the\n+ \"Network Interface Controller Drivers\" document for more details on this new\n+ driver.\n+\n+* **Added a new driver for NXP DPAA2 Network PMD.**\n+\n+ Added the new \"dpaa2\" net driver for NXP DPAA2 devices. See the\n+ \"Network Interface Controller Drivers\" document for more details on this new\n+ driver.\n \n Resolved Issues\n ---------------\n", "prefixes": [ "dpdk-dev", "PATCHv2", "03/34" ] }