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GET /api/patches/14738/?format=api
{ "id": 14738, "url": "http://patches.dpdk.org/api/patches/14738/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1468248045-3495-4-git-send-email-david.marchand@6wind.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1468248045-3495-4-git-send-email-david.marchand@6wind.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1468248045-3495-4-git-send-email-david.marchand@6wind.com", "date": "2016-07-11T14:40:38", "name": "[dpdk-dev,v4,03/10] net/i40e: move PCI device ids to the driver", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "c2afa530f3a66e600de7b0d9bad047e008484eda", "submitter": { "id": 3, "url": "http://patches.dpdk.org/api/people/3/?format=api", "name": "David Marchand", "email": "david.marchand@6wind.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1468248045-3495-4-git-send-email-david.marchand@6wind.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/14738/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/14738/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id BCF053794;\n\tMon, 11 Jul 2016 16:41:04 +0200 (CEST)", "from mail-wm0-f48.google.com (mail-wm0-f48.google.com\n\t[74.125.82.48]) by dpdk.org (Postfix) with ESMTP id 06918282\n\tfor <dev@dpdk.org>; Mon, 11 Jul 2016 16:41:04 +0200 (CEST)", "by mail-wm0-f48.google.com with SMTP id o80so54027231wme.1\n\tfor <dev@dpdk.org>; Mon, 11 Jul 2016 07:41:04 -0700 (PDT)", "from gloops.dev.6wind.com (guy78-3-82-239-227-177.fbx.proxad.net.\n\t[82.239.227.177]) by smtp.gmail.com with ESMTPSA id\n\th7sm158371wji.47.2016.07.11.07.41.01\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tMon, 11 Jul 2016 07:41:02 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=6wind-com.20150623.gappssmtp.com; s=20150623;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=YBiw9iTBLcp2WtasCJBaxrv+t5hOaG0Bdo9e+xIHunE=;\n\tb=q5UFKeZ1+h3PDlaTkDyeRV1OvVI75f8UQUFtMYL4sq6ilqDKm8xJtvnjzLYCFsXcLd\n\tlmot7x23z7EVJHPiBRDLC6MNcG0o/u/z/LdUGrxbqIhHo79NzfM67vY+jCdgWseqlMf9\n\t4RxS4Y1rUK1zjaCsQIhTluaS9Ftr93Cm0f4s26uM7CdfhUlEwrXaNnYVzOkOF1hPiER4\n\tpnh3/Jx3dom18lwuIgmc2k75Qla3XnK5/wLY4WPYdlJb5937Xj+LqhvjVzejEqC5Utdj\n\tRHgm6zhVJWnZ1oBBelH50xrCWD1iOJq876q1WckfCteLKtJSwyFNWosXzMY+gtXjeZNL\n\tWLzA==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20130820;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=YBiw9iTBLcp2WtasCJBaxrv+t5hOaG0Bdo9e+xIHunE=;\n\tb=bxi5HgCJdWyKuwNQiz7BjCYAf7YV3xPk1vZaWK91oQ4MXk6LzyykaLQhRqUIty/ShK\n\t17FgyMXtSEgYGwzkqaoAQQThYgAJzrilerooIqVxlfnsqyi2Nz+41mo+U+1JjJH+VbbS\n\t6a0YMUIfV5oBVY0aseYeIPVs3pOOnS5ynHhivT1hbWW7Z8syviugsX7TPCC6rSgr9Z83\n\twyrel4w9G+Ber0srfmpt/D8poJC5f84RvBgjVvBvm8jDrotUURdcO1QjJDKe3YMua6AY\n\tRENJ2276J0lt0gGXaWmQW2HMwatudhpIeZlc0qjk0cZpoWNQIGOQFIQH9oeoyKbrLzXJ\n\tXgCQ==", "X-Gm-Message-State": "ALyK8tKurGhCFBN/kWEeyYByA9/VuxEifTWf7tQiio27McexyoHfmCQeya6j6faqMZIl9mW5", "X-Received": "by 10.28.127.198 with SMTP id a189mr19175615wmd.16.1468248063755;\n\tMon, 11 Jul 2016 07:41:03 -0700 (PDT)", "From": "David Marchand <david.marchand@6wind.com>", "To": "dev@dpdk.org", "Cc": "bruce.richardson@intel.com, thomas.monjalon@6wind.com,\n\tnhorman@tuxdriver.com, pmatilai@redhat.com,\n\tchristian.ehrhardt@canonical.com, stephen@networkplumber.com,\n\tHelin Zhang <helin.zhang@intel.com>, Jingjing Wu <jingjing.wu@intel.com>", "Date": "Mon, 11 Jul 2016 16:40:38 +0200", "Message-Id": "<1468248045-3495-4-git-send-email-david.marchand@6wind.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1468248045-3495-1-git-send-email-david.marchand@6wind.com>", "References": "<1461156236-25349-1-git-send-email-david.marchand@6wind.com>\n\t<1468248045-3495-1-git-send-email-david.marchand@6wind.com>", "Subject": "[dpdk-dev] [PATCH v4 03/10] net/i40e: move PCI device ids to the\n\tdriver", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Reused defines from the driver.\nUsed RTE_PCI_DEVICE in place of RTE_PCI_DEV_ID_DECL* stuff.\n\nSigned-off-by: David Marchand <david.marchand@6wind.com>\n---\nChanges since v3\n- added new pci ids from HEAD\n\n---\n drivers/net/i40e/i40e_ethdev.c | 25 +++++++--\n drivers/net/i40e/i40e_ethdev_vf.c | 9 ++--\n lib/librte_eal/common/include/rte_pci_dev_ids.h | 70 -------------------------\n 3 files changed, 28 insertions(+), 76 deletions(-)", "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 31c2e11..daac236 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -454,9 +454,28 @@ static void i40e_set_default_mac_addr(struct rte_eth_dev *dev,\n static int i40e_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);\n \n static const struct rte_pci_id pci_id_i40e_map[] = {\n-#define RTE_PCI_DEV_ID_DECL_I40E(vend, dev) {RTE_PCI_DEVICE(vend, dev)},\n-#include \"rte_pci_dev_ids.h\"\n-{ .vendor_id = 0, /* sentinel */ },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_XL710) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QEMU) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_B) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_C) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_A) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_B) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_C) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_20G_KR2) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_20G_KR2_A) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T4) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_B) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_SFP28) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_X722) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_X722) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_X722) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_1G_BASE_T_X722) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T_X722) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_I_X722) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_I_X722) },\n+\t{ .vendor_id = 0, /* sentinel */ },\n };\n \n static const struct eth_dev_ops i40e_eth_dev_ops = {\ndiff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c\nindex 31547db..a616ae0 100644\n--- a/drivers/net/i40e/i40e_ethdev_vf.c\n+++ b/drivers/net/i40e/i40e_ethdev_vf.c\n@@ -1110,9 +1110,12 @@ i40evf_get_link_status(struct rte_eth_dev *dev, struct rte_eth_link *link)\n }\n \n static const struct rte_pci_id pci_id_i40evf_map[] = {\n-#define RTE_PCI_DEV_ID_DECL_I40EVF(vend, dev) {RTE_PCI_DEVICE(vend, dev)},\n-#include \"rte_pci_dev_ids.h\"\n-{ .vendor_id = 0, /* sentinel */ },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },\n+\t{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF_HV) },\n+\t{ .vendor_id = 0, /* sentinel */ },\n };\n \n static inline int\ndiff --git a/lib/librte_eal/common/include/rte_pci_dev_ids.h b/lib/librte_eal/common/include/rte_pci_dev_ids.h\nindex 1b22adb..30fcdee 100644\n--- a/lib/librte_eal/common/include/rte_pci_dev_ids.h\n+++ b/lib/librte_eal/common/include/rte_pci_dev_ids.h\n@@ -73,14 +73,6 @@\n #define RTE_PCI_DEV_ID_DECL_IXGBEVF(vend, dev)\n #endif\n \n-#ifndef RTE_PCI_DEV_ID_DECL_I40E\n-#define RTE_PCI_DEV_ID_DECL_I40E(vend, dev)\n-#endif\n-\n-#ifndef RTE_PCI_DEV_ID_DECL_I40EVF\n-#define RTE_PCI_DEV_ID_DECL_I40EVF(vend, dev)\n-#endif\n-\n #ifndef RTE_PCI_DEV_ID_DECL_VIRTIO\n #define RTE_PCI_DEV_ID_DECL_VIRTIO(vend, dev)\n #endif\n@@ -341,52 +333,6 @@ RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_KR)\n RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BYPASS)\n #endif\n \n-/*************** Physical I40E devices from i40e_type.h *****************/\n-\n-#define I40E_DEV_ID_SFP_XL710 0x1572\n-#define I40E_DEV_ID_QEMU 0x1574\n-#define I40E_DEV_ID_KX_B 0x1580\n-#define I40E_DEV_ID_KX_C 0x1581\n-#define I40E_DEV_ID_QSFP_A 0x1583\n-#define I40E_DEV_ID_QSFP_B 0x1584\n-#define I40E_DEV_ID_QSFP_C 0x1585\n-#define I40E_DEV_ID_10G_BASE_T 0x1586\n-#define I40E_DEV_ID_20G_KR2 0x1587\n-#define I40E_DEV_ID_20G_KR2_A 0x1588\n-#define I40E_DEV_ID_10G_BASE_T4 0x1589\n-#define I40E_DEV_ID_25G_B 0x158A\n-#define I40E_DEV_ID_25G_SFP28 0x158B\n-#define I40E_DEV_ID_X722_A0 0x374C\n-#define I40E_DEV_ID_KX_X722 0x37CE\n-#define I40E_DEV_ID_QSFP_X722 0x37CF\n-#define I40E_DEV_ID_SFP_X722 0x37D0\n-#define I40E_DEV_ID_1G_BASE_T_X722 0x37D1\n-#define I40E_DEV_ID_10G_BASE_T_X722 0x37D2\n-#define I40E_DEV_ID_SFP_I_X722 0x37D3\n-#define I40E_DEV_ID_QSFP_I_X722 0x37D4\n-\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_SFP_XL710)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QEMU)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_KX_B)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_KX_C)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QSFP_A)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QSFP_B)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QSFP_C)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_10G_BASE_T)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_20G_KR2)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_20G_KR2_A)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_10G_BASE_T4)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_25G_B)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_25G_SFP28)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_X722_A0)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_KX_X722)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QSFP_X722)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_SFP_X722)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_1G_BASE_T_X722)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_10G_BASE_T_X722)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_SFP_I_X722)\n-RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QSFP_I_X722)\n-\n /*************** Physical FM10K devices from fm10k_type.h ***************/\n \n #define FM10K_DEV_ID_PF 0x15A4\n@@ -431,20 +377,6 @@ RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_VF_HV)\n RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_VF)\n RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV)\n \n-/****************** Virtual I40E devices from i40e_type.h ********************/\n-\n-#define I40E_DEV_ID_VF 0x154C\n-#define I40E_DEV_ID_VF_HV 0x1571\n-#define I40E_DEV_ID_X722_A0_VF 0x374D\n-#define I40E_DEV_ID_X722_VF 0x37CD\n-#define I40E_DEV_ID_X722_VF_HV 0x37D9\n-\n-RTE_PCI_DEV_ID_DECL_I40EVF(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_VF)\n-RTE_PCI_DEV_ID_DECL_I40EVF(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_VF_HV)\n-RTE_PCI_DEV_ID_DECL_I40EVF(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_X722_A0_VF)\n-RTE_PCI_DEV_ID_DECL_I40EVF(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_X722_VF)\n-RTE_PCI_DEV_ID_DECL_I40EVF(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_X722_VF_HV)\n-\n /****************** Virtio devices from virtio.h ******************/\n \n #define QUMRANET_DEV_ID_VIRTIO 0x1000\n@@ -549,8 +481,6 @@ RTE_PCI_DEV_ID_DECL_BNXT(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314)\n #undef RTE_PCI_DEV_ID_DECL_IGBVF\n #undef RTE_PCI_DEV_ID_DECL_IXGBE\n #undef RTE_PCI_DEV_ID_DECL_IXGBEVF\n-#undef RTE_PCI_DEV_ID_DECL_I40E\n-#undef RTE_PCI_DEV_ID_DECL_I40EVF\n #undef RTE_PCI_DEV_ID_DECL_VIRTIO\n #undef RTE_PCI_DEV_ID_DECL_VMXNET3\n #undef RTE_PCI_DEV_ID_DECL_FM10K\n", "prefixes": [ "dpdk-dev", "v4", "03/10" ] }