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GET /api/patches/139496/?format=api
{ "id": 139496, "url": "http://patches.dpdk.org/api/patches/139496/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240418165128.17261-1-arkadiuszx.kusztal@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240418165128.17261-1-arkadiuszx.kusztal@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240418165128.17261-1-arkadiuszx.kusztal@intel.com", "date": "2024-04-18T16:51:28", "name": "common/qat: add legacy algorithm option", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f84a9c1b9d4d8041a7a81ea671371deb4fe2c669", "submitter": { "id": 452, "url": "http://patches.dpdk.org/api/people/452/?format=api", "name": "Arkadiusz Kusztal", "email": "arkadiuszx.kusztal@intel.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240418165128.17261-1-arkadiuszx.kusztal@intel.com/mbox/", "series": [ { "id": 31784, "url": "http://patches.dpdk.org/api/series/31784/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31784", "date": "2024-04-18T16:51:28", "name": "common/qat: add legacy algorithm option", "version": 1, "mbox": "http://patches.dpdk.org/series/31784/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/139496/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/139496/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6324A43EA6;\n\tThu, 18 Apr 2024 18:51:36 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id BC68740042;\n\tThu, 18 Apr 2024 18:51:35 +0200 (CEST)", "from mgamail.intel.com (mgamail.intel.com [198.175.65.19])\n by mails.dpdk.org (Postfix) with ESMTP id 080D440041\n for <dev@dpdk.org>; Thu, 18 Apr 2024 18:51:33 +0200 (CEST)", "from orviesa004.jf.intel.com ([10.64.159.144])\n by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 18 Apr 2024 09:51:32 -0700", "from silpixa00400308.ir.intel.com ([10.237.214.154])\n by orviesa004.jf.intel.com with ESMTP; 18 Apr 2024 09:51:30 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1713459094; x=1744995094;\n h=from:to:cc:subject:date:message-id;\n bh=KTF8jYCJf/s9bUSTme/VF3JnNn9vVjOkPKTDQTop6RY=;\n b=EZedFDArEuP63oTJ6BZbXvCeGySeHyCaH+C5xq3ZFj8cQ48GCBb02Hae\n JHHTJx88tV1MUsVg6vrCU7NiktUKvFOb8LyJWJyUPFOXidkiCsafV+3s1\n vbjPB/C+RQCbqHZkI7FQT20+5coyGzoH8TWNFobuRVv7+bPD2aCNZFxGC\n JwYItztfI3fHgVL9FiX/HRoi3aZivASpif5kn7mxjVCWVJ5TQwZgDPKzj\n Kw3FTo3sf+ypwU2VSKSB4FROH/igB+LHuzffVJqidJwJaqZWKzn0stxnk\n jlOdNSaSJMGMhtuhX1P1GoBzNIpvqF4FKO5yv6rTcmNSHX2Wxx0QJjqJD g==;", "X-CSE-ConnectionGUID": [ "aANOfxq+QvWmoaRFCBlKIQ==", "bVZ9VsqDR+GQBbawoKNixw==" ], "X-CSE-MsgGUID": [ "VAy4rXlsQfORK6Uqv9esBA==", "b508LvKBSZmp9PjOXUuJ5Q==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,11047\"; a=\"8895785\"", "E=Sophos;i=\"6.07,212,1708416000\";\n d=\"scan'208\";a=\"8895785\"", "E=Sophos;i=\"6.07,212,1708416000\"; d=\"scan'208\";a=\"27855615\"" ], "X-ExtLoop1": "1", "From": "Arkadiusz Kusztal <arkadiuszx.kusztal@intel.com>", "To": "dev@dpdk.org", "Cc": "gakhil@marvell.com, ciara.power@intel.com,\n Arkadiusz Kusztal <arkadiuszx.kusztal@intel.com>", "Subject": "[PATCH] common/qat: add legacy algorithm option", "Date": "Thu, 18 Apr 2024 17:51:28 +0100", "Message-Id": "<20240418165128.17261-1-arkadiuszx.kusztal@intel.com>", "X-Mailer": "git-send-email 2.17.1", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "This commit adds legacy algorithms flag to the qat_device\nstruct. This will allow handling this flag within the device\nitself, and not using the global variable.\n\nSigned-off-by: Arkadiusz Kusztal <arkadiuszx.kusztal@intel.com>\n---\n drivers/common/qat/qat_common.h | 9 +++++++++\n drivers/common/qat/qat_device.c | 4 ++--\n drivers/common/qat/qat_device.h | 6 ++----\n drivers/common/qat/qat_qp.c | 3 ++-\n drivers/common/qat/qat_qp.h | 3 ++-\n drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 10 +++++-----\n drivers/crypto/qat/dev/qat_sym_pmd_gen1.c | 2 +-\n drivers/crypto/qat/qat_asym.c | 7 ++++---\n drivers/crypto/qat/qat_sym.c | 5 +++--\n drivers/crypto/qat/qat_sym_session.c | 10 +++++-----\n 10 files changed, 35 insertions(+), 24 deletions(-)", "diff": "diff --git a/drivers/common/qat/qat_common.h b/drivers/common/qat/qat_common.h\nindex 6d0f4aefd5..97828e2c67 100644\n--- a/drivers/common/qat/qat_common.h\n+++ b/drivers/common/qat/qat_common.h\n@@ -19,6 +19,15 @@\n \n extern const char *const *qat_cmdline_defines[];\n \n+struct qat_options {\n+\tuint32_t slice_map;\n+\t/**< Map of the crypto and compression slices */\n+\tuint16_t has_wireless_slice;\n+\t/**< Wireless Slices supported */\n+\tuint8_t legacy_alg;\n+\t/**< are legacy algorithm supported */\n+};\n+\n enum qat_device_gen {\n \tQAT_GEN1,\n \tQAT_GEN2,\ndiff --git a/drivers/common/qat/qat_device.c b/drivers/common/qat/qat_device.c\nindex 666e2bb995..bb107bc1f9 100644\n--- a/drivers/common/qat/qat_device.c\n+++ b/drivers/common/qat/qat_device.c\n@@ -331,7 +331,7 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev)\n \tqat_pci_devs[qat_dev_id].pci_dev = pci_dev;\n \n \tif (wireless_slice_support(pci_dev->id.device_id))\n-\t\tqat_dev->has_wireless_slice = 1;\n+\t\tqat_dev->options.has_wireless_slice = 1;\n \n \tops_hw = qat_dev_hw_spec[qat_dev->qat_dev_gen];\n \tNOT_NULL(ops_hw->qat_dev_get_misc_bar, goto error,\n@@ -372,7 +372,7 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev)\n \tNOT_NULL(ops_hw->qat_dev_get_slice_map, goto error,\n \t\t\"QAT internal error! Read slice function not set, gen : %d\",\n \t\tqat_dev_gen);\n-\tif (ops_hw->qat_dev_get_slice_map(&qat_dev->slice_map, pci_dev) < 0) {\n+\tif (ops_hw->qat_dev_get_slice_map(&qat_dev->options.slice_map, pci_dev) < 0) {\n \t\tRTE_LOG(ERR, EAL,\n \t\t\t\"Cannot read slice configuration\\n\");\n \t\tgoto error;\ndiff --git a/drivers/common/qat/qat_device.h b/drivers/common/qat/qat_device.h\nindex 9275156ef8..c1de1248d2 100644\n--- a/drivers/common/qat/qat_device.h\n+++ b/drivers/common/qat/qat_device.h\n@@ -122,14 +122,12 @@ struct qat_pci_device {\n \t/**< Address of misc bar */\n \tvoid *dev_private;\n \t/**< Per generation specific information */\n-\tuint32_t slice_map;\n-\t/**< Map of the crypto and compression slices */\n-\tuint16_t has_wireless_slice;\n-\t/**< Wireless Slices supported */\n \tchar *command_line;\n \t/**< Map of the crypto and compression slices */\n \tvoid *pmd[QAT_MAX_SERVICES];\n \t/**< link back to pmd private data */\n+\tstruct qat_options options;\n+\t/**< qat device options */\n };\n \n struct qat_gen_hw_data {\ndiff --git a/drivers/common/qat/qat_qp.c b/drivers/common/qat/qat_qp.c\nindex f95dd33375..7bec9abeb5 100644\n--- a/drivers/common/qat/qat_qp.c\n+++ b/drivers/common/qat/qat_qp.c\n@@ -634,7 +634,8 @@ qat_enqueue_op_burst(void *qp, qat_op_build_request_t op_build_request,\n \twhile (nb_ops_sent != nb_ops_possible) {\n \t\tret = op_build_request(*ops, base_addr + tail,\n \t\t\t\ttmp_qp->op_cookies[tail >> queue->trailz],\n-\t\t\t\ttmp_qp->opaque, tmp_qp->qat_dev_gen);\n+\t\t\t\ttmp_qp->opaque, tmp_qp->qat_dev_gen,\n+\t\t\t\ttmp_qp->qat_dev->options);\n \n \t\tif (ret != 0) {\n \t\t\ttmp_qp->stats.enqueue_err_count++;\ndiff --git a/drivers/common/qat/qat_qp.h b/drivers/common/qat/qat_qp.h\nindex ae18fb942e..8908b57fa3 100644\n--- a/drivers/common/qat/qat_qp.h\n+++ b/drivers/common/qat/qat_qp.h\n@@ -57,7 +57,8 @@ struct qat_queue {\n * - EINVAL if error\n **/\n typedef int (*qat_op_build_request_t)(void *in_op, uint8_t *out_msg,\n-\t\tvoid *op_cookie, uint64_t *opaque, enum qat_device_gen dev_gen);\n+\t\tvoid *op_cookie, uint64_t *opaque, enum qat_device_gen dev_gen,\n+\t\tstruct qat_options options);\n \n /**\n * Type define qat_op_dequeue_t function pointer, passed in as argument\ndiff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c\nindex 907c3ce3e2..34a1b9002c 100644\n--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c\n+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c\n@@ -265,7 +265,7 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_private *internals,\n \t\t\tcontinue;\n \t\t}\n \n-\t\tif (internals->qat_dev->has_wireless_slice && (\n+\t\tif (internals->qat_dev->options.has_wireless_slice && (\n \t\t\tcheck_auth_capa(&capabilities[iter],\n \t\t\t\tRTE_CRYPTO_AUTH_KASUMI_F9) ||\n \t\t\tcheck_cipher_capa(&capabilities[iter],\n@@ -279,7 +279,7 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_private *internals,\n \t\tmemcpy(addr + curr_capa, capabilities + iter,\n \t\t\tsizeof(struct rte_cryptodev_capabilities));\n \n-\t\tif (internals->qat_dev->has_wireless_slice && (\n+\t\tif (internals->qat_dev->options.has_wireless_slice && (\n \t\t\tcheck_auth_capa(&capabilities[iter],\n \t\t\t\tRTE_CRYPTO_AUTH_ZUC_EIA3))) {\n \t\t\tcap = addr + curr_capa;\n@@ -290,7 +290,7 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_private *internals,\n \t\t\tcap->sym.auth.digest_size.max = 16;\n \t\t\tcap->sym.auth.digest_size.increment = 4;\n \t\t}\n-\t\tif (internals->qat_dev->has_wireless_slice && (\n+\t\tif (internals->qat_dev->options.has_wireless_slice && (\n \t\t\tcheck_cipher_capa(&capabilities[iter],\n \t\t\t\tRTE_CRYPTO_CIPHER_ZUC_EEA3))) {\n \t\t\tcap = addr + curr_capa;\n@@ -551,7 +551,7 @@ qat_sym_crypto_set_session_gen3(void *cdev, void *session)\n \t\t\t\tctx->qat_cipher_alg ==\n \t\t\t\tICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3)) {\n \t\t\tqat_sym_session_set_ext_hash_flags_gen2(ctx, 0);\n-\t\t} else if ((internals->qat_dev->has_wireless_slice) &&\n+\t\t} else if ((internals->qat_dev->options.has_wireless_slice) &&\n \t\t\t\t((ctx->aes_cmac ||\n \t\t\t\tctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_NULL) &&\n \t\t\t\t(ctx->qat_cipher_alg ==\n@@ -560,7 +560,7 @@ qat_sym_crypto_set_session_gen3(void *cdev, void *session)\n \t\t\t\tICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3 ||\n \t\t\t\tctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_ZUC_256))) {\n \t\t\tqat_sym_session_set_ext_hash_flags_gen2(ctx, 0);\n-\t\t} else if ((internals->qat_dev->has_wireless_slice) &&\n+\t\t} else if ((internals->qat_dev->options.has_wireless_slice) &&\n \t\t\t(ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_ZUC_256_MAC_32 ||\n \t\t\t\tctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_ZUC_256_MAC_64 ||\n \t\t\t\tctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_ZUC_256_MAC_128) &&\ndiff --git a/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c b/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c\nindex bdd1647ea2..17a21ed7a7 100644\n--- a/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c\n+++ b/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c\n@@ -292,7 +292,7 @@ qat_sym_build_op_auth_gen1(void *in_op, struct qat_sym_session *ctx,\n \tcdev = rte_cryptodev_pmd_get_dev(ctx->dev_id);\n \tinternals = cdev->data->dev_private;\n \n-\tif (internals->qat_dev->has_wireless_slice && !ctx->is_gmac)\n+\tif (internals->qat_dev->options.has_wireless_slice && !ctx->is_gmac)\n \t\tICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(\n \t\t\t\treq->comn_hdr.serv_specif_flags, 0);\n \ndiff --git a/drivers/crypto/qat/qat_asym.c b/drivers/crypto/qat/qat_asym.c\nindex 14d6ec358c..8eb4df8ca8 100644\n--- a/drivers/crypto/qat/qat_asym.c\n+++ b/drivers/crypto/qat/qat_asym.c\n@@ -1031,7 +1031,8 @@ asym_set_input(struct icp_qat_fw_pke_request *qat_req,\n static int\n qat_asym_build_request(void *in_op, uint8_t *out_msg, void *op_cookie,\n \t\t\t__rte_unused uint64_t *opaque,\n-\t\t\t__rte_unused enum qat_device_gen qat_dev_gen)\n+\t\t\t__rte_unused enum qat_device_gen qat_dev_gen,\n+\t\t\t__rte_unused struct qat_options options)\n {\n \tstruct rte_crypto_op *op = (struct rte_crypto_op *)in_op;\n \tstruct rte_crypto_asym_op *asym_op = op->asym;\n@@ -1594,7 +1595,7 @@ qat_asym_dev_create(struct qat_pci_device *qat_pci_dev)\n \t\t\tatoi(cmdline);\n \t}\n \n-\tif (qat_pci_dev->slice_map & ICP_ACCEL_MASK_PKE_SLICE) {\n+\tif (qat_pci_dev->options.slice_map & ICP_ACCEL_MASK_PKE_SLICE) {\n \t\tQAT_LOG(ERR, \"Device %s does not support PKE slice\",\n \t\t\t\tname);\n \t\trte_cryptodev_pmd_destroy(cryptodev);\n@@ -1604,7 +1605,7 @@ qat_asym_dev_create(struct qat_pci_device *qat_pci_dev)\n \t}\n \n \tif (gen_dev_ops->get_capabilities(internals,\n-\t\t\tcapa_memz_name, qat_pci_dev->slice_map) < 0) {\n+\t\t\tcapa_memz_name, qat_pci_dev->options.slice_map) < 0) {\n \t\tQAT_LOG(ERR,\n \t\t\t\"Device cannot obtain capabilities, destroying PMD for %s\",\n \t\t\tname);\ndiff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c\nindex c530496786..cd77a065b7 100644\n--- a/drivers/crypto/qat/qat_sym.c\n+++ b/drivers/crypto/qat/qat_sym.c\n@@ -71,7 +71,8 @@ qat_sym_init_op_cookie(void *op_cookie)\n \n static __rte_always_inline int\n qat_sym_build_request(void *in_op, uint8_t *out_msg,\n-\t\tvoid *op_cookie, uint64_t *opaque, enum qat_device_gen dev_gen)\n+\t\tvoid *op_cookie, uint64_t *opaque, enum qat_device_gen dev_gen,\n+\t\t__rte_unused struct qat_options options)\n {\n \tstruct rte_crypto_op *op = (struct rte_crypto_op *)in_op;\n \tuintptr_t sess = (uintptr_t)opaque[0];\n@@ -317,7 +318,7 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev)\n \t\tinternals->cipher_crc_offload_enable = atoi(cmdline);\n \n \tif (gen_dev_ops->get_capabilities(internals,\n-\t\t\tcapa_memz_name, qat_pci_dev->slice_map) < 0) {\n+\t\t\tcapa_memz_name, qat_pci_dev->options.slice_map) < 0) {\n \t\tQAT_LOG(ERR,\n \t\t\t\"Device cannot obtain capabilities, destroying PMD for %s\",\n \t\t\tname);\ndiff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_sym_session.c\nindex 9e2dba5423..eb267db424 100644\n--- a/drivers/crypto/qat/qat_sym_session.c\n+++ b/drivers/crypto/qat/qat_sym_session.c\n@@ -422,7 +422,7 @@ qat_sym_session_configure_cipher(struct rte_cryptodev *dev,\n \t\t\tgoto error_out;\n \t\t}\n \t\tsession->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;\n-\t\tif (internals->qat_dev->has_wireless_slice)\n+\t\tif (internals->qat_dev->options.has_wireless_slice)\n \t\t\tis_wireless = 1;\n \t\tbreak;\n \tcase RTE_CRYPTO_CIPHER_NULL:\n@@ -543,7 +543,7 @@ qat_sym_session_configure_cipher(struct rte_cryptodev *dev,\n \t\tsession->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;\n \t\tif (cipher_xform->key.length == ICP_QAT_HW_ZUC_256_KEY_SZ)\n \t\t\tsession->is_zuc256 = 1;\n-\t\tif (internals->qat_dev->has_wireless_slice)\n+\t\tif (internals->qat_dev->options.has_wireless_slice)\n \t\t\tis_wireless = 1;\n \t\tbreak;\n \tcase RTE_CRYPTO_CIPHER_AES_XTS:\n@@ -933,7 +933,7 @@ qat_sym_session_configure_auth(struct rte_cryptodev *dev,\n \t\tbreak;\n \tcase RTE_CRYPTO_AUTH_AES_CMAC:\n \t\tsession->aes_cmac = 1;\n-\t\tif (!internals->qat_dev->has_wireless_slice) {\n+\t\tif (!internals->qat_dev->options.has_wireless_slice) {\n \t\t\tsession->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_AES_XCBC_MAC;\n \t\t\tbreak;\n \t\t}\n@@ -968,7 +968,7 @@ qat_sym_session_configure_auth(struct rte_cryptodev *dev,\n \t\tbreak;\n \tcase RTE_CRYPTO_AUTH_SNOW3G_UIA2:\n \t\tsession->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2;\n-\t\tif (internals->qat_dev->has_wireless_slice) {\n+\t\tif (internals->qat_dev->options.has_wireless_slice) {\n \t\t\tis_wireless = 1;\n \t\t\tsession->is_wireless = 1;\n \t\t\thash_flag = 1 << ICP_QAT_FW_AUTH_HDR_FLAG_SNOW3G_UIA2_BITPOS;\n@@ -1012,7 +1012,7 @@ qat_sym_session_configure_auth(struct rte_cryptodev *dev,\n \t\t\tQAT_LOG(ERR, \"Invalid key length: %d\", key_length);\n \t\t\treturn -ENOTSUP;\n \t\t}\n-\t\tif (internals->qat_dev->has_wireless_slice) {\n+\t\tif (internals->qat_dev->options.has_wireless_slice) {\n \t\t\tis_wireless = 1;\n \t\t\tsession->is_wireless = 1;\n \t\t\thash_flag = 1 << ICP_QAT_FW_AUTH_HDR_FLAG_ZUC_EIA3_BITPOS;\n", "prefixes": [] }