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GET /api/patches/139246/?format=api
{ "id": 139246, "url": "http://patches.dpdk.org/api/patches/139246/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240412115722.3709194-4-gakhil@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240412115722.3709194-4-gakhil@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240412115722.3709194-4-gakhil@marvell.com", "date": "2024-04-12T11:57:22", "name": "[v2,3/3] test/crypto: add QP depth used count case", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "2449a37e12c2fe56901a2c98fba441e8d93b63f0", "submitter": { "id": 2094, "url": "http://patches.dpdk.org/api/people/2094/?format=api", "name": "Akhil Goyal", "email": "gakhil@marvell.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240412115722.3709194-4-gakhil@marvell.com/mbox/", "series": [ { "id": 31731, "url": "http://patches.dpdk.org/api/series/31731/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31731", "date": "2024-04-12T11:57:19", "name": "cryptodev: add API to get used queue pair depth", "version": 2, "mbox": "http://patches.dpdk.org/series/31731/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/139246/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/139246/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 261C443E51;\n\tFri, 12 Apr 2024 13:58:00 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6F50C40DCD;\n\tFri, 12 Apr 2024 13:57:57 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 5FE2D40DCD\n for <dev@dpdk.org>; Fri, 12 Apr 2024 13:57:56 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id\n 43C4AwYu011459; Fri, 12 Apr 2024 04:57:50 -0700", "from dc6wp-exch02.marvell.com ([4.21.29.225])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3xewph1c6a-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);\n Fri, 12 Apr 2024 04:57:50 -0700 (PDT)", "from DC6WP-EXCH02.marvell.com (10.76.176.209) by\n DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.1544.4; Fri, 12 Apr 2024 04:57:49 -0700", "from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com\n (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend\n Transport; Fri, 12 Apr 2024 04:57:49 -0700", "from localhost.localdomain (unknown [10.28.36.102])\n by maili.marvell.com (Postfix) with ESMTP id AB8773F7077;\n Fri, 12 Apr 2024 04:57:43 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=\n from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-transfer-encoding:content-type; s=\n pfpt0220; bh=HjS6aLRNBZHIUPx/zTZDYKXxBfb6enudJonHvj24D/s=; b=KgF\n 1KWdXGyp75fm/3s26M0cWYMKT5daz5741oXW1C9a0tBmzNV3rPUjOdiqoOE8rQGk\n ykQOcr6HN/w1fEKI+DtAB0ITrmQa7Z9wTVjkGdugdKw5r8QWaNPLuHVQPkBTEVyS\n tndKeX38Us7TJTQoarU1ChIYWgfj7/58IBXsAXmziRv2hzusf1r3pFuhjCy4OHl5\n kGHrX9zpGLhBpQTrnTYLdvwwPVyj1JcIzaTu+C6gllzNV8U3R3G5GFmo4v0/WYHl\n GgAOGRyrMxbVBWPWOpWnF0AEnhRhAGo7rfQI4QUB9pfyB0whyiErc31Ua3Absuoq\n uwK6R42DAH6rUWOFW6Q==", "From": "Akhil Goyal <gakhil@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<thomas@monjalon.net>, <david.marchand@redhat.com>,\n <hemant.agrawal@nxp.com>, <anoobj@marvell.com>,\n <pablo.de.lara.guarch@intel.com>, <fiona.trahe@intel.com>,\n <declan.doherty@intel.com>, <matan@nvidia.com>, <g.singh@nxp.com>,\n <fanzhang.oss@gmail.com>, <jianjay.zhou@huawei.com>,\n <asomalap@amd.com>, <ruifeng.wang@arm.com>,\n <konstantin.v.ananyev@yandex.ru>, <radu.nicolau@intel.com>,\n <ajit.khaparde@broadcom.com>, <rnagadheeraj@marvell.com>,\n <ciara.power@intel.com>, Akhil Goyal <gakhil@marvell.com>", "Subject": "[PATCH v2 3/3] test/crypto: add QP depth used count case", "Date": "Fri, 12 Apr 2024 17:27:22 +0530", "Message-ID": "<20240412115722.3709194-4-gakhil@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20240412115722.3709194-1-gakhil@marvell.com>", "References": "<20240411082232.3495883-1-gakhil@marvell.com>\n <20240412115722.3709194-1-gakhil@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "Vj37f7lw7SrEiLXSxdCeVwgHSKK-bWcs", "X-Proofpoint-ORIG-GUID": "Vj37f7lw7SrEiLXSxdCeVwgHSKK-bWcs", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2024-04-12_08,2024-04-09_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Added a test case to verify the new API\nrte_cryptodev_qp_depth_used() to get the used\ndepth of a crypto device queue pair.\n\nSigned-off-by: Akhil Goyal <gakhil@marvell.com>\n---\n app/test/test_cryptodev.c | 117 ++++++++++++++++++++++++++++++++++++++\n 1 file changed, 117 insertions(+)", "diff": "diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c\nindex 1703ebccf1..f2d249f6b8 100644\n--- a/app/test/test_cryptodev.c\n+++ b/app/test/test_cryptodev.c\n@@ -2400,6 +2400,121 @@ static const uint8_t ms_hmac_digest2[] = {\n \n /* End Session 2 */\n \n+#define MAX_OPS_PROCESSED (MAX_NUM_OPS_INFLIGHT - 1)\n+static int\n+test_queue_pair_descriptor_count(void)\n+{\n+\tstruct crypto_testsuite_params *ts_params = &testsuite_params;\n+\tstruct crypto_unittest_params *ut_params = &unittest_params;\n+\tstruct rte_crypto_op *ops_deq[MAX_OPS_PROCESSED] = { NULL };\n+\tstruct rte_crypto_op *ops[MAX_OPS_PROCESSED] = { NULL };\n+\tstruct rte_cryptodev_sym_capability_idx cap_idx;\n+\tint qp_depth = 0;\n+\tint i;\n+\n+\tRTE_VERIFY(gbl_action_type != RTE_SECURITY_ACTION_TYPE_CPU_CRYPTO);\n+\n+\t/* Verify if the queue pair depth API is supported by driver */\n+\tqp_depth = rte_cryptodev_qp_depth_used(ts_params->valid_devs[0], 0);\n+\tif (qp_depth == -ENOTSUP)\n+\t\treturn TEST_SKIPPED;\n+\n+\t/* Verify the capabilities */\n+\tcap_idx.type = RTE_CRYPTO_SYM_XFORM_AUTH;\n+\tcap_idx.algo.auth = RTE_CRYPTO_AUTH_SHA1_HMAC;\n+\tif (rte_cryptodev_sym_capability_get(ts_params->valid_devs[0], &cap_idx) == NULL)\n+\t\treturn TEST_SKIPPED;\n+\n+\tcap_idx.type = RTE_CRYPTO_SYM_XFORM_CIPHER;\n+\tcap_idx.algo.cipher = RTE_CRYPTO_CIPHER_AES_CBC;\n+\tif (rte_cryptodev_sym_capability_get(ts_params->valid_devs[0], &cap_idx) == NULL)\n+\t\treturn TEST_SKIPPED;\n+\n+\t/* Setup Cipher Parameters */\n+\tut_params->cipher_xform.type = RTE_CRYPTO_SYM_XFORM_CIPHER;\n+\tut_params->cipher_xform.next = &ut_params->auth_xform;\n+\tut_params->cipher_xform.cipher.algo = RTE_CRYPTO_CIPHER_AES_CBC;\n+\tut_params->cipher_xform.cipher.op = RTE_CRYPTO_CIPHER_OP_ENCRYPT;\n+\tut_params->cipher_xform.cipher.key.data = aes_cbc_key;\n+\tut_params->cipher_xform.cipher.key.length = CIPHER_KEY_LENGTH_AES_CBC;\n+\tut_params->cipher_xform.cipher.iv.offset = IV_OFFSET;\n+\tut_params->cipher_xform.cipher.iv.length = CIPHER_IV_LENGTH_AES_CBC;\n+\n+\t/* Setup HMAC Parameters */\n+\tut_params->auth_xform.type = RTE_CRYPTO_SYM_XFORM_AUTH;\n+\tut_params->auth_xform.next = NULL;\n+\tut_params->auth_xform.auth.op = RTE_CRYPTO_AUTH_OP_GENERATE;\n+\tut_params->auth_xform.auth.algo = RTE_CRYPTO_AUTH_SHA1_HMAC;\n+\tut_params->auth_xform.auth.key.length = HMAC_KEY_LENGTH_SHA1;\n+\tut_params->auth_xform.auth.key.data = hmac_sha1_key;\n+\tut_params->auth_xform.auth.digest_length = DIGEST_BYTE_LENGTH_SHA1;\n+\n+\trte_errno = 0;\n+\tut_params->sess = rte_cryptodev_sym_session_create(ts_params->valid_devs[0],\n+\t\t\t&ut_params->cipher_xform, ts_params->session_mpool);\n+\tif (rte_errno == ENOTSUP)\n+\t\treturn TEST_SKIPPED;\n+\n+\tTEST_ASSERT_NOT_NULL(ut_params->sess, \"Session creation failed\");\n+\n+\tTEST_ASSERT_EQUAL(rte_crypto_op_bulk_alloc(ts_params->op_mpool,\n+\t\t\tRTE_CRYPTO_OP_TYPE_SYMMETRIC, ops, MAX_OPS_PROCESSED),\n+\t\t\tMAX_OPS_PROCESSED, \"failed to generate burst of crypto ops\");\n+\n+\t/* Generate crypto op data structure */\n+\tfor (i = 0; i < MAX_OPS_PROCESSED; i++) {\n+\t\tstruct rte_mbuf *m;\n+\t\tuint8_t *digest;\n+\n+\t\t/* Generate test mbuf data and space for digest */\n+\t\tm = setup_test_string(ts_params->mbuf_pool, catch_22_quote, QUOTE_512_BYTES, 0);\n+\t\tTEST_ASSERT_NOT_NULL(m, \"Failed to allocate mbuf\");\n+\n+\t\tdigest = (uint8_t *)rte_pktmbuf_append(m, DIGEST_BYTE_LENGTH_SHA1);\n+\t\tTEST_ASSERT_NOT_NULL(digest, \"no room to append digest\");\n+\n+\t\trte_crypto_op_attach_sym_session(ops[i], ut_params->sess);\n+\n+\t\t/* set crypto operation source mbuf */\n+\t\tops[i]->sym->m_src = m;\n+\n+\t\t/* Set crypto operation authentication parameters */\n+\t\tops[i]->sym->auth.digest.data = digest;\n+\t\tops[i]->sym->auth.digest.phys_addr = rte_pktmbuf_iova_offset(m, QUOTE_512_BYTES);\n+\n+\t\tops[i]->sym->auth.data.offset = 0;\n+\t\tops[i]->sym->auth.data.length = QUOTE_512_BYTES;\n+\n+\t\t/* Copy IV at the end of the crypto operation */\n+\t\tmemcpy(rte_crypto_op_ctod_offset(ops[i], uint8_t *, IV_OFFSET), aes_cbc_iv,\n+\t\t\t\tCIPHER_IV_LENGTH_AES_CBC);\n+\n+\t\t/* Set crypto operation cipher parameters */\n+\t\tops[i]->sym->cipher.data.offset = 0;\n+\t\tops[i]->sym->cipher.data.length = QUOTE_512_BYTES;\n+\n+\t\tTEST_ASSERT_EQUAL(rte_cryptodev_enqueue_burst(ts_params->valid_devs[0], 0,\n+\t\t\t\t\t&ops[i], 1), 1, \"Error enqueuing\");\n+\t}\n+\n+\tfor (i = 0; i < MAX_OPS_PROCESSED; i++) {\n+\t\tqp_depth = rte_cryptodev_qp_depth_used(ts_params->valid_devs[0], 0);\n+\t\tTEST_ASSERT_EQUAL(qp_depth, MAX_OPS_PROCESSED - i,\n+\t\t\t\"Crypto queue pair depth used does not match with inflight ops\");\n+\n+\t\twhile (rte_cryptodev_dequeue_burst(ts_params->valid_devs[0], 0,\n+\t\t\t\t\t&ops_deq[i], 1) == 0)\n+\t\t\trte_pause();\n+\n+\t\tTEST_ASSERT_EQUAL(ops_deq[i]->status, RTE_CRYPTO_OP_STATUS_SUCCESS,\n+\t\t\t\t\"crypto op processing failed\");\n+\n+\t\trte_pktmbuf_free(ops_deq[i]->sym->m_src);\n+\t\trte_crypto_op_free(ops_deq[i]);\n+\t}\n+\n+\treturn TEST_SUCCESS;\n+}\n \n static int\n test_AES_CBC_HMAC_SHA1_encrypt_digest(void)\n@@ -18068,6 +18183,8 @@ static struct unit_test_suite cryptodev_gen_testsuite = {\n \t\t\t\ttest_queue_pair_descriptor_setup),\n \t\tTEST_CASE_ST(ut_setup, ut_teardown,\n \t\t\t\ttest_device_configure_invalid_queue_pair_ids),\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown,\n+\t\t\t\ttest_queue_pair_descriptor_count),\n \t\tTEST_CASE_ST(ut_setup, ut_teardown, test_stats),\n \t\tTEST_CASE_ST(ut_setup, ut_teardown, test_enq_callback_setup),\n \t\tTEST_CASE_ST(ut_setup, ut_teardown, test_deq_callback_setup),\n", "prefixes": [ "v2", "3/3" ] }