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GET /api/patches/139229/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 139229,
    "url": "http://patches.dpdk.org/api/patches/139229/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240411094548.1622662-1-mingjinx.ye@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20240411094548.1622662-1-mingjinx.ye@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20240411094548.1622662-1-mingjinx.ye@intel.com",
    "date": "2024-04-11T09:45:48",
    "name": "net/ice: support FEC feature",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "bc8ed3e43df329c7085ca2c22698b06ef9433d8a",
    "submitter": {
        "id": 2862,
        "url": "http://patches.dpdk.org/api/people/2862/?format=api",
        "name": "Mingjin Ye",
        "email": "mingjinx.ye@intel.com"
    },
    "delegate": {
        "id": 10,
        "url": "http://patches.dpdk.org/api/users/10/?format=api",
        "username": "bruce",
        "first_name": "Bruce",
        "last_name": "Richardson",
        "email": "bruce.richardson@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240411094548.1622662-1-mingjinx.ye@intel.com/mbox/",
    "series": [
        {
            "id": 31723,
            "url": "http://patches.dpdk.org/api/series/31723/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31723",
            "date": "2024-04-11T09:45:48",
            "name": "net/ice: support FEC feature",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/31723/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/139229/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/139229/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 56D5943E43;\n\tThu, 11 Apr 2024 12:03:45 +0200 (CEST)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 46EC840268;\n\tThu, 11 Apr 2024 12:03:45 +0200 (CEST)",
            "from mgamail.intel.com (mgamail.intel.com [198.175.65.17])\n by mails.dpdk.org (Postfix) with ESMTP id DC8B440262\n for <dev@dpdk.org>; Thu, 11 Apr 2024 12:03:42 +0200 (CEST)",
            "from orviesa004.jf.intel.com ([10.64.159.144])\n by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Apr 2024 03:03:42 -0700",
            "from unknown (HELO localhost.localdomain) ([10.239.252.253])\n by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Apr 2024 03:03:41 -0700"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1712829824; x=1744365824;\n h=from:to:cc:subject:date:message-id:mime-version:\n content-transfer-encoding;\n bh=p+hTSRcobSq7icqKZC3ON6ymYXE79UDanqqWxrGyaIE=;\n b=NlCmOjL9CgD61luxtri28ZIZSliIvg1G4IegWrrKtxN37bEKn/FBEuyg\n if63oYeG4wCdj8LqRd/ragU7VeptWf2CKomlUKNF+jjeMS1wJmNsoKrWg\n 0Faj0JV0taksvAVQO0dhgUMiWdqIcVZ/62X5ZGEOgRUnUETfw6emnsUdw\n vq2hXFaBuw7v7VarNEBwW7xQNJ2kDsAc1+Ej8ayk4mZ77ljBpjPiT+/8c\n fAEzlk7x4b8HGKxbf99G/WvlPPLWD7gV+hZVGzabifyClWoUrEa2SW97/\n rEe+n2xsZzY9vViwLjs6slOtjKRded00qaTsemvX66zbJky3je6oRjxbK g==;",
        "X-CSE-ConnectionGUID": [
            "yJDqdkTMTCetiTsD248T1A==",
            "5w0khOy7QHSN52OWj0Ey5Q=="
        ],
        "X-CSE-MsgGUID": [
            "EZTKBDYYSx+/fHPFjzO8NA==",
            "WhpQ8WwfSjiXvD0r94QlTQ=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6600,9927,11039\"; a=\"8337848\"",
            "E=Sophos;i=\"6.07,193,1708416000\";\n   d=\"scan'208\";a=\"8337848\"",
            "E=Sophos;i=\"6.07,193,1708416000\"; d=\"scan'208\";a=\"25630096\""
        ],
        "X-ExtLoop1": "1",
        "From": "Mingjin Ye <mingjinx.ye@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "Mingjin Ye <mingjinx.ye@intel.com>",
        "Subject": "[PATCH] net/ice: support FEC feature",
        "Date": "Thu, 11 Apr 2024 09:45:48 +0000",
        "Message-Id": "<20240411094548.1622662-1-mingjinx.ye@intel.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "This patch enable three Forward Error Correction(FEC) related ops\nin ice driver. As no speed information can get from HW, this patch\nonly show FEC capability.\n\nSigned-off-by: Mingjin Ye <mingjinx.ye@intel.com>\n---\n doc/guides/nics/features/ice.ini |   1 +\n doc/guides/nics/ice.rst          |   5 +\n drivers/net/ice/ice_ethdev.c     | 176 +++++++++++++++++++++++++++++++\n 3 files changed, 182 insertions(+)",
    "diff": "diff --git a/doc/guides/nics/features/ice.ini b/doc/guides/nics/features/ice.ini\nindex 62869ef0a0..a9be394696 100644\n--- a/doc/guides/nics/features/ice.ini\n+++ b/doc/guides/nics/features/ice.ini\n@@ -9,6 +9,7 @@\n [Features]\n Speed capabilities   = Y\n Link speed configuration = Y\n+FEC                  = Y\n Link status          = Y\n Link status event    = Y\n Rx interrupt         = Y\ndiff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst\nindex 3deeea9e6c..3d7e4ed7f1 100644\n--- a/doc/guides/nics/ice.rst\n+++ b/doc/guides/nics/ice.rst\n@@ -323,6 +323,11 @@ The DCF PMD needs to advertise and acquire DCF capability which allows DCF to\n send AdminQ commands that it would like to execute over to the PF and receive\n responses for the same from PF.\n \n+Forward Error Correction (FEC)\n+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n+\n+Supports get/set FEC mode and get FEC capability.\n+\n Generic Flow Support\n ~~~~~~~~~~~~~~~~~~~~\n \ndiff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex 87385d2649..56d0f2bb28 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -181,6 +181,10 @@ static int ice_timesync_read_time(struct rte_eth_dev *dev,\n static int ice_timesync_write_time(struct rte_eth_dev *dev,\n \t\t\t\t   const struct timespec *timestamp);\n static int ice_timesync_disable(struct rte_eth_dev *dev);\n+static int ice_fec_get_capability(struct rte_eth_dev *dev, struct rte_eth_fec_capa *speed_fec_capa,\n+\t\t\t   unsigned int num);\n+static int ice_fec_get(struct rte_eth_dev *dev, uint32_t *fec_capa);\n+static int ice_fec_set(struct rte_eth_dev *dev, uint32_t fec_capa);\n static const uint32_t *ice_buffer_split_supported_hdr_ptypes_get(struct rte_eth_dev *dev,\n \t\t\t\t\t\tsize_t *no_of_elements);\n \n@@ -298,6 +302,9 @@ static const struct eth_dev_ops ice_eth_dev_ops = {\n \t.timesync_write_time          = ice_timesync_write_time,\n \t.timesync_disable             = ice_timesync_disable,\n \t.tm_ops_get                   = ice_tm_ops_get,\n+\t.fec_get_capability           = ice_fec_get_capability,\n+\t.fec_get                      = ice_fec_get,\n+\t.fec_set                      = ice_fec_set,\n \t.buffer_split_supported_hdr_ptypes_get = ice_buffer_split_supported_hdr_ptypes_get,\n };\n \n@@ -6644,6 +6651,175 @@ ice_buffer_split_supported_hdr_ptypes_get(struct rte_eth_dev *dev __rte_unused,\n \treturn ptypes;\n }\n \n+static int\n+ice_fec_get_capa_num(struct ice_aqc_get_phy_caps_data *pcaps,\n+\t\t\t   struct rte_eth_fec_capa *speed_fec_capa)\n+{\n+\tint num = 0;\n+\n+\tif (!pcaps)\n+\t\treturn ICE_ERR_NO_MEMORY;\n+\n+\tif (pcaps->caps & ICE_AQC_PHY_EN_AUTO_FEC) {\n+\t\tif (speed_fec_capa)\n+\t\t\tspeed_fec_capa[num].capa = RTE_ETH_FEC_MODE_CAPA_MASK(AUTO);\n+\t\tnum++;\n+\t}\n+\n+\tif (pcaps->link_fec_options & ICE_AQC_PHY_FEC_10G_KR_40G_KR4_EN ||\n+\t    pcaps->link_fec_options & ICE_AQC_PHY_FEC_10G_KR_40G_KR4_REQ ||\n+\t    pcaps->link_fec_options & ICE_AQC_PHY_FEC_25G_KR_CLAUSE74_EN ||\n+\t    pcaps->link_fec_options & ICE_AQC_PHY_FEC_25G_KR_REQ) {\n+\t\tif (speed_fec_capa)\n+\t\t\tspeed_fec_capa[num].capa = RTE_ETH_FEC_MODE_CAPA_MASK(BASER);\n+\t\tnum++;\n+\t}\n+\n+\tif (pcaps->link_fec_options & ICE_AQC_PHY_FEC_25G_RS_528_REQ ||\n+\t    pcaps->link_fec_options & ICE_AQC_PHY_FEC_25G_RS_544_REQ ||\n+\t    pcaps->link_fec_options & ICE_AQC_PHY_FEC_25G_RS_CLAUSE91_EN) {\n+\t\tif (speed_fec_capa)\n+\t\t\tspeed_fec_capa[num].capa = RTE_ETH_FEC_MODE_CAPA_MASK(RS);\n+\t\tnum++;\n+\t}\n+\n+\tif (pcaps->link_fec_options == 0) {\n+\t\tif (speed_fec_capa)\n+\t\t\tspeed_fec_capa[num].capa = RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC);\n+\t\tnum++;\n+\t}\n+\n+\treturn num;\n+}\n+\n+static int\n+ice_fec_get_capability(struct rte_eth_dev *dev, struct rte_eth_fec_capa *speed_fec_capa,\n+\t\t\t   unsigned int num)\n+{\n+\tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct ice_aqc_get_phy_caps_data *pcaps;\n+\tunsigned int capa_num;\n+\tint ret;\n+\n+\tpcaps = (struct ice_aqc_get_phy_caps_data *)\n+\t\t\tice_malloc(hw, sizeof(*pcaps));\n+\tif (!pcaps)\n+\t\treturn ICE_ERR_NO_MEMORY;\n+\n+\tret = ice_aq_get_phy_caps(hw->port_info, false, ICE_AQC_REPORT_TOPO_CAP_MEDIA,\n+\t\t\t\t  pcaps, NULL);\n+\tif (ret)\n+\t\tgoto done;\n+\n+\t/* first time to get capa_num */\n+\tcapa_num = ice_fec_get_capa_num(pcaps, NULL);\n+\tif (!speed_fec_capa || num < capa_num) {\n+\t\tret = capa_num;\n+\t\tgoto done;\n+\t}\n+\n+\tret = ice_fec_get_capa_num(pcaps, speed_fec_capa);\n+\n+done:\n+\tice_free(hw, pcaps);\n+\treturn ret;\n+}\n+\n+static int\n+ice_fec_get(struct rte_eth_dev *dev, uint32_t *fec_capa)\n+{\n+\tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct ice_port_info *pi = hw->port_info;\n+\tu32 temp_fec_capa = 0;\n+\tint ret = 0;\n+\n+\tif (!pi)\n+\t\treturn -ENOTSUP;\n+\n+\t/* Get current FEC mode from port info */\n+\tswitch (pi->phy.curr_user_fec_req) {\n+\tcase ICE_FEC_NONE:\n+\t\ttemp_fec_capa = RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC);\n+\t\tbreak;\n+\tcase ICE_FEC_AUTO:\n+\tcase ICE_FEC_DIS_AUTO:\n+\t\ttemp_fec_capa = RTE_ETH_FEC_MODE_CAPA_MASK(AUTO);\n+\t\tbreak;\n+\tcase ICE_FEC_BASER:\n+\t\ttemp_fec_capa = RTE_ETH_FEC_MODE_CAPA_MASK(BASER);\n+\t\tbreak;\n+\tcase ICE_FEC_RS:\n+\t\ttemp_fec_capa = RTE_ETH_FEC_MODE_CAPA_MASK(RS);\n+\t\tbreak;\n+\tdefault:\n+\t\tret = -ENOTSUP;\n+\t\tbreak;\n+\t}\n+\n+\t*fec_capa = temp_fec_capa;\n+\treturn ret;\n+}\n+\n+static int\n+ice_fec_set(struct rte_eth_dev *dev, uint32_t fec_capa)\n+{\n+\tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct ice_port_info *pi = hw->port_info;\n+\tstruct ice_aqc_set_phy_cfg_data config = { 0 };\n+\tenum ice_fec_mode req_fec;\n+\tint ret = 0;\n+\n+\tif (!pi)\n+\t\treturn -ENOTSUP;\n+\n+\tswitch (fec_capa) {\n+\tcase RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC):\n+\t\treq_fec = ICE_FEC_NONE;\n+\t\tbreak;\n+\tcase RTE_ETH_FEC_MODE_CAPA_MASK(AUTO):\n+\t\tif (ice_fw_supports_fec_dis_auto(hw))\n+\t\t\treq_fec = ICE_FEC_DIS_AUTO;\n+\t\telse\n+\t\t\treq_fec = ICE_FEC_AUTO;\n+\t\tbreak;\n+\tcase RTE_ETH_FEC_MODE_CAPA_MASK(BASER):\n+\t\treq_fec = ICE_FEC_BASER;\n+\t\tbreak;\n+\tcase RTE_ETH_FEC_MODE_CAPA_MASK(RS):\n+\t\treq_fec = ICE_FEC_RS;\n+\t\tbreak;\n+\tdefault:\n+\t\tPMD_DRV_LOG(ERR, \"Unsupported FEC mode: %d\\n\", fec_capa);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Proceed only if requesting different FEC mode */\n+\tif (pi->phy.curr_user_fec_req == req_fec)\n+\t\treturn 0;\n+\n+\t/* Copy the current user PHY configuration. The current user PHY\n+\t * configuration is initialized during probe from PHY capabilities\n+\t * software mode, and updated on set PHY configuration.\n+\t */\n+\tmemcpy(&config, &pi->phy.curr_user_phy_cfg, sizeof(config));\n+\n+\tret = ice_cfg_phy_fec(pi, &config, req_fec);\n+\tif (ret) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to set FEC mode\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tconfig.caps |= ICE_AQ_PHY_ENA_AUTO_LINK_UPDT;\n+\n+\tif (ice_aq_set_phy_cfg(pi->hw, pi, &config, NULL))\n+\t\treturn -EAGAIN;\n+\n+\t/* Save requested FEC config */\n+\tpi->phy.curr_user_fec_req = req_fec;\n+\n+\treturn 0;\n+}\n+\n static int\n ice_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \t      struct rte_pci_device *pci_dev)\n",
    "prefixes": []
}