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GET /api/patches/139228/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 139228,
    "url": "http://patches.dpdk.org/api/patches/139228/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240411092945.1068587-1-zhichaox.zeng@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20240411092945.1068587-1-zhichaox.zeng@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20240411092945.1068587-1-zhichaox.zeng@intel.com",
    "date": "2024-04-11T09:29:45",
    "name": "[v5] net/i40e: support FEC feature",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "155c24d8f82cedca7bcf2fbdb4a1a0d8c7653d63",
    "submitter": {
        "id": 2644,
        "url": "http://patches.dpdk.org/api/people/2644/?format=api",
        "name": "Zhichao Zeng",
        "email": "zhichaox.zeng@intel.com"
    },
    "delegate": {
        "id": 10,
        "url": "http://patches.dpdk.org/api/users/10/?format=api",
        "username": "bruce",
        "first_name": "Bruce",
        "last_name": "Richardson",
        "email": "bruce.richardson@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240411092945.1068587-1-zhichaox.zeng@intel.com/mbox/",
    "series": [
        {
            "id": 31722,
            "url": "http://patches.dpdk.org/api/series/31722/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31722",
            "date": "2024-04-11T09:29:45",
            "name": "[v5] net/i40e: support FEC feature",
            "version": 5,
            "mbox": "http://patches.dpdk.org/series/31722/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/139228/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/139228/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id CCAF743E42;\n\tThu, 11 Apr 2024 11:18:46 +0200 (CEST)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id BAF4B402ED;\n\tThu, 11 Apr 2024 11:18:46 +0200 (CEST)",
            "from mgamail.intel.com (mgamail.intel.com [192.198.163.14])\n by mails.dpdk.org (Postfix) with ESMTP id D8136402D4\n for <dev@dpdk.org>; Thu, 11 Apr 2024 11:18:44 +0200 (CEST)",
            "from orviesa008.jf.intel.com ([10.64.159.148])\n by fmvoesa108.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Apr 2024 02:18:44 -0700",
            "from unknown (HELO zhichao-dpdk..) ([10.239.252.103])\n by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Apr 2024 02:18:41 -0700"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1712827125; x=1744363125;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=Rshoi56MmUrYpykLHL0jTHLvA20O9VX6+hYSJeRrwng=;\n b=kTAKkLKXaGKHH5SmUR7GabT6Q0hBjuDub//g0Ypk1titRlTxVMy/+CXT\n NWtDiQnvVaLbGY9+bKJwy+fWWcz9EG5DvWz0eaAw7ptCkxLoK+v/RN8FZ\n jJ0qZ0A6AuiUqdv5leV0MPTwBInPkZAIA/tgX2m4pE0RItguKyi2Y15j8\n lcRpyngDBWMW+MuO4MkpRFeArwhwp+oThKNrIJ48NHnRarzu/VXwVmXen\n ei8m21qBTcEjLbIFtuykN5VmMZW5EAW82jraTEitoSKPR0lKpWl/xD0d9\n TB/a2R5EIAov5tmO74u6XMVOkuTcJL6Gf7/8pseVj68XhYXWU1q1Ahgcv Q==;",
        "X-CSE-ConnectionGUID": [
            "qV+PS9g/TyiYOtMKvPVqJg==",
            "DPW9YFAPS0WAozcsL7IA7g=="
        ],
        "X-CSE-MsgGUID": [
            "yil9WCsZQ/e9kxnpFdZ9hA==",
            "BAmKFrrXSBekc58NgCdA/g=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6600,9927,11039\"; a=\"8446895\"",
            "E=Sophos;i=\"6.07,193,1708416000\";\n   d=\"scan'208\";a=\"8446895\"",
            "E=Sophos;i=\"6.07,193,1708416000\"; d=\"scan'208\";a=\"21443574\""
        ],
        "X-ExtLoop1": "1",
        "From": "Zhichao Zeng <zhichaox.zeng@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "vladimir.medvedkin@intel.com, kaixinx.cui@intel.com,\n Zhichao Zeng <zhichaox.zeng@intel.com>,\n Qiming Yang <qiming.yang@intel.com>, Yuying Zhang <Yuying.Zhang@intel.com>",
        "Subject": "[PATCH v5] net/i40e: support FEC feature",
        "Date": "Thu, 11 Apr 2024 17:29:45 +0800",
        "Message-Id": "<20240411092945.1068587-1-zhichaox.zeng@intel.com>",
        "X-Mailer": "git-send-email 2.34.1",
        "In-Reply-To": "<20240306104135.2805774-1-zhichaox.zeng@intel.com>",
        "References": "<20240306104135.2805774-1-zhichaox.zeng@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "This patch enabled querying Forward Error Correction(FEC) capabilities,\nset FEC mode and get current FEC mode functions.\n\nSigned-off-by: Qiming Yang <qiming.yang@intel.com>\nSigned-off-by: Zhichao Zeng <zhichaox.zeng@intel.com>\n\n---\nv5: fix some judgments\nv4: fix some logic\nv3: optimize code details\nv2: update NIC feature document\n---\n doc/guides/nics/features/i40e.ini      |   1 +\n doc/guides/rel_notes/release_24_07.rst |   4 +\n drivers/net/i40e/i40e_ethdev.c         | 237 +++++++++++++++++++++++++\n 3 files changed, 242 insertions(+)",
    "diff": "diff --git a/doc/guides/nics/features/i40e.ini b/doc/guides/nics/features/i40e.ini\nindex ef7514c44b..4610444ace 100644\n--- a/doc/guides/nics/features/i40e.ini\n+++ b/doc/guides/nics/features/i40e.ini\n@@ -32,6 +32,7 @@ Traffic manager      = Y\n CRC offload          = Y\n VLAN offload         = Y\n QinQ offload         = P\n+FEC                  = Y\n L3 checksum offload  = P\n L4 checksum offload  = P\n Inner L3 checksum    = P\ndiff --git a/doc/guides/rel_notes/release_24_07.rst b/doc/guides/rel_notes/release_24_07.rst\nindex a69f24cf99..1e65f70d6c 100644\n--- a/doc/guides/rel_notes/release_24_07.rst\n+++ b/doc/guides/rel_notes/release_24_07.rst\n@@ -55,6 +55,10 @@ New Features\n      Also, make sure to start the actual text at the margin.\n      =======================================================\n \n+* **Updated Intel i40e driver.**\n+\n+  * Added support for configuring the Forward Error Correction(FEC) mode, querying\n+  * FEC capabilities and current FEC mode from a device.\n \n Removed Items\n -------------\ndiff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 380ce1a720..bc4a62f64b 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -406,6 +406,10 @@ static void i40e_ethertype_filter_restore(struct i40e_pf *pf);\n static void i40e_tunnel_filter_restore(struct i40e_pf *pf);\n static void i40e_filter_restore(struct i40e_pf *pf);\n static void i40e_notify_all_vfs_link_status(struct rte_eth_dev *dev);\n+static int i40e_fec_get_capability(struct rte_eth_dev *dev,\n+\tstruct rte_eth_fec_capa *speed_fec_capa, unsigned int num);\n+static int i40e_fec_get(struct rte_eth_dev *dev, uint32_t *fec_capa);\n+static int i40e_fec_set(struct rte_eth_dev *dev, uint32_t fec_capa);\n \n static const char *const valid_keys[] = {\n \tETH_I40E_FLOATING_VEB_ARG,\n@@ -521,6 +525,9 @@ static const struct eth_dev_ops i40e_eth_dev_ops = {\n \t.tm_ops_get                   = i40e_tm_ops_get,\n \t.tx_done_cleanup              = i40e_tx_done_cleanup,\n \t.get_monitor_addr             = i40e_get_monitor_addr,\n+\t.fec_get_capability           = i40e_fec_get_capability,\n+\t.fec_get                      = i40e_fec_get,\n+\t.fec_set                      = i40e_fec_set,\n };\n \n /* store statistics names and its offset in stats structure */\n@@ -12297,6 +12304,236 @@ i40e_cloud_filter_qinq_create(struct i40e_pf *pf)\n \treturn ret;\n }\n \n+static int\n+i40e_fec_get_capability(struct rte_eth_dev *dev,\n+\tstruct rte_eth_fec_capa *speed_fec_capa, __rte_unused unsigned int num)\n+{\n+\tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\n+\tif (hw->mac.type == I40E_MAC_X722 &&\n+\t    !(hw->flags & I40E_HW_FLAG_X722_FEC_REQUEST_CAPABLE)) {\n+\t\tPMD_DRV_LOG(ERR, \"Setting FEC encoding not supported by\"\n+\t\t\t \" firmware. Please update the NVM image.\\n\");\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\tif (hw->device_id == I40E_DEV_ID_25G_SFP28 ||\n+\t    hw->device_id == I40E_DEV_ID_25G_B) {\n+\t\tif (speed_fec_capa) {\n+\t\t\tspeed_fec_capa->speed = RTE_ETH_SPEED_NUM_25G;\n+\t\t\tspeed_fec_capa->capa = RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC) |\n+\t\t\t\t\t     RTE_ETH_FEC_MODE_CAPA_MASK(BASER) |\n+\t\t\t\t\t     RTE_ETH_FEC_MODE_CAPA_MASK(AUTO) |\n+\t\t\t\t\t     RTE_ETH_FEC_MODE_CAPA_MASK(RS);\n+\t\t}\n+\n+\t\t/* since HW only supports 25G */\n+\t\treturn 1;\n+\t} else if (hw->device_id == I40E_DEV_ID_KX_X722) {\n+\t\tif (speed_fec_capa) {\n+\t\t\tspeed_fec_capa->speed = RTE_ETH_SPEED_NUM_25G;\n+\t\t\tspeed_fec_capa->capa = RTE_ETH_FEC_MODE_CAPA_MASK(AUTO) |\n+\t\t\t\t\t     RTE_ETH_FEC_MODE_CAPA_MASK(RS);\n+\t\t}\n+\t\treturn 1;\n+\t}\n+\n+\treturn -ENOTSUP;\n+}\n+\n+static int\n+i40e_fec_get(struct rte_eth_dev *dev, uint32_t *fec_capa)\n+{\n+\tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct i40e_aq_get_phy_abilities_resp abilities = {0};\n+\tstruct i40e_link_status link_status = {0};\n+\tuint8_t current_fec_mode = 0, fec_config = 0;\n+\tbool link_up, enable_lse;\n+\tint ret = 0;\n+\n+\tenable_lse = dev->data->dev_conf.intr_conf.lsc ? true : false;\n+\t/* Get link info */\n+\tret = i40e_aq_get_link_info(hw, enable_lse, &link_status, NULL);\n+\tif (ret != I40E_SUCCESS) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to get link information: %d\\n\",\n+\t\t\t\tret);\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\tlink_up = link_status.link_info & I40E_AQ_LINK_UP;\n+\n+\tret = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,\n+\t\t\t\t\t\t  NULL);\n+\tif (ret) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to get PHY capabilities: %d\\n\",\n+\t\t\t\tret);\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\t/**\n+\t * If link is down and AUTO is enabled, AUTO is returned,\n+\t * otherwise, configured FEC mode is returned.\n+\t * If link is up, current FEC mode is returned.\n+\t */\n+\tfec_config = abilities.fec_cfg_curr_mod_ext_info;\n+\tcurrent_fec_mode = link_status.fec_info;\n+\n+\tif (link_up) {\n+\t\tswitch (current_fec_mode) {\n+\t\tcase I40E_AQ_CONFIG_FEC_KR_ENA:\n+\t\t\t*fec_capa = RTE_ETH_FEC_MODE_TO_CAPA(RTE_ETH_FEC_BASER);\n+\t\t\tbreak;\n+\t\tcase I40E_AQ_CONFIG_FEC_RS_ENA:\n+\t\t\t*fec_capa = RTE_ETH_FEC_MODE_TO_CAPA(RTE_ETH_FEC_RS);\n+\t\t\tbreak;\n+\t\tcase 0:\n+\t\t\t*fec_capa = RTE_ETH_FEC_MODE_TO_CAPA(RTE_ETH_FEC_NOFEC);\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\treturn 0;\n+\t}\n+\n+\tif (fec_config & I40E_AQ_ENABLE_FEC_AUTO) {\n+\t\t*fec_capa = RTE_ETH_FEC_MODE_TO_CAPA(RTE_ETH_FEC_AUTO);\n+\t\treturn 0;\n+\t}\n+\n+\tuint32_t temp_fec_capa = 0;\n+\tif (fec_config & I40E_AQ_ENABLE_FEC_KR)\n+\t\ttemp_fec_capa |= RTE_ETH_FEC_MODE_TO_CAPA(RTE_ETH_FEC_BASER);\n+\tif (fec_config & I40E_AQ_ENABLE_FEC_RS)\n+\t\ttemp_fec_capa |= RTE_ETH_FEC_MODE_TO_CAPA(RTE_ETH_FEC_RS);\n+\tif (temp_fec_capa == 0)\n+\t\ttemp_fec_capa = RTE_ETH_FEC_MODE_TO_CAPA(RTE_ETH_FEC_NOFEC);\n+\n+\t*fec_capa = temp_fec_capa;\n+\treturn 0;\n+}\n+\n+static int\n+i40e_fec_set(struct rte_eth_dev *dev, uint32_t fec_capa)\n+{\n+\tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct i40e_aq_get_phy_abilities_resp abilities = {0};\n+\tstruct i40e_aq_set_phy_config config = {0};\n+\tenum i40e_status_code status;\n+\tuint8_t req_fec = 0, fec_auto = 0, fec_kr = 0, fec_rs = 0;\n+\n+\tif (hw->device_id != I40E_DEV_ID_25G_SFP28 &&\n+\t    hw->device_id != I40E_DEV_ID_25G_B &&\n+\t    hw->device_id != I40E_DEV_ID_KX_X722) {\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\tif (hw->mac.type == I40E_MAC_X722 &&\n+\t    !(hw->flags & I40E_HW_FLAG_X722_FEC_REQUEST_CAPABLE)) {\n+\t\tPMD_DRV_LOG(ERR, \"Setting FEC encoding not supported by\"\n+\t\t\t \" firmware. Please update the NVM image.\\n\");\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\t/**\n+\t * Copy the current user PHY configuration. The current user PHY\n+\t * configuration is initialized during probe from PHY capabilities\n+\t * software mode, and updated on set PHY configuration.\n+\t */\n+\tif (fec_capa == 0)\n+\t\treturn -EINVAL;\n+\n+\tif (fec_capa & RTE_ETH_FEC_MODE_CAPA_MASK(AUTO))\n+\t\tfec_auto = 1;\n+\n+\tif (fec_capa & RTE_ETH_FEC_MODE_CAPA_MASK(BASER))\n+\t\tfec_kr = 1;\n+\n+\tif (fec_capa & RTE_ETH_FEC_MODE_CAPA_MASK(RS))\n+\t\tfec_rs = 1;\n+\n+\tif (fec_auto) {\n+\t\tif (hw->mac.type == I40E_MAC_X722) {\n+\t\t\tPMD_DRV_LOG(ERR, \"X722 Unsupported FEC mode: AUTO\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t\tif (fec_kr || fec_rs) {\n+\t\t\tif (fec_kr)\n+\t\t\t\treq_fec = I40E_AQ_SET_FEC_ABILITY_KR |\n+\t\t\t\t\t\t\tI40E_AQ_SET_FEC_REQUEST_KR;\n+\t\t\tif (fec_rs) {\n+\t\t\t\tif (hw->mac.type == I40E_MAC_X722) {\n+\t\t\t\t\tPMD_DRV_LOG(ERR, \"X722 Unsupported FEC mode: RS\");\n+\t\t\t\t\treturn -EINVAL;\n+\t\t\t\t}\n+\t\t\t\treq_fec = I40E_AQ_SET_FEC_ABILITY_RS |\n+\t\t\t\t\t\t\tI40E_AQ_SET_FEC_REQUEST_RS;\n+\t\t\t}\n+\t\t} else {\n+\t\t\tif (hw->mac.type == I40E_MAC_X722) {\n+\t\t\t\treq_fec = I40E_AQ_SET_FEC_ABILITY_KR |\n+\t\t\t\t\t\t  I40E_AQ_SET_FEC_REQUEST_KR;\n+\t\t\t} else {\n+\t\t\t\treq_fec = I40E_AQ_SET_FEC_ABILITY_KR |\n+\t\t\t\t\t\t  I40E_AQ_SET_FEC_REQUEST_KR |\n+\t\t\t\t\t\t  I40E_AQ_SET_FEC_ABILITY_RS |\n+\t\t\t\t\t\t  I40E_AQ_SET_FEC_REQUEST_RS;\n+\t\t\t}\n+\t\t}\n+\t} else {\n+\t\tif (fec_kr ^ fec_rs) {\n+\t\t\tif (fec_kr) {\n+\t\t\t\treq_fec = I40E_AQ_SET_FEC_ABILITY_KR |\n+\t\t\t\t\t\t\tI40E_AQ_SET_FEC_REQUEST_KR;\n+\t\t\t} else {\n+\t\t\t\tif (hw->mac.type == I40E_MAC_X722) {\n+\t\t\t\t\tPMD_DRV_LOG(ERR, \"X722 Unsupported FEC mode: RS\");\n+\t\t\t\t\treturn -EINVAL;\n+\t\t\t\t}\n+\t\t\t\treq_fec = I40E_AQ_SET_FEC_ABILITY_RS |\n+\t\t\t\t\t\t\tI40E_AQ_SET_FEC_REQUEST_RS;\n+\t\t\t}\n+\t\t} else {\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+\n+\t/* Get the current phy config */\n+\tstatus = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,\n+\t\t\t\t\t      NULL);\n+\tif (status) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to get PHY capabilities: %d\\n\",\n+\t\t\t\tstatus);\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\tif (abilities.fec_cfg_curr_mod_ext_info != req_fec) {\n+\t\tconfig.phy_type = abilities.phy_type;\n+\t\tconfig.abilities = abilities.abilities |\n+\t\t\t\t   I40E_AQ_PHY_ENABLE_ATOMIC_LINK;\n+\t\tconfig.phy_type_ext = abilities.phy_type_ext;\n+\t\tconfig.link_speed = abilities.link_speed;\n+\t\tconfig.eee_capability = abilities.eee_capability;\n+\t\tconfig.eeer = abilities.eeer_val;\n+\t\tconfig.low_power_ctrl = abilities.d3_lpan;\n+\t\tconfig.fec_config = req_fec & I40E_AQ_PHY_FEC_CONFIG_MASK;\n+\t\tstatus = i40e_aq_set_phy_config(hw, &config, NULL);\n+\t\tif (status) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Failed to set PHY capabilities: %d\\n\",\n+\t\t\tstatus);\n+\t\t\treturn -ENOTSUP;\n+\t\t}\n+\t}\n+\n+\tstatus = i40e_update_link_info(hw);\n+\tif (status) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to set PHY capabilities: %d\\n\",\n+\t\t\tstatus);\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\treturn 0;\n+}\n+\n RTE_LOG_REGISTER_SUFFIX(i40e_logtype_init, init, NOTICE);\n RTE_LOG_REGISTER_SUFFIX(i40e_logtype_driver, driver, NOTICE);\n #ifdef RTE_ETHDEV_DEBUG_RX\n",
    "prefixes": [
        "v5"
    ]
}