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GET /api/patches/138919/?format=api
{ "id": 138919, "url": "http://patches.dpdk.org/api/patches/138919/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1711579078-10624-44-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1711579078-10624-44-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1711579078-10624-44-git-send-email-roretzla@linux.microsoft.com", "date": "2024-03-27T22:37:56", "name": "[v3,43/45] app/test-crypto-perf: use rte stdatomic API", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "859cab1a13d5505371eb2b03378aeba5602f9379", "submitter": { "id": 2077, "url": "http://patches.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1711579078-10624-44-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 31633, "url": "http://patches.dpdk.org/api/series/31633/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31633", "date": "2024-03-27T22:37:13", "name": "use stdatomic API", "version": 3, "mbox": "http://patches.dpdk.org/series/31633/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/138919/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/138919/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6BD3D43D55;\n\tWed, 27 Mar 2024 23:42:19 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6D74E42E50;\n\tWed, 27 Mar 2024 23:38:57 +0100 (CET)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id E486741148\n for <dev@dpdk.org>; Wed, 27 Mar 2024 23:38:10 +0100 (CET)", "by linux.microsoft.com (Postfix, from userid 1086)\n id DE9A420E6F3E; Wed, 27 Mar 2024 15:38:00 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com DE9A420E6F3E", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1711579082;\n bh=SDax7dAECVtCppBj6PIAjg3aKSYmxK9hky5toyf31ek=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=UOUu8fw+YGgTCQzA2OPFt+XJmO+tZWrIaDbeXjGWWqPsPiAHf8VKADR0Dh+/Udqxm\n U04rBGza/s9GQ3JXZD7Mx9hXkX1RQRCgh0XrfQVkGTNjR5yUDwxwnyXBazw/1gxKd4\n A6zI31cq2N8zayXrDzyXsmCOEzkUCzuj4+mHYLxI=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "=?utf-8?q?Mattias_R=C3=B6nnblom?= <mattias.ronnblom@ericsson.com>,\n\t=?utf-8?q?Morten_Br=C3=B8rup?= <mb@smartsharesystems.com>,\n Abdullah Sevincer <abdullah.sevincer@intel.com>,\n Ajit Khaparde <ajit.khaparde@broadcom.com>, Alok Prasad <palok@marvell.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Anoob Joseph <anoobj@marvell.com>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Byron Marohn <byron.marohn@intel.com>, Chenbo Xia <chenbox@nvidia.com>,\n Chengwen Feng <fengchengwen@huawei.com>,\n Ciara Loftus <ciara.loftus@intel.com>, Ciara Power <ciara.power@intel.com>,\n Dariusz Sosnowski <dsosnowski@nvidia.com>, David Hunt <david.hunt@intel.com>,\n Devendra Singh Rawat <dsinghrawat@marvell.com>,\n Erik Gabriel Carrillo <erik.g.carrillo@intel.com>,\n Guoyang Zhou <zhouguoyang@huawei.com>, Harman Kalra <hkalra@marvell.com>,\n Harry van Haaren <harry.van.haaren@intel.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Jakub Grajciar <jgrajcia@cisco.com>, Jerin Jacob <jerinj@marvell.com>,\n Jeroen de Borst <jeroendb@google.com>, Jian Wang <jianwang@trustnetic.com>,\n Jiawen Wu <jiawenwu@trustnetic.com>, Jie Hai <haijie1@huawei.com>,\n Jingjing Wu <jingjing.wu@intel.com>, Joshua Washington <joshwash@google.com>,\n Joyce Kong <joyce.kong@arm.com>, Junfeng Guo <junfeng.guo@intel.com>,\n Kevin Laatz <kevin.laatz@intel.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Liang Ma <liangma@liangbit.com>, Long Li <longli@microsoft.com>,\n Maciej Czekaj <mczekaj@marvell.com>, Matan Azrad <matan@nvidia.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Nicolas Chautru <nicolas.chautru@intel.com>, Ori Kam <orika@nvidia.com>,\n Pavan Nikhilesh <pbhagavatula@marvell.com>,\n Peter Mccarthy <peter.mccarthy@intel.com>,\n Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>,\n Reshma Pattan <reshma.pattan@intel.com>, Rosen Xu <rosen.xu@intel.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Rushil Gupta <rushilg@google.com>,\n Sameh Gobriel <sameh.gobriel@intel.com>,\n Sivaprasad Tummala <sivaprasad.tummala@amd.com>,\n Somnath Kotur <somnath.kotur@broadcom.com>,\n Stephen Hemminger <stephen@networkplumber.org>,\n Suanming Mou <suanmingm@nvidia.com>, Sunil Kumar Kori <skori@marvell.com>,\n Sunil Uttarwar <sunilprakashrao.uttarwar@amd.com>,\n Tetsuya Mukawa <mtetsuyah@gmail.com>, Vamsi Attunuru <vattunuru@marvell.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Vladimir Medvedkin <vladimir.medvedkin@intel.com>,\n Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>,\n Yipeng Wang <yipeng1.wang@intel.com>, Yisen Zhuang <yisen.zhuang@huawei.com>,\n Yuying Zhang <Yuying.Zhang@intel.com>, Yuying Zhang <yuying.zhang@intel.com>,\n Ziyang Xuan <xuanziyang2@huawei.com>,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH v3 43/45] app/test-crypto-perf: use rte stdatomic API", "Date": "Wed, 27 Mar 2024 15:37:56 -0700", "Message-Id": "<1711579078-10624-44-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1711579078-10624-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1710967892-7046-1-git-send-email-roretzla@linux.microsoft.com>\n <1711579078-10624-1-git-send-email-roretzla@linux.microsoft.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Replace the use of gcc builtin __atomic_xxx intrinsics with\ncorresponding rte_atomic_xxx optional rte stdatomic API.\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\nAcked-by: Stephen Hemminger <stephen@networkplumber.org>\n---\n app/test-crypto-perf/cperf_test_latency.c | 6 +++---\n app/test-crypto-perf/cperf_test_pmd_cyclecount.c | 10 +++++-----\n app/test-crypto-perf/cperf_test_throughput.c | 10 +++++-----\n app/test-crypto-perf/cperf_test_verify.c | 10 +++++-----\n 4 files changed, 18 insertions(+), 18 deletions(-)", "diff": "diff --git a/app/test-crypto-perf/cperf_test_latency.c b/app/test-crypto-perf/cperf_test_latency.c\nindex 99b7d7c..b8ad6bf 100644\n--- a/app/test-crypto-perf/cperf_test_latency.c\n+++ b/app/test-crypto-perf/cperf_test_latency.c\n@@ -136,7 +136,7 @@ struct priv_op_data {\n \tuint32_t imix_idx = 0;\n \tint ret = 0;\n \n-\tstatic uint16_t display_once;\n+\tstatic RTE_ATOMIC(uint16_t) display_once;\n \n \tif (ctx == NULL)\n \t\treturn 0;\n@@ -341,8 +341,8 @@ struct priv_op_data {\n \n \t\tuint16_t exp = 0;\n \t\tif (ctx->options->csv) {\n-\t\t\tif (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,\n-\t\t\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))\n+\t\t\tif (rte_atomic_compare_exchange_strong_explicit(&display_once, &exp, 1,\n+\t\t\t\t\trte_memory_order_relaxed, rte_memory_order_relaxed))\n \t\t\t\tprintf(\"\\n# lcore, Buffer Size, Burst Size, Pakt Seq #, \"\n \t\t\t\t\t\t\"cycles, time (us)\");\n \ndiff --git a/app/test-crypto-perf/cperf_test_pmd_cyclecount.c b/app/test-crypto-perf/cperf_test_pmd_cyclecount.c\nindex 4a60f6d..7191d99 100644\n--- a/app/test-crypto-perf/cperf_test_pmd_cyclecount.c\n+++ b/app/test-crypto-perf/cperf_test_pmd_cyclecount.c\n@@ -396,7 +396,7 @@ struct pmd_cyclecount_state {\n \tstate.lcore = rte_lcore_id();\n \tstate.linearize = 0;\n \n-\tstatic uint16_t display_once;\n+\tstatic RTE_ATOMIC(uint16_t) display_once;\n \tstatic bool warmup = true;\n \n \t/*\n@@ -443,8 +443,8 @@ struct pmd_cyclecount_state {\n \n \t\tuint16_t exp = 0;\n \t\tif (!opts->csv) {\n-\t\t\tif (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,\n-\t\t\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))\n+\t\t\tif (rte_atomic_compare_exchange_strong_explicit(&display_once, &exp, 1,\n+\t\t\t\t\trte_memory_order_relaxed, rte_memory_order_relaxed))\n \t\t\t\tprintf(PRETTY_HDR_FMT, \"lcore id\", \"Buf Size\",\n \t\t\t\t\t\t\"Burst Size\", \"Enqueued\",\n \t\t\t\t\t\t\"Dequeued\", \"Enq Retries\",\n@@ -460,8 +460,8 @@ struct pmd_cyclecount_state {\n \t\t\t\t\tstate.cycles_per_enq,\n \t\t\t\t\tstate.cycles_per_deq);\n \t\t} else {\n-\t\t\tif (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,\n-\t\t\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))\n+\t\t\tif (rte_atomic_compare_exchange_strong_explicit(&display_once, &exp, 1,\n+\t\t\t\t\trte_memory_order_relaxed, rte_memory_order_relaxed))\n \t\t\t\tprintf(CSV_HDR_FMT, \"# lcore id\", \"Buf Size\",\n \t\t\t\t\t\t\"Burst Size\", \"Enqueued\",\n \t\t\t\t\t\t\"Dequeued\", \"Enq Retries\",\ndiff --git a/app/test-crypto-perf/cperf_test_throughput.c b/app/test-crypto-perf/cperf_test_throughput.c\nindex e3d266d..c0891e7 100644\n--- a/app/test-crypto-perf/cperf_test_throughput.c\n+++ b/app/test-crypto-perf/cperf_test_throughput.c\n@@ -107,7 +107,7 @@ struct cperf_throughput_ctx {\n \tuint8_t burst_size_idx = 0;\n \tuint32_t imix_idx = 0;\n \n-\tstatic uint16_t display_once;\n+\tstatic RTE_ATOMIC(uint16_t) display_once;\n \n \tstruct rte_crypto_op *ops[ctx->options->max_burst_size];\n \tstruct rte_crypto_op *ops_processed[ctx->options->max_burst_size];\n@@ -277,8 +277,8 @@ struct cperf_throughput_ctx {\n \n \t\tuint16_t exp = 0;\n \t\tif (!ctx->options->csv) {\n-\t\t\tif (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,\n-\t\t\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))\n+\t\t\tif (rte_atomic_compare_exchange_strong_explicit(&display_once, &exp, 1,\n+\t\t\t\t\trte_memory_order_relaxed, rte_memory_order_relaxed))\n \t\t\t\tprintf(\"%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\\n\\n\",\n \t\t\t\t\t\"lcore id\", \"Buf Size\", \"Burst Size\",\n \t\t\t\t\t\"Enqueued\", \"Dequeued\", \"Failed Enq\",\n@@ -298,8 +298,8 @@ struct cperf_throughput_ctx {\n \t\t\t\t\tthroughput_gbps,\n \t\t\t\t\tcycles_per_packet);\n \t\t} else {\n-\t\t\tif (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,\n-\t\t\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))\n+\t\t\tif (rte_atomic_compare_exchange_strong_explicit(&display_once, &exp, 1,\n+\t\t\t\t\trte_memory_order_relaxed, rte_memory_order_relaxed))\n \t\t\t\tprintf(\"#lcore id,Buffer Size(B),\"\n \t\t\t\t\t\"Burst Size,Enqueued,Dequeued,Failed Enq,\"\n \t\t\t\t\t\"Failed Deq,Ops(Millions),Throughput(Gbps),\"\ndiff --git a/app/test-crypto-perf/cperf_test_verify.c b/app/test-crypto-perf/cperf_test_verify.c\nindex 3548509..222c7a1 100644\n--- a/app/test-crypto-perf/cperf_test_verify.c\n+++ b/app/test-crypto-perf/cperf_test_verify.c\n@@ -216,7 +216,7 @@ struct cperf_op_result {\n \tuint64_t ops_deqd = 0, ops_deqd_total = 0, ops_deqd_failed = 0;\n \tuint64_t ops_failed = 0;\n \n-\tstatic uint16_t display_once;\n+\tstatic RTE_ATOMIC(uint16_t) display_once;\n \n \tuint64_t i;\n \tuint16_t ops_unused = 0;\n@@ -370,8 +370,8 @@ struct cperf_op_result {\n \n \tuint16_t exp = 0;\n \tif (!ctx->options->csv) {\n-\t\tif (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,\n-\t\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))\n+\t\tif (rte_atomic_compare_exchange_strong_explicit(&display_once, &exp, 1,\n+\t\t\t\trte_memory_order_relaxed, rte_memory_order_relaxed))\n \t\t\tprintf(\"%12s%12s%12s%12s%12s%12s%12s%12s\\n\\n\",\n \t\t\t\t\"lcore id\", \"Buf Size\", \"Burst size\",\n \t\t\t\t\"Enqueued\", \"Dequeued\", \"Failed Enq\",\n@@ -388,8 +388,8 @@ struct cperf_op_result {\n \t\t\t\tops_deqd_failed,\n \t\t\t\tops_failed);\n \t} else {\n-\t\tif (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,\n-\t\t\t\t__ATOMIC_RELAXED, __ATOMIC_RELAXED))\n+\t\tif (rte_atomic_compare_exchange_strong_explicit(&display_once, &exp, 1,\n+\t\t\t\trte_memory_order_relaxed, rte_memory_order_relaxed))\n \t\t\tprintf(\"\\n# lcore id, Buffer Size(B), \"\n \t\t\t\t\"Burst Size,Enqueued,Dequeued,Failed Enq,\"\n \t\t\t\t\"Failed Deq,Failed Ops\\n\");\n", "prefixes": [ "v3", "43/45" ] }