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GET /api/patches/138901/?format=api
{ "id": 138901, "url": "http://patches.dpdk.org/api/patches/138901/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1711579078-10624-26-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1711579078-10624-26-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1711579078-10624-26-git-send-email-roretzla@linux.microsoft.com", "date": "2024-03-27T22:37:38", "name": "[v3,25/45] event/dsw: use rte stdatomic API", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "19586befe175080daf9a39f16fb6752842c2ed94", "submitter": { "id": 2077, "url": "http://patches.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1711579078-10624-26-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 31633, "url": "http://patches.dpdk.org/api/series/31633/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31633", "date": "2024-03-27T22:37:13", "name": "use stdatomic API", "version": 3, "mbox": "http://patches.dpdk.org/series/31633/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/138901/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/138901/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C789943D55;\n\tWed, 27 Mar 2024 23:40:35 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0869542E08;\n\tWed, 27 Mar 2024 23:38:37 +0100 (CET)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id 30B82427D8\n for <dev@dpdk.org>; Wed, 27 Mar 2024 23:38:06 +0100 (CET)", "by linux.microsoft.com (Postfix, from userid 1086)\n id 948D120E6F05; Wed, 27 Mar 2024 15:38:00 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com 948D120E6F05", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1711579081;\n bh=U2HlkcwSUwt/gyMIUyHy7KM8QovF9BrHelOMP8btdng=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=QlCLClcbKtYOqLcxAeX+HhKhx1avJJjCECsVPcQ8EvSOFIx+T+kv7PopZ8mi8y/gM\n 5J0rMJ7mfxT+PnD3PY7wK9v3KXHOdVvoRzmbyC+PleDU8Q8dpsbvFzY6gBo1JnQO3z\n 1BJcDPUBtS/HW0xJpasF8kdSVD0QpKFrNJVsxrQQ=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "=?utf-8?q?Mattias_R=C3=B6nnblom?= <mattias.ronnblom@ericsson.com>,\n\t=?utf-8?q?Morten_Br=C3=B8rup?= <mb@smartsharesystems.com>,\n Abdullah Sevincer <abdullah.sevincer@intel.com>,\n Ajit Khaparde <ajit.khaparde@broadcom.com>, Alok Prasad <palok@marvell.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Anoob Joseph <anoobj@marvell.com>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Byron Marohn <byron.marohn@intel.com>, Chenbo Xia <chenbox@nvidia.com>,\n Chengwen Feng <fengchengwen@huawei.com>,\n Ciara Loftus <ciara.loftus@intel.com>, Ciara Power <ciara.power@intel.com>,\n Dariusz Sosnowski <dsosnowski@nvidia.com>, David Hunt <david.hunt@intel.com>,\n Devendra Singh Rawat <dsinghrawat@marvell.com>,\n Erik Gabriel Carrillo <erik.g.carrillo@intel.com>,\n Guoyang Zhou <zhouguoyang@huawei.com>, Harman Kalra <hkalra@marvell.com>,\n Harry van Haaren <harry.van.haaren@intel.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Jakub Grajciar <jgrajcia@cisco.com>, Jerin Jacob <jerinj@marvell.com>,\n Jeroen de Borst <jeroendb@google.com>, Jian Wang <jianwang@trustnetic.com>,\n Jiawen Wu <jiawenwu@trustnetic.com>, Jie Hai <haijie1@huawei.com>,\n Jingjing Wu <jingjing.wu@intel.com>, Joshua Washington <joshwash@google.com>,\n Joyce Kong <joyce.kong@arm.com>, Junfeng Guo <junfeng.guo@intel.com>,\n Kevin Laatz <kevin.laatz@intel.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Liang Ma <liangma@liangbit.com>, Long Li <longli@microsoft.com>,\n Maciej Czekaj <mczekaj@marvell.com>, Matan Azrad <matan@nvidia.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Nicolas Chautru <nicolas.chautru@intel.com>, Ori Kam <orika@nvidia.com>,\n Pavan Nikhilesh <pbhagavatula@marvell.com>,\n Peter Mccarthy <peter.mccarthy@intel.com>,\n Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>,\n Reshma Pattan <reshma.pattan@intel.com>, Rosen Xu <rosen.xu@intel.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Rushil Gupta <rushilg@google.com>,\n Sameh Gobriel <sameh.gobriel@intel.com>,\n Sivaprasad Tummala <sivaprasad.tummala@amd.com>,\n Somnath Kotur <somnath.kotur@broadcom.com>,\n Stephen Hemminger <stephen@networkplumber.org>,\n Suanming Mou <suanmingm@nvidia.com>, Sunil Kumar Kori <skori@marvell.com>,\n Sunil Uttarwar <sunilprakashrao.uttarwar@amd.com>,\n Tetsuya Mukawa <mtetsuyah@gmail.com>, Vamsi Attunuru <vattunuru@marvell.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Vladimir Medvedkin <vladimir.medvedkin@intel.com>,\n Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>,\n Yipeng Wang <yipeng1.wang@intel.com>, Yisen Zhuang <yisen.zhuang@huawei.com>,\n Yuying Zhang <Yuying.Zhang@intel.com>, Yuying Zhang <yuying.zhang@intel.com>,\n Ziyang Xuan <xuanziyang2@huawei.com>,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH v3 25/45] event/dsw: use rte stdatomic API", "Date": "Wed, 27 Mar 2024 15:37:38 -0700", "Message-Id": "<1711579078-10624-26-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1711579078-10624-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1710967892-7046-1-git-send-email-roretzla@linux.microsoft.com>\n <1711579078-10624-1-git-send-email-roretzla@linux.microsoft.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Replace the use of gcc builtin __atomic_xxx intrinsics with\ncorresponding rte_atomic_xxx optional rte stdatomic API.\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\nAcked-by: Stephen Hemminger <stephen@networkplumber.org>\nReviewed-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>\n---\n drivers/event/dsw/dsw_evdev.h | 6 +++---\n drivers/event/dsw/dsw_event.c | 47 +++++++++++++++++++++++++++---------------\n drivers/event/dsw/dsw_xstats.c | 4 ++--\n 3 files changed, 35 insertions(+), 22 deletions(-)", "diff": "diff --git a/drivers/event/dsw/dsw_evdev.h b/drivers/event/dsw/dsw_evdev.h\nindex d745c89..20431d2 100644\n--- a/drivers/event/dsw/dsw_evdev.h\n+++ b/drivers/event/dsw/dsw_evdev.h\n@@ -227,9 +227,9 @@ struct dsw_port {\n \tstruct rte_ring *ctl_in_ring __rte_cache_aligned;\n \n \t/* Estimate of current port load. */\n-\tint16_t load __rte_cache_aligned;\n+\tRTE_ATOMIC(int16_t) load __rte_cache_aligned;\n \t/* Estimate of flows currently migrating to this port. */\n-\tint32_t immigration_load __rte_cache_aligned;\n+\tRTE_ATOMIC(int32_t) immigration_load __rte_cache_aligned;\n } __rte_cache_aligned;\n \n struct dsw_queue {\n@@ -252,7 +252,7 @@ struct dsw_evdev {\n \tuint8_t num_queues;\n \tint32_t max_inflight;\n \n-\tint32_t credits_on_loan __rte_cache_aligned;\n+\tRTE_ATOMIC(int32_t) credits_on_loan __rte_cache_aligned;\n };\n \n #define DSW_CTL_PAUS_REQ (0)\ndiff --git a/drivers/event/dsw/dsw_event.c b/drivers/event/dsw/dsw_event.c\nindex 23488d9..70c3c3a 100644\n--- a/drivers/event/dsw/dsw_event.c\n+++ b/drivers/event/dsw/dsw_event.c\n@@ -33,7 +33,8 @@\n \t}\n \n \ttotal_on_loan =\n-\t\t__atomic_load_n(&dsw->credits_on_loan, __ATOMIC_RELAXED);\n+\t\trte_atomic_load_explicit(&dsw->credits_on_loan,\n+\t\t\t\t\t rte_memory_order_relaxed);\n \tavailable = dsw->max_inflight - total_on_loan;\n \tacquired_credits = RTE_MAX(missing_credits, DSW_PORT_MIN_CREDITS);\n \n@@ -45,13 +46,16 @@\n \t * allocation.\n \t */\n \tnew_total_on_loan =\n-\t __atomic_fetch_add(&dsw->credits_on_loan, acquired_credits,\n-\t\t\t __ATOMIC_RELAXED) + acquired_credits;\n+\t rte_atomic_fetch_add_explicit(&dsw->credits_on_loan,\n+\t\t\t\t\t acquired_credits,\n+\t\t\t\t\t rte_memory_order_relaxed) +\n+\t\t\t\t\t acquired_credits;\n \n \tif (unlikely(new_total_on_loan > dsw->max_inflight)) {\n \t\t/* Some other port took the last credits */\n-\t\t__atomic_fetch_sub(&dsw->credits_on_loan, acquired_credits,\n-\t\t\t\t __ATOMIC_RELAXED);\n+\t\trte_atomic_fetch_sub_explicit(&dsw->credits_on_loan,\n+\t\t\t\t\t acquired_credits,\n+\t\t\t\t\t rte_memory_order_relaxed);\n \t\treturn false;\n \t}\n \n@@ -77,8 +81,9 @@\n \n \t\tport->inflight_credits = leave_credits;\n \n-\t\t__atomic_fetch_sub(&dsw->credits_on_loan, return_credits,\n-\t\t\t\t __ATOMIC_RELAXED);\n+\t\trte_atomic_fetch_sub_explicit(&dsw->credits_on_loan,\n+\t\t\t\t\t return_credits,\n+\t\t\t\t\t rte_memory_order_relaxed);\n \n \t\tDSW_LOG_DP_PORT(DEBUG, port->id,\n \t\t\t\t\"Returned %d tokens to pool.\\n\",\n@@ -156,19 +161,22 @@\n \tint16_t period_load;\n \tint16_t new_load;\n \n-\told_load = __atomic_load_n(&port->load, __ATOMIC_RELAXED);\n+\told_load = rte_atomic_load_explicit(&port->load,\n+\t\t\t\t\t rte_memory_order_relaxed);\n \n \tperiod_load = dsw_port_load_close_period(port, now);\n \n \tnew_load = (period_load + old_load*DSW_OLD_LOAD_WEIGHT) /\n \t\t(DSW_OLD_LOAD_WEIGHT+1);\n \n-\t__atomic_store_n(&port->load, new_load, __ATOMIC_RELAXED);\n+\trte_atomic_store_explicit(&port->load, new_load,\n+\t\t\t\t rte_memory_order_relaxed);\n \n \t/* The load of the recently immigrated flows should hopefully\n \t * be reflected the load estimate by now.\n \t */\n-\t__atomic_store_n(&port->immigration_load, 0, __ATOMIC_RELAXED);\n+\trte_atomic_store_explicit(&port->immigration_load, 0,\n+\t\t\t\t rte_memory_order_relaxed);\n }\n \n static void\n@@ -390,10 +398,11 @@ struct dsw_queue_flow_burst {\n \n \tfor (i = 0; i < dsw->num_ports; i++) {\n \t\tint16_t measured_load =\n-\t\t\t__atomic_load_n(&dsw->ports[i].load, __ATOMIC_RELAXED);\n+\t\t\trte_atomic_load_explicit(&dsw->ports[i].load,\n+\t\t\t\t\t\t rte_memory_order_relaxed);\n \t\tint32_t immigration_load =\n-\t\t\t__atomic_load_n(&dsw->ports[i].immigration_load,\n-\t\t\t\t\t__ATOMIC_RELAXED);\n+\t\t rte_atomic_load_explicit(&dsw->ports[i].immigration_load,\n+\t\t\t\t\t rte_memory_order_relaxed);\n \t\tint32_t load = measured_load + immigration_load;\n \n \t\tload = RTE_MIN(load, DSW_MAX_LOAD);\n@@ -523,8 +532,10 @@ struct dsw_queue_flow_burst {\n \ttarget_qfs[*targets_len] = *candidate_qf;\n \t(*targets_len)++;\n \n-\t__atomic_fetch_add(&dsw->ports[candidate_port_id].immigration_load,\n-\t\t\t candidate_flow_load, __ATOMIC_RELAXED);\n+\trte_atomic_fetch_add_explicit(\n+\t\t\t\t&dsw->ports[candidate_port_id].immigration_load,\n+\t\t\t\t candidate_flow_load,\n+\t\t\t\t rte_memory_order_relaxed);\n \n \treturn true;\n }\n@@ -882,7 +893,8 @@ struct dsw_queue_flow_burst {\n \t}\n \n \tsource_port_load =\n-\t\t__atomic_load_n(&source_port->load, __ATOMIC_RELAXED);\n+\t\trte_atomic_load_explicit(&source_port->load,\n+\t\t\t\t\t rte_memory_order_relaxed);\n \tif (source_port_load < DSW_MIN_SOURCE_LOAD_FOR_MIGRATION) {\n \t\tDSW_LOG_DP_PORT(DEBUG, source_port->id,\n \t\t \"Load %d is below threshold level %d.\\n\",\n@@ -1301,7 +1313,8 @@ struct dsw_queue_flow_burst {\n \t * above the water mark.\n \t */\n \tif (unlikely(num_new > 0 &&\n-\t\t __atomic_load_n(&dsw->credits_on_loan, __ATOMIC_RELAXED) >\n+\t\t rte_atomic_load_explicit(&dsw->credits_on_loan,\n+\t\t\t\t\t rte_memory_order_relaxed) >\n \t\t source_port->new_event_threshold))\n \t\treturn 0;\n \ndiff --git a/drivers/event/dsw/dsw_xstats.c b/drivers/event/dsw/dsw_xstats.c\nindex 2a83a28..f61dfd8 100644\n--- a/drivers/event/dsw/dsw_xstats.c\n+++ b/drivers/event/dsw/dsw_xstats.c\n@@ -48,7 +48,7 @@ struct dsw_xstats_port {\n static uint64_t\n dsw_xstats_dev_credits_on_loan(struct dsw_evdev *dsw)\n {\n-\treturn __atomic_load_n(&dsw->credits_on_loan, __ATOMIC_RELAXED);\n+\treturn rte_atomic_load_explicit(&dsw->credits_on_loan, rte_memory_order_relaxed);\n }\n \n static struct dsw_xstat_dev dsw_dev_xstats[] = {\n@@ -126,7 +126,7 @@ struct dsw_xstats_port {\n {\n \tint16_t load;\n \n-\tload = __atomic_load_n(&dsw->ports[port_id].load, __ATOMIC_RELAXED);\n+\tload = rte_atomic_load_explicit(&dsw->ports[port_id].load, rte_memory_order_relaxed);\n \n \treturn DSW_LOAD_TO_PERCENT(load);\n }\n", "prefixes": [ "v3", "25/45" ] }