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GET /api/patches/138900/?format=api
{ "id": 138900, "url": "http://patches.dpdk.org/api/patches/138900/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1711579078-10624-25-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1711579078-10624-25-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1711579078-10624-25-git-send-email-roretzla@linux.microsoft.com", "date": "2024-03-27T22:37:37", "name": "[v3,24/45] event/octeontx: use rte stdatomic API", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "16c2e1044b19e130a55952a08000e56af2e3e0a7", "submitter": { "id": 2077, "url": "http://patches.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1711579078-10624-25-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 31633, "url": "http://patches.dpdk.org/api/series/31633/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31633", "date": "2024-03-27T22:37:13", "name": "use stdatomic API", "version": 3, "mbox": "http://patches.dpdk.org/series/31633/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/138900/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/138900/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D292843D55;\n\tWed, 27 Mar 2024 23:40:29 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0C20D42E04;\n\tWed, 27 Mar 2024 23:38:36 +0100 (CET)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id E533641153\n for <dev@dpdk.org>; Wed, 27 Mar 2024 23:38:05 +0100 (CET)", "by linux.microsoft.com (Postfix, from userid 1086)\n id 8202B20E6F04; Wed, 27 Mar 2024 15:38:00 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com 8202B20E6F04", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1711579081;\n bh=+mq2qrpkot0AE5SJ47OtcChciXgAR6pO8ENzIk52LpA=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=Bid7fvWI+Kesk/rPJDn7OAMPumkhgPEXPSKNH1LR0DqwOd5HfyM3j3OnJeQgRDMQQ\n ewMCgbfRnkLJez1sEQLprw02tQ7sFQwzBmAOtHesGC59gNpJ4syzcsAwXIGqnpILn6\n saBSqWIOo13GIq5jpeGhveHsCi+2imdKyye9y7OM=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "=?utf-8?q?Mattias_R=C3=B6nnblom?= <mattias.ronnblom@ericsson.com>,\n\t=?utf-8?q?Morten_Br=C3=B8rup?= <mb@smartsharesystems.com>,\n Abdullah Sevincer <abdullah.sevincer@intel.com>,\n Ajit Khaparde <ajit.khaparde@broadcom.com>, Alok Prasad <palok@marvell.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Anoob Joseph <anoobj@marvell.com>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Byron Marohn <byron.marohn@intel.com>, Chenbo Xia <chenbox@nvidia.com>,\n Chengwen Feng <fengchengwen@huawei.com>,\n Ciara Loftus <ciara.loftus@intel.com>, Ciara Power <ciara.power@intel.com>,\n Dariusz Sosnowski <dsosnowski@nvidia.com>, David Hunt <david.hunt@intel.com>,\n Devendra Singh Rawat <dsinghrawat@marvell.com>,\n Erik Gabriel Carrillo <erik.g.carrillo@intel.com>,\n Guoyang Zhou <zhouguoyang@huawei.com>, Harman Kalra <hkalra@marvell.com>,\n Harry van Haaren <harry.van.haaren@intel.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Jakub Grajciar <jgrajcia@cisco.com>, Jerin Jacob <jerinj@marvell.com>,\n Jeroen de Borst <jeroendb@google.com>, Jian Wang <jianwang@trustnetic.com>,\n Jiawen Wu <jiawenwu@trustnetic.com>, Jie Hai <haijie1@huawei.com>,\n Jingjing Wu <jingjing.wu@intel.com>, Joshua Washington <joshwash@google.com>,\n Joyce Kong <joyce.kong@arm.com>, Junfeng Guo <junfeng.guo@intel.com>,\n Kevin Laatz <kevin.laatz@intel.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Liang Ma <liangma@liangbit.com>, Long Li <longli@microsoft.com>,\n Maciej Czekaj <mczekaj@marvell.com>, Matan Azrad <matan@nvidia.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Nicolas Chautru <nicolas.chautru@intel.com>, Ori Kam <orika@nvidia.com>,\n Pavan Nikhilesh <pbhagavatula@marvell.com>,\n Peter Mccarthy <peter.mccarthy@intel.com>,\n Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>,\n Reshma Pattan <reshma.pattan@intel.com>, Rosen Xu <rosen.xu@intel.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Rushil Gupta <rushilg@google.com>,\n Sameh Gobriel <sameh.gobriel@intel.com>,\n Sivaprasad Tummala <sivaprasad.tummala@amd.com>,\n Somnath Kotur <somnath.kotur@broadcom.com>,\n Stephen Hemminger <stephen@networkplumber.org>,\n Suanming Mou <suanmingm@nvidia.com>, Sunil Kumar Kori <skori@marvell.com>,\n Sunil Uttarwar <sunilprakashrao.uttarwar@amd.com>,\n Tetsuya Mukawa <mtetsuyah@gmail.com>, Vamsi Attunuru <vattunuru@marvell.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Vladimir Medvedkin <vladimir.medvedkin@intel.com>,\n Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>,\n Yipeng Wang <yipeng1.wang@intel.com>, Yisen Zhuang <yisen.zhuang@huawei.com>,\n Yuying Zhang <Yuying.Zhang@intel.com>, Yuying Zhang <yuying.zhang@intel.com>,\n Ziyang Xuan <xuanziyang2@huawei.com>,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH v3 24/45] event/octeontx: use rte stdatomic API", "Date": "Wed, 27 Mar 2024 15:37:37 -0700", "Message-Id": "<1711579078-10624-25-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1711579078-10624-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1710967892-7046-1-git-send-email-roretzla@linux.microsoft.com>\n <1711579078-10624-1-git-send-email-roretzla@linux.microsoft.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Replace the use of gcc builtin __atomic_xxx intrinsics with\ncorresponding rte_atomic_xxx optional rte stdatomic API.\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\nAcked-by: Stephen Hemminger <stephen@networkplumber.org>\n---\n drivers/event/octeontx/timvf_evdev.h | 8 ++++----\n drivers/event/octeontx/timvf_worker.h | 36 +++++++++++++++++------------------\n 2 files changed, 22 insertions(+), 22 deletions(-)", "diff": "diff --git a/drivers/event/octeontx/timvf_evdev.h b/drivers/event/octeontx/timvf_evdev.h\nindex cef02cd..4bfc3d7 100644\n--- a/drivers/event/octeontx/timvf_evdev.h\n+++ b/drivers/event/octeontx/timvf_evdev.h\n@@ -126,15 +126,15 @@ enum timvf_clk_src {\n struct tim_mem_bucket {\n \tuint64_t first_chunk;\n \tunion {\n-\t\tuint64_t w1;\n+\t\tRTE_ATOMIC(uint64_t) w1;\n \t\tstruct {\n-\t\t\tuint32_t nb_entry;\n+\t\t\tRTE_ATOMIC(uint32_t) nb_entry;\n \t\t\tuint8_t sbt:1;\n \t\t\tuint8_t hbt:1;\n \t\t\tuint8_t bsk:1;\n \t\t\tuint8_t rsvd:5;\n-\t\t\tuint8_t lock;\n-\t\t\tint16_t chunk_remainder;\n+\t\t\tRTE_ATOMIC(uint8_t) lock;\n+\t\t\tRTE_ATOMIC(int16_t) chunk_remainder;\n \t\t};\n \t};\n \tuint64_t current_chunk;\ndiff --git a/drivers/event/octeontx/timvf_worker.h b/drivers/event/octeontx/timvf_worker.h\nindex e4b923e..de9f1b0 100644\n--- a/drivers/event/octeontx/timvf_worker.h\n+++ b/drivers/event/octeontx/timvf_worker.h\n@@ -19,22 +19,22 @@\n static inline int16_t\n timr_bkt_get_rem(struct tim_mem_bucket *bktp)\n {\n-\treturn __atomic_load_n(&bktp->chunk_remainder,\n-\t\t\t__ATOMIC_ACQUIRE);\n+\treturn rte_atomic_load_explicit(&bktp->chunk_remainder,\n+\t\t\trte_memory_order_acquire);\n }\n \n static inline void\n timr_bkt_set_rem(struct tim_mem_bucket *bktp, uint16_t v)\n {\n-\t__atomic_store_n(&bktp->chunk_remainder, v,\n-\t\t\t__ATOMIC_RELEASE);\n+\trte_atomic_store_explicit(&bktp->chunk_remainder, v,\n+\t\t\trte_memory_order_release);\n }\n \n static inline void\n timr_bkt_sub_rem(struct tim_mem_bucket *bktp, uint16_t v)\n {\n-\t__atomic_fetch_sub(&bktp->chunk_remainder, v,\n-\t\t\t__ATOMIC_RELEASE);\n+\trte_atomic_fetch_sub_explicit(&bktp->chunk_remainder, v,\n+\t\t\trte_memory_order_release);\n }\n \n static inline uint8_t\n@@ -47,14 +47,14 @@\n timr_bkt_set_sbt(struct tim_mem_bucket *bktp)\n {\n \tconst uint64_t v = TIM_BUCKET_W1_M_SBT << TIM_BUCKET_W1_S_SBT;\n-\treturn __atomic_fetch_or(&bktp->w1, v, __ATOMIC_ACQ_REL);\n+\treturn rte_atomic_fetch_or_explicit(&bktp->w1, v, rte_memory_order_acq_rel);\n }\n \n static inline uint64_t\n timr_bkt_clr_sbt(struct tim_mem_bucket *bktp)\n {\n \tconst uint64_t v = ~(TIM_BUCKET_W1_M_SBT << TIM_BUCKET_W1_S_SBT);\n-\treturn __atomic_fetch_and(&bktp->w1, v, __ATOMIC_ACQ_REL);\n+\treturn rte_atomic_fetch_and_explicit(&bktp->w1, v, rte_memory_order_acq_rel);\n }\n \n static inline uint8_t\n@@ -81,34 +81,34 @@\n {\n \t/*Clear everything except lock. */\n \tconst uint64_t v = TIM_BUCKET_W1_M_LOCK << TIM_BUCKET_W1_S_LOCK;\n-\treturn __atomic_fetch_and(&bktp->w1, v, __ATOMIC_ACQ_REL);\n+\treturn rte_atomic_fetch_and_explicit(&bktp->w1, v, rte_memory_order_acq_rel);\n }\n \n static inline uint64_t\n timr_bkt_fetch_sema_lock(struct tim_mem_bucket *bktp)\n {\n-\treturn __atomic_fetch_add(&bktp->w1, TIM_BUCKET_SEMA_WLOCK,\n-\t\t\t__ATOMIC_ACQ_REL);\n+\treturn rte_atomic_fetch_add_explicit(&bktp->w1, TIM_BUCKET_SEMA_WLOCK,\n+\t\t\trte_memory_order_acq_rel);\n }\n \n static inline uint64_t\n timr_bkt_fetch_sema(struct tim_mem_bucket *bktp)\n {\n-\treturn __atomic_fetch_add(&bktp->w1, TIM_BUCKET_SEMA,\n-\t\t\t__ATOMIC_RELAXED);\n+\treturn rte_atomic_fetch_add_explicit(&bktp->w1, TIM_BUCKET_SEMA,\n+\t\t\trte_memory_order_relaxed);\n }\n \n static inline uint64_t\n timr_bkt_inc_lock(struct tim_mem_bucket *bktp)\n {\n \tconst uint64_t v = 1ull << TIM_BUCKET_W1_S_LOCK;\n-\treturn __atomic_fetch_add(&bktp->w1, v, __ATOMIC_ACQ_REL);\n+\treturn rte_atomic_fetch_add_explicit(&bktp->w1, v, rte_memory_order_acq_rel);\n }\n \n static inline void\n timr_bkt_dec_lock(struct tim_mem_bucket *bktp)\n {\n-\t__atomic_fetch_add(&bktp->lock, 0xff, __ATOMIC_ACQ_REL);\n+\trte_atomic_fetch_add_explicit(&bktp->lock, 0xff, rte_memory_order_acq_rel);\n }\n \n static inline uint32_t\n@@ -121,13 +121,13 @@\n static inline void\n timr_bkt_inc_nent(struct tim_mem_bucket *bktp)\n {\n-\t__atomic_fetch_add(&bktp->nb_entry, 1, __ATOMIC_RELAXED);\n+\trte_atomic_fetch_add_explicit(&bktp->nb_entry, 1, rte_memory_order_relaxed);\n }\n \n static inline void\n timr_bkt_add_nent(struct tim_mem_bucket *bktp, uint32_t v)\n {\n-\t__atomic_fetch_add(&bktp->nb_entry, v, __ATOMIC_RELAXED);\n+\trte_atomic_fetch_add_explicit(&bktp->nb_entry, v, rte_memory_order_relaxed);\n }\n \n static inline uint64_t\n@@ -135,7 +135,7 @@\n {\n \tconst uint64_t v = ~(TIM_BUCKET_W1_M_NUM_ENTRIES <<\n \t\t\tTIM_BUCKET_W1_S_NUM_ENTRIES);\n-\treturn __atomic_fetch_and(&bktp->w1, v, __ATOMIC_ACQ_REL) & v;\n+\treturn rte_atomic_fetch_and_explicit(&bktp->w1, v, rte_memory_order_acq_rel) & v;\n }\n \n static inline struct tim_mem_entry *\n", "prefixes": [ "v3", "24/45" ] }