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GET /api/patches/138890/?format=api
{ "id": 138890, "url": "http://patches.dpdk.org/api/patches/138890/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1711579078-10624-15-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1711579078-10624-15-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1711579078-10624-15-git-send-email-roretzla@linux.microsoft.com", "date": "2024-03-27T22:37:27", "name": "[v3,14/45] net/memif: use rte stdatomic API", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "e499b4c48255efbc8cc76c401c8a3466b9655fcc", "submitter": { "id": 2077, "url": "http://patches.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1711579078-10624-15-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 31633, "url": "http://patches.dpdk.org/api/series/31633/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31633", "date": "2024-03-27T22:37:13", "name": "use stdatomic API", "version": 3, "mbox": "http://patches.dpdk.org/series/31633/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/138890/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/138890/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3A0D243D55;\n\tWed, 27 Mar 2024 23:39:34 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 30C5042DCA;\n\tWed, 27 Mar 2024 23:38:24 +0100 (CET)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id 53118402B2\n for <dev@dpdk.org>; Wed, 27 Mar 2024 23:38:03 +0100 (CET)", "by linux.microsoft.com (Postfix, from userid 1086)\n id C723420E6AE4; Wed, 27 Mar 2024 15:38:00 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com C723420E6AE4", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1711579080;\n bh=VnpVEnprqUczxInG9ZE3vxI8DJA/gcaNQJmuCWuZ5Fw=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=bJJossRNzL5KoocYa3wawMwM1H4l9bONxQenZfGQ5yQ+FQCNVfRIG7evxlI1xRxyA\n /lP9Nr8OvGKlZkB3jXrrioPiM/nVq4i55fAbVm01UUDlqJJLpE7bzVjfVycrFRCiKD\n oy7rh7U+h8J2lScvWciBF+ecFZ5biSLmjCTY3Dvw=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "=?utf-8?q?Mattias_R=C3=B6nnblom?= <mattias.ronnblom@ericsson.com>,\n\t=?utf-8?q?Morten_Br=C3=B8rup?= <mb@smartsharesystems.com>,\n Abdullah Sevincer <abdullah.sevincer@intel.com>,\n Ajit Khaparde <ajit.khaparde@broadcom.com>, Alok Prasad <palok@marvell.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Anoob Joseph <anoobj@marvell.com>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Byron Marohn <byron.marohn@intel.com>, Chenbo Xia <chenbox@nvidia.com>,\n Chengwen Feng <fengchengwen@huawei.com>,\n Ciara Loftus <ciara.loftus@intel.com>, Ciara Power <ciara.power@intel.com>,\n Dariusz Sosnowski <dsosnowski@nvidia.com>, David Hunt <david.hunt@intel.com>,\n Devendra Singh Rawat <dsinghrawat@marvell.com>,\n Erik Gabriel Carrillo <erik.g.carrillo@intel.com>,\n Guoyang Zhou <zhouguoyang@huawei.com>, Harman Kalra <hkalra@marvell.com>,\n Harry van Haaren <harry.van.haaren@intel.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Jakub Grajciar <jgrajcia@cisco.com>, Jerin Jacob <jerinj@marvell.com>,\n Jeroen de Borst <jeroendb@google.com>, Jian Wang <jianwang@trustnetic.com>,\n Jiawen Wu <jiawenwu@trustnetic.com>, Jie Hai <haijie1@huawei.com>,\n Jingjing Wu <jingjing.wu@intel.com>, Joshua Washington <joshwash@google.com>,\n Joyce Kong <joyce.kong@arm.com>, Junfeng Guo <junfeng.guo@intel.com>,\n Kevin Laatz <kevin.laatz@intel.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Liang Ma <liangma@liangbit.com>, Long Li <longli@microsoft.com>,\n Maciej Czekaj <mczekaj@marvell.com>, Matan Azrad <matan@nvidia.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Nicolas Chautru <nicolas.chautru@intel.com>, Ori Kam <orika@nvidia.com>,\n Pavan Nikhilesh <pbhagavatula@marvell.com>,\n Peter Mccarthy <peter.mccarthy@intel.com>,\n Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>,\n Reshma Pattan <reshma.pattan@intel.com>, Rosen Xu <rosen.xu@intel.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Rushil Gupta <rushilg@google.com>,\n Sameh Gobriel <sameh.gobriel@intel.com>,\n Sivaprasad Tummala <sivaprasad.tummala@amd.com>,\n Somnath Kotur <somnath.kotur@broadcom.com>,\n Stephen Hemminger <stephen@networkplumber.org>,\n Suanming Mou <suanmingm@nvidia.com>, Sunil Kumar Kori <skori@marvell.com>,\n Sunil Uttarwar <sunilprakashrao.uttarwar@amd.com>,\n Tetsuya Mukawa <mtetsuyah@gmail.com>, Vamsi Attunuru <vattunuru@marvell.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Vladimir Medvedkin <vladimir.medvedkin@intel.com>,\n Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>,\n Yipeng Wang <yipeng1.wang@intel.com>, Yisen Zhuang <yisen.zhuang@huawei.com>,\n Yuying Zhang <Yuying.Zhang@intel.com>, Yuying Zhang <yuying.zhang@intel.com>,\n Ziyang Xuan <xuanziyang2@huawei.com>,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH v3 14/45] net/memif: use rte stdatomic API", "Date": "Wed, 27 Mar 2024 15:37:27 -0700", "Message-Id": "<1711579078-10624-15-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1711579078-10624-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1710967892-7046-1-git-send-email-roretzla@linux.microsoft.com>\n <1711579078-10624-1-git-send-email-roretzla@linux.microsoft.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Replace the use of gcc builtin __atomic_xxx intrinsics with\ncorresponding rte_atomic_xxx optional rte stdatomic API.\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\nAcked-by: Stephen Hemminger <stephen@networkplumber.org>\n---\n drivers/net/memif/memif.h | 4 ++--\n drivers/net/memif/rte_eth_memif.c | 50 +++++++++++++++++++--------------------\n 2 files changed, 27 insertions(+), 27 deletions(-)", "diff": "diff --git a/drivers/net/memif/memif.h b/drivers/net/memif/memif.h\nindex cb72c69..ccaa218 100644\n--- a/drivers/net/memif/memif.h\n+++ b/drivers/net/memif/memif.h\n@@ -169,9 +169,9 @@ typedef struct __rte_packed __rte_aligned(128)\n \tuint32_t cookie;\t\t\t/**< MEMIF_COOKIE */\n \tuint16_t flags;\t\t\t\t/**< flags */\n #define MEMIF_RING_FLAG_MASK_INT 1\t\t/**< disable interrupt mode */\n-\tuint16_t head;\t\t\t/**< pointer to ring buffer head */\n+\tRTE_ATOMIC(uint16_t) head;\t\t\t/**< pointer to ring buffer head */\n \tMEMIF_CACHELINE_ALIGN_MARK(cacheline1);\n-\tuint16_t tail;\t\t\t/**< pointer to ring buffer tail */\n+\tRTE_ATOMIC(uint16_t) tail;\t\t\t/**< pointer to ring buffer tail */\n \tMEMIF_CACHELINE_ALIGN_MARK(cacheline2);\n \tmemif_desc_t desc[0];\t\t\t/**< buffer descriptors */\n } memif_ring_t;\ndiff --git a/drivers/net/memif/rte_eth_memif.c b/drivers/net/memif/rte_eth_memif.c\nindex 18377d9..16da22b 100644\n--- a/drivers/net/memif/rte_eth_memif.c\n+++ b/drivers/net/memif/rte_eth_memif.c\n@@ -262,7 +262,7 @@ struct mp_region_msg {\n \t * threads, so using load-acquire pairs with store-release\n \t * in function eth_memif_rx for C2S queues.\n \t */\n-\tcur_tail = __atomic_load_n(&ring->tail, __ATOMIC_ACQUIRE);\n+\tcur_tail = rte_atomic_load_explicit(&ring->tail, rte_memory_order_acquire);\n \twhile (mq->last_tail != cur_tail) {\n \t\tRTE_MBUF_PREFETCH_TO_FREE(mq->buffers[(mq->last_tail + 1) & mask]);\n \t\trte_pktmbuf_free_seg(mq->buffers[mq->last_tail & mask]);\n@@ -334,10 +334,10 @@ struct mp_region_msg {\n \n \tif (type == MEMIF_RING_C2S) {\n \t\tcur_slot = mq->last_head;\n-\t\tlast_slot = __atomic_load_n(&ring->head, __ATOMIC_ACQUIRE);\n+\t\tlast_slot = rte_atomic_load_explicit(&ring->head, rte_memory_order_acquire);\n \t} else {\n \t\tcur_slot = mq->last_tail;\n-\t\tlast_slot = __atomic_load_n(&ring->tail, __ATOMIC_ACQUIRE);\n+\t\tlast_slot = rte_atomic_load_explicit(&ring->tail, rte_memory_order_acquire);\n \t}\n \n \tif (cur_slot == last_slot)\n@@ -473,7 +473,7 @@ struct mp_region_msg {\n \n no_free_bufs:\n \tif (type == MEMIF_RING_C2S) {\n-\t\t__atomic_store_n(&ring->tail, cur_slot, __ATOMIC_RELEASE);\n+\t\trte_atomic_store_explicit(&ring->tail, cur_slot, rte_memory_order_release);\n \t\tmq->last_head = cur_slot;\n \t} else {\n \t\tmq->last_tail = cur_slot;\n@@ -485,7 +485,7 @@ struct mp_region_msg {\n \t\t * is called in the context of receiver thread. The loads in\n \t\t * the receiver do not need to synchronize with its own stores.\n \t\t */\n-\t\thead = __atomic_load_n(&ring->head, __ATOMIC_RELAXED);\n+\t\thead = rte_atomic_load_explicit(&ring->head, rte_memory_order_relaxed);\n \t\tn_slots = ring_size - head + mq->last_tail;\n \n \t\twhile (n_slots--) {\n@@ -493,7 +493,7 @@ struct mp_region_msg {\n \t\t\td0 = &ring->desc[s0];\n \t\t\td0->length = pmd->run.pkt_buffer_size;\n \t\t}\n-\t\t__atomic_store_n(&ring->head, head, __ATOMIC_RELEASE);\n+\t\trte_atomic_store_explicit(&ring->head, head, rte_memory_order_release);\n \t}\n \n \tmq->n_pkts += n_rx_pkts;\n@@ -541,7 +541,7 @@ struct mp_region_msg {\n \t * threads, so using load-acquire pairs with store-release\n \t * to synchronize it between threads.\n \t */\n-\tlast_slot = __atomic_load_n(&ring->tail, __ATOMIC_ACQUIRE);\n+\tlast_slot = rte_atomic_load_explicit(&ring->tail, rte_memory_order_acquire);\n \tif (cur_slot == last_slot)\n \t\tgoto refill;\n \tn_slots = last_slot - cur_slot;\n@@ -591,7 +591,7 @@ struct mp_region_msg {\n \t * is called in the context of receiver thread. The loads in\n \t * the receiver do not need to synchronize with its own stores.\n \t */\n-\thead = __atomic_load_n(&ring->head, __ATOMIC_RELAXED);\n+\thead = rte_atomic_load_explicit(&ring->head, rte_memory_order_relaxed);\n \tn_slots = ring_size - head + mq->last_tail;\n \n \tif (n_slots < 32)\n@@ -620,7 +620,7 @@ struct mp_region_msg {\n \t * threads, so using store-release pairs with load-acquire\n \t * in function eth_memif_tx.\n \t */\n-\t__atomic_store_n(&ring->head, head, __ATOMIC_RELEASE);\n+\trte_atomic_store_explicit(&ring->head, head, rte_memory_order_release);\n \n \tmq->n_pkts += n_rx_pkts;\n \n@@ -668,9 +668,9 @@ struct mp_region_msg {\n \t\t * its own stores. Hence, the following load can be a\n \t\t * relaxed load.\n \t\t */\n-\t\tslot = __atomic_load_n(&ring->head, __ATOMIC_RELAXED);\n+\t\tslot = rte_atomic_load_explicit(&ring->head, rte_memory_order_relaxed);\n \t\tn_free = ring_size - slot +\n-\t\t\t\t__atomic_load_n(&ring->tail, __ATOMIC_ACQUIRE);\n+\t\t\t\trte_atomic_load_explicit(&ring->tail, rte_memory_order_acquire);\n \t} else {\n \t\t/* For S2C queues ring->tail is updated by the sender and\n \t\t * this function is called in the context of sending thread.\n@@ -678,8 +678,8 @@ struct mp_region_msg {\n \t\t * its own stores. Hence, the following load can be a\n \t\t * relaxed load.\n \t\t */\n-\t\tslot = __atomic_load_n(&ring->tail, __ATOMIC_RELAXED);\n-\t\tn_free = __atomic_load_n(&ring->head, __ATOMIC_ACQUIRE) - slot;\n+\t\tslot = rte_atomic_load_explicit(&ring->tail, rte_memory_order_relaxed);\n+\t\tn_free = rte_atomic_load_explicit(&ring->head, rte_memory_order_acquire) - slot;\n \t}\n \n \tuint16_t i;\n@@ -792,9 +792,9 @@ struct mp_region_msg {\n \n no_free_slots:\n \tif (type == MEMIF_RING_C2S)\n-\t\t__atomic_store_n(&ring->head, slot, __ATOMIC_RELEASE);\n+\t\trte_atomic_store_explicit(&ring->head, slot, rte_memory_order_release);\n \telse\n-\t\t__atomic_store_n(&ring->tail, slot, __ATOMIC_RELEASE);\n+\t\trte_atomic_store_explicit(&ring->tail, slot, rte_memory_order_release);\n \n \tif (((ring->flags & MEMIF_RING_FLAG_MASK_INT) == 0) &&\n \t (rte_intr_fd_get(mq->intr_handle) >= 0)) {\n@@ -882,7 +882,7 @@ struct mp_region_msg {\n \t * its own stores. Hence, the following load can be a\n \t * relaxed load.\n \t */\n-\tslot = __atomic_load_n(&ring->head, __ATOMIC_RELAXED);\n+\tslot = rte_atomic_load_explicit(&ring->head, rte_memory_order_relaxed);\n \tn_free = ring_size - slot + mq->last_tail;\n \n \tint used_slots;\n@@ -942,7 +942,7 @@ struct mp_region_msg {\n \t * threads, so using store-release pairs with load-acquire\n \t * in function eth_memif_rx for C2S rings.\n \t */\n-\t__atomic_store_n(&ring->head, slot, __ATOMIC_RELEASE);\n+\trte_atomic_store_explicit(&ring->head, slot, rte_memory_order_release);\n \n \t/* Send interrupt, if enabled. */\n \tif ((ring->flags & MEMIF_RING_FLAG_MASK_INT) == 0) {\n@@ -1155,8 +1155,8 @@ struct mp_region_msg {\n \n \tfor (i = 0; i < pmd->run.num_c2s_rings; i++) {\n \t\tring = memif_get_ring(pmd, proc_private, MEMIF_RING_C2S, i);\n-\t\t__atomic_store_n(&ring->head, 0, __ATOMIC_RELAXED);\n-\t\t__atomic_store_n(&ring->tail, 0, __ATOMIC_RELAXED);\n+\t\trte_atomic_store_explicit(&ring->head, 0, rte_memory_order_relaxed);\n+\t\trte_atomic_store_explicit(&ring->tail, 0, rte_memory_order_relaxed);\n \t\tring->cookie = MEMIF_COOKIE;\n \t\tring->flags = 0;\n \n@@ -1175,8 +1175,8 @@ struct mp_region_msg {\n \n \tfor (i = 0; i < pmd->run.num_s2c_rings; i++) {\n \t\tring = memif_get_ring(pmd, proc_private, MEMIF_RING_S2C, i);\n-\t\t__atomic_store_n(&ring->head, 0, __ATOMIC_RELAXED);\n-\t\t__atomic_store_n(&ring->tail, 0, __ATOMIC_RELAXED);\n+\t\trte_atomic_store_explicit(&ring->head, 0, rte_memory_order_relaxed);\n+\t\trte_atomic_store_explicit(&ring->tail, 0, rte_memory_order_relaxed);\n \t\tring->cookie = MEMIF_COOKIE;\n \t\tring->flags = 0;\n \n@@ -1314,8 +1314,8 @@ struct mp_region_msg {\n \t\t\t\tMIF_LOG(ERR, \"Wrong ring\");\n \t\t\t\treturn -1;\n \t\t\t}\n-\t\t\t__atomic_store_n(&ring->head, 0, __ATOMIC_RELAXED);\n-\t\t\t__atomic_store_n(&ring->tail, 0, __ATOMIC_RELAXED);\n+\t\t\trte_atomic_store_explicit(&ring->head, 0, rte_memory_order_relaxed);\n+\t\t\trte_atomic_store_explicit(&ring->tail, 0, rte_memory_order_relaxed);\n \t\t\tmq->last_head = 0;\n \t\t\tmq->last_tail = 0;\n \t\t\t/* enable polling mode */\n@@ -1330,8 +1330,8 @@ struct mp_region_msg {\n \t\t\t\tMIF_LOG(ERR, \"Wrong ring\");\n \t\t\t\treturn -1;\n \t\t\t}\n-\t\t\t__atomic_store_n(&ring->head, 0, __ATOMIC_RELAXED);\n-\t\t\t__atomic_store_n(&ring->tail, 0, __ATOMIC_RELAXED);\n+\t\t\trte_atomic_store_explicit(&ring->head, 0, rte_memory_order_relaxed);\n+\t\t\trte_atomic_store_explicit(&ring->tail, 0, rte_memory_order_relaxed);\n \t\t\tmq->last_head = 0;\n \t\t\tmq->last_tail = 0;\n \t\t\t/* enable polling mode */\n", "prefixes": [ "v3", "14/45" ] }