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GET /api/patches/138888/?format=api
{ "id": 138888, "url": "http://patches.dpdk.org/api/patches/138888/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1711579078-10624-13-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1711579078-10624-13-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1711579078-10624-13-git-send-email-roretzla@linux.microsoft.com", "date": "2024-03-27T22:37:25", "name": "[v3,12/45] net/cxgbe: use rte stdatomic API", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "be659dab2b600393863d09a577a52706552475f6", "submitter": { "id": 2077, "url": "http://patches.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1711579078-10624-13-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 31633, "url": "http://patches.dpdk.org/api/series/31633/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31633", "date": "2024-03-27T22:37:13", "name": "use stdatomic API", "version": 3, "mbox": "http://patches.dpdk.org/series/31633/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/138888/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/138888/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 12B6943D55;\n\tWed, 27 Mar 2024 23:39:23 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 8D3D442DBB;\n\tWed, 27 Mar 2024 23:38:21 +0100 (CET)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id B226C410FC\n for <dev@dpdk.org>; Wed, 27 Mar 2024 23:38:02 +0100 (CET)", "by linux.microsoft.com (Postfix, from userid 1086)\n id A459E20E6AD5; Wed, 27 Mar 2024 15:38:00 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com A459E20E6AD5", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1711579080;\n bh=GcX3fQ4cCzNl2Qp7UZTAR/p2KswsVHtWCZXNLr7RQ5o=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=khlkmalQ6N6j0wdvJpUHL8KYsf6zj0Ut07foGk7Hn9bZLJm1TFl1yWSdgUQ8qJCju\n ymSlIOk2zJX6NcfrEqU/yim3lqoCPvnZtKI/7H/OIGRu3EMwiSNaGJ6zHUtWzSykBn\n fqqNIu5vyLY8jnRhO5gZ9Xd9g9UiouT2S4G8kd84=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "=?utf-8?q?Mattias_R=C3=B6nnblom?= <mattias.ronnblom@ericsson.com>,\n\t=?utf-8?q?Morten_Br=C3=B8rup?= <mb@smartsharesystems.com>,\n Abdullah Sevincer <abdullah.sevincer@intel.com>,\n Ajit Khaparde <ajit.khaparde@broadcom.com>, Alok Prasad <palok@marvell.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Anoob Joseph <anoobj@marvell.com>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Byron Marohn <byron.marohn@intel.com>, Chenbo Xia <chenbox@nvidia.com>,\n Chengwen Feng <fengchengwen@huawei.com>,\n Ciara Loftus <ciara.loftus@intel.com>, Ciara Power <ciara.power@intel.com>,\n Dariusz Sosnowski <dsosnowski@nvidia.com>, David Hunt <david.hunt@intel.com>,\n Devendra Singh Rawat <dsinghrawat@marvell.com>,\n Erik Gabriel Carrillo <erik.g.carrillo@intel.com>,\n Guoyang Zhou <zhouguoyang@huawei.com>, Harman Kalra <hkalra@marvell.com>,\n Harry van Haaren <harry.van.haaren@intel.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Jakub Grajciar <jgrajcia@cisco.com>, Jerin Jacob <jerinj@marvell.com>,\n Jeroen de Borst <jeroendb@google.com>, Jian Wang <jianwang@trustnetic.com>,\n Jiawen Wu <jiawenwu@trustnetic.com>, Jie Hai <haijie1@huawei.com>,\n Jingjing Wu <jingjing.wu@intel.com>, Joshua Washington <joshwash@google.com>,\n Joyce Kong <joyce.kong@arm.com>, Junfeng Guo <junfeng.guo@intel.com>,\n Kevin Laatz <kevin.laatz@intel.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Liang Ma <liangma@liangbit.com>, Long Li <longli@microsoft.com>,\n Maciej Czekaj <mczekaj@marvell.com>, Matan Azrad <matan@nvidia.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Nicolas Chautru <nicolas.chautru@intel.com>, Ori Kam <orika@nvidia.com>,\n Pavan Nikhilesh <pbhagavatula@marvell.com>,\n Peter Mccarthy <peter.mccarthy@intel.com>,\n Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>,\n Reshma Pattan <reshma.pattan@intel.com>, Rosen Xu <rosen.xu@intel.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Rushil Gupta <rushilg@google.com>,\n Sameh Gobriel <sameh.gobriel@intel.com>,\n Sivaprasad Tummala <sivaprasad.tummala@amd.com>,\n Somnath Kotur <somnath.kotur@broadcom.com>,\n Stephen Hemminger <stephen@networkplumber.org>,\n Suanming Mou <suanmingm@nvidia.com>, Sunil Kumar Kori <skori@marvell.com>,\n Sunil Uttarwar <sunilprakashrao.uttarwar@amd.com>,\n Tetsuya Mukawa <mtetsuyah@gmail.com>, Vamsi Attunuru <vattunuru@marvell.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Vladimir Medvedkin <vladimir.medvedkin@intel.com>,\n Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>,\n Yipeng Wang <yipeng1.wang@intel.com>, Yisen Zhuang <yisen.zhuang@huawei.com>,\n Yuying Zhang <Yuying.Zhang@intel.com>, Yuying Zhang <yuying.zhang@intel.com>,\n Ziyang Xuan <xuanziyang2@huawei.com>,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH v3 12/45] net/cxgbe: use rte stdatomic API", "Date": "Wed, 27 Mar 2024 15:37:25 -0700", "Message-Id": "<1711579078-10624-13-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1711579078-10624-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1710967892-7046-1-git-send-email-roretzla@linux.microsoft.com>\n <1711579078-10624-1-git-send-email-roretzla@linux.microsoft.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Replace the use of gcc builtin __atomic_xxx intrinsics with\ncorresponding rte_atomic_xxx optional rte stdatomic API.\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\nAcked-by: Stephen Hemminger <stephen@networkplumber.org>\n---\n drivers/net/cxgbe/clip_tbl.c | 12 ++++++------\n drivers/net/cxgbe/clip_tbl.h | 2 +-\n drivers/net/cxgbe/cxgbe_main.c | 20 ++++++++++----------\n drivers/net/cxgbe/cxgbe_ofld.h | 6 +++---\n drivers/net/cxgbe/l2t.c | 12 ++++++------\n drivers/net/cxgbe/l2t.h | 2 +-\n drivers/net/cxgbe/mps_tcam.c | 21 +++++++++++----------\n drivers/net/cxgbe/mps_tcam.h | 2 +-\n drivers/net/cxgbe/smt.c | 12 ++++++------\n drivers/net/cxgbe/smt.h | 2 +-\n 10 files changed, 46 insertions(+), 45 deletions(-)", "diff": "diff --git a/drivers/net/cxgbe/clip_tbl.c b/drivers/net/cxgbe/clip_tbl.c\nindex b709e26..8588b88 100644\n--- a/drivers/net/cxgbe/clip_tbl.c\n+++ b/drivers/net/cxgbe/clip_tbl.c\n@@ -55,7 +55,7 @@ void cxgbe_clip_release(struct rte_eth_dev *dev, struct clip_entry *ce)\n \tint ret;\n \n \tt4_os_lock(&ce->lock);\n-\tif (__atomic_fetch_sub(&ce->refcnt, 1, __ATOMIC_RELAXED) - 1 == 0) {\n+\tif (rte_atomic_fetch_sub_explicit(&ce->refcnt, 1, rte_memory_order_relaxed) - 1 == 0) {\n \t\tret = clip6_release_mbox(dev, ce->addr);\n \t\tif (ret)\n \t\t\tdev_debug(adap, \"CLIP FW DEL CMD failed: %d\", ret);\n@@ -79,7 +79,7 @@ static struct clip_entry *find_or_alloc_clipe(struct clip_tbl *c,\n \tunsigned int clipt_size = c->clipt_size;\n \n \tfor (e = &c->cl_list[0], end = &c->cl_list[clipt_size]; e != end; ++e) {\n-\t\tif (__atomic_load_n(&e->refcnt, __ATOMIC_RELAXED) == 0) {\n+\t\tif (rte_atomic_load_explicit(&e->refcnt, rte_memory_order_relaxed) == 0) {\n \t\t\tif (!first_free)\n \t\t\t\tfirst_free = e;\n \t\t} else {\n@@ -114,12 +114,12 @@ static struct clip_entry *t4_clip_alloc(struct rte_eth_dev *dev,\n \tce = find_or_alloc_clipe(ctbl, lip);\n \tif (ce) {\n \t\tt4_os_lock(&ce->lock);\n-\t\tif (__atomic_load_n(&ce->refcnt, __ATOMIC_RELAXED) == 0) {\n+\t\tif (rte_atomic_load_explicit(&ce->refcnt, rte_memory_order_relaxed) == 0) {\n \t\t\trte_memcpy(ce->addr, lip, sizeof(ce->addr));\n \t\t\tif (v6) {\n \t\t\t\tce->type = FILTER_TYPE_IPV6;\n-\t\t\t\t__atomic_store_n(&ce->refcnt, 1,\n-\t\t\t\t\t\t __ATOMIC_RELAXED);\n+\t\t\t\trte_atomic_store_explicit(&ce->refcnt, 1,\n+\t\t\t\t\t\t rte_memory_order_relaxed);\n \t\t\t\tret = clip6_get_mbox(dev, lip);\n \t\t\t\tif (ret)\n \t\t\t\t\tdev_debug(adap,\n@@ -129,7 +129,7 @@ static struct clip_entry *t4_clip_alloc(struct rte_eth_dev *dev,\n \t\t\t\tce->type = FILTER_TYPE_IPV4;\n \t\t\t}\n \t\t} else {\n-\t\t\t__atomic_fetch_add(&ce->refcnt, 1, __ATOMIC_RELAXED);\n+\t\t\trte_atomic_fetch_add_explicit(&ce->refcnt, 1, rte_memory_order_relaxed);\n \t\t}\n \t\tt4_os_unlock(&ce->lock);\n \t}\ndiff --git a/drivers/net/cxgbe/clip_tbl.h b/drivers/net/cxgbe/clip_tbl.h\nindex 3b2be66..439fcf6 100644\n--- a/drivers/net/cxgbe/clip_tbl.h\n+++ b/drivers/net/cxgbe/clip_tbl.h\n@@ -13,7 +13,7 @@ struct clip_entry {\n \tenum filter_type type; /* entry type */\n \tu32 addr[4]; /* IPV4 or IPV6 address */\n \trte_spinlock_t lock; /* entry lock */\n-\tu32 refcnt; /* entry reference count */\n+\tRTE_ATOMIC(u32) refcnt; /* entry reference count */\n };\n \n struct clip_tbl {\ndiff --git a/drivers/net/cxgbe/cxgbe_main.c b/drivers/net/cxgbe/cxgbe_main.c\nindex c479454..2ed21f2 100644\n--- a/drivers/net/cxgbe/cxgbe_main.c\n+++ b/drivers/net/cxgbe/cxgbe_main.c\n@@ -418,15 +418,15 @@ void cxgbe_remove_tid(struct tid_info *t, unsigned int chan, unsigned int tid,\n \n \tif (t->tid_tab[tid]) {\n \t\tt->tid_tab[tid] = NULL;\n-\t\t__atomic_fetch_sub(&t->conns_in_use, 1, __ATOMIC_RELAXED);\n+\t\trte_atomic_fetch_sub_explicit(&t->conns_in_use, 1, rte_memory_order_relaxed);\n \t\tif (t->hash_base && tid >= t->hash_base) {\n \t\t\tif (family == FILTER_TYPE_IPV4)\n-\t\t\t\t__atomic_fetch_sub(&t->hash_tids_in_use, 1,\n-\t\t\t\t\t\t __ATOMIC_RELAXED);\n+\t\t\t\trte_atomic_fetch_sub_explicit(&t->hash_tids_in_use, 1,\n+\t\t\t\t\t\t rte_memory_order_relaxed);\n \t\t} else {\n \t\t\tif (family == FILTER_TYPE_IPV4)\n-\t\t\t\t__atomic_fetch_sub(&t->tids_in_use, 1,\n-\t\t\t\t\t\t __ATOMIC_RELAXED);\n+\t\t\t\trte_atomic_fetch_sub_explicit(&t->tids_in_use, 1,\n+\t\t\t\t\t\t rte_memory_order_relaxed);\n \t\t}\n \t}\n \n@@ -448,15 +448,15 @@ void cxgbe_insert_tid(struct tid_info *t, void *data, unsigned int tid,\n \tt->tid_tab[tid] = data;\n \tif (t->hash_base && tid >= t->hash_base) {\n \t\tif (family == FILTER_TYPE_IPV4)\n-\t\t\t__atomic_fetch_add(&t->hash_tids_in_use, 1,\n-\t\t\t\t\t __ATOMIC_RELAXED);\n+\t\t\trte_atomic_fetch_add_explicit(&t->hash_tids_in_use, 1,\n+\t\t\t\t\t rte_memory_order_relaxed);\n \t} else {\n \t\tif (family == FILTER_TYPE_IPV4)\n-\t\t\t__atomic_fetch_add(&t->tids_in_use, 1,\n-\t\t\t\t\t __ATOMIC_RELAXED);\n+\t\t\trte_atomic_fetch_add_explicit(&t->tids_in_use, 1,\n+\t\t\t\t\t rte_memory_order_relaxed);\n \t}\n \n-\t__atomic_fetch_add(&t->conns_in_use, 1, __ATOMIC_RELAXED);\n+\trte_atomic_fetch_add_explicit(&t->conns_in_use, 1, rte_memory_order_relaxed);\n }\n \n /**\ndiff --git a/drivers/net/cxgbe/cxgbe_ofld.h b/drivers/net/cxgbe/cxgbe_ofld.h\nindex 33697c7..48a5ec0 100644\n--- a/drivers/net/cxgbe/cxgbe_ofld.h\n+++ b/drivers/net/cxgbe/cxgbe_ofld.h\n@@ -60,10 +60,10 @@ struct tid_info {\n \tunsigned int atids_in_use;\n \n \t/* TIDs in the TCAM */\n-\tu32 tids_in_use;\n+\tRTE_ATOMIC(u32) tids_in_use;\n \t/* TIDs in the HASH */\n-\tu32 hash_tids_in_use;\n-\tu32 conns_in_use;\n+\tRTE_ATOMIC(u32) hash_tids_in_use;\n+\tRTE_ATOMIC(u32) conns_in_use;\n \n \trte_spinlock_t atid_lock __rte_cache_aligned;\n \trte_spinlock_t ftid_lock;\ndiff --git a/drivers/net/cxgbe/l2t.c b/drivers/net/cxgbe/l2t.c\nindex 21f4019..ecb5fec 100644\n--- a/drivers/net/cxgbe/l2t.c\n+++ b/drivers/net/cxgbe/l2t.c\n@@ -14,8 +14,8 @@\n */\n void cxgbe_l2t_release(struct l2t_entry *e)\n {\n-\tif (__atomic_load_n(&e->refcnt, __ATOMIC_RELAXED) != 0)\n-\t\t__atomic_fetch_sub(&e->refcnt, 1, __ATOMIC_RELAXED);\n+\tif (rte_atomic_load_explicit(&e->refcnt, rte_memory_order_relaxed) != 0)\n+\t\trte_atomic_fetch_sub_explicit(&e->refcnt, 1, rte_memory_order_relaxed);\n }\n \n /**\n@@ -112,7 +112,7 @@ static struct l2t_entry *find_or_alloc_l2e(struct l2t_data *d, u16 vlan,\n \tstruct l2t_entry *first_free = NULL;\n \n \tfor (e = &d->l2tab[0], end = &d->l2tab[d->l2t_size]; e != end; ++e) {\n-\t\tif (__atomic_load_n(&e->refcnt, __ATOMIC_RELAXED) == 0) {\n+\t\tif (rte_atomic_load_explicit(&e->refcnt, rte_memory_order_relaxed) == 0) {\n \t\t\tif (!first_free)\n \t\t\t\tfirst_free = e;\n \t\t} else {\n@@ -151,18 +151,18 @@ static struct l2t_entry *t4_l2t_alloc_switching(struct rte_eth_dev *dev,\n \te = find_or_alloc_l2e(d, vlan, port, eth_addr);\n \tif (e) {\n \t\tt4_os_lock(&e->lock);\n-\t\tif (__atomic_load_n(&e->refcnt, __ATOMIC_RELAXED) == 0) {\n+\t\tif (rte_atomic_load_explicit(&e->refcnt, rte_memory_order_relaxed) == 0) {\n \t\t\te->state = L2T_STATE_SWITCHING;\n \t\t\te->vlan = vlan;\n \t\t\te->lport = port;\n \t\t\trte_memcpy(e->dmac, eth_addr, RTE_ETHER_ADDR_LEN);\n-\t\t\t__atomic_store_n(&e->refcnt, 1, __ATOMIC_RELAXED);\n+\t\t\trte_atomic_store_explicit(&e->refcnt, 1, rte_memory_order_relaxed);\n \t\t\tret = write_l2e(dev, e, 0, !L2T_LPBK, !L2T_ARPMISS);\n \t\t\tif (ret < 0)\n \t\t\t\tdev_debug(adap, \"Failed to write L2T entry: %d\",\n \t\t\t\t\t ret);\n \t\t} else {\n-\t\t\t__atomic_fetch_add(&e->refcnt, 1, __ATOMIC_RELAXED);\n+\t\t\trte_atomic_fetch_add_explicit(&e->refcnt, 1, rte_memory_order_relaxed);\n \t\t}\n \t\tt4_os_unlock(&e->lock);\n \t}\ndiff --git a/drivers/net/cxgbe/l2t.h b/drivers/net/cxgbe/l2t.h\nindex e4c0ebe..67d0197 100644\n--- a/drivers/net/cxgbe/l2t.h\n+++ b/drivers/net/cxgbe/l2t.h\n@@ -30,7 +30,7 @@ struct l2t_entry {\n \tu8 lport; /* destination port */\n \tu8 dmac[RTE_ETHER_ADDR_LEN]; /* destination MAC address */\n \trte_spinlock_t lock; /* entry lock */\n-\tu32 refcnt; /* entry reference count */\n+\tRTE_ATOMIC(u32) refcnt; /* entry reference count */\n };\n \n struct l2t_data {\ndiff --git a/drivers/net/cxgbe/mps_tcam.c b/drivers/net/cxgbe/mps_tcam.c\nindex 8e0da9c..79a7daa 100644\n--- a/drivers/net/cxgbe/mps_tcam.c\n+++ b/drivers/net/cxgbe/mps_tcam.c\n@@ -76,7 +76,7 @@ int cxgbe_mpstcam_alloc(struct port_info *pi, const u8 *eth_addr,\n \tt4_os_write_lock(&mpstcam->lock);\n \tentry = cxgbe_mpstcam_lookup(adap->mpstcam, eth_addr, mask);\n \tif (entry) {\n-\t\t__atomic_fetch_add(&entry->refcnt, 1, __ATOMIC_RELAXED);\n+\t\trte_atomic_fetch_add_explicit(&entry->refcnt, 1, rte_memory_order_relaxed);\n \t\tt4_os_write_unlock(&mpstcam->lock);\n \t\treturn entry->idx;\n \t}\n@@ -98,7 +98,7 @@ int cxgbe_mpstcam_alloc(struct port_info *pi, const u8 *eth_addr,\n \tentry = &mpstcam->entry[ret];\n \tmemcpy(entry->eth_addr, eth_addr, RTE_ETHER_ADDR_LEN);\n \tmemcpy(entry->mask, mask, RTE_ETHER_ADDR_LEN);\n-\t__atomic_store_n(&entry->refcnt, 1, __ATOMIC_RELAXED);\n+\trte_atomic_store_explicit(&entry->refcnt, 1, rte_memory_order_relaxed);\n \tentry->state = MPS_ENTRY_USED;\n \n \tif (cxgbe_update_free_idx(mpstcam))\n@@ -147,7 +147,7 @@ int cxgbe_mpstcam_modify(struct port_info *pi, int idx, const u8 *addr)\n \t * provided value is -1\n \t */\n \tif (entry->state == MPS_ENTRY_UNUSED) {\n-\t\t__atomic_store_n(&entry->refcnt, 1, __ATOMIC_RELAXED);\n+\t\trte_atomic_store_explicit(&entry->refcnt, 1, rte_memory_order_relaxed);\n \t\tentry->state = MPS_ENTRY_USED;\n \t}\n \n@@ -165,7 +165,7 @@ static inline void reset_mpstcam_entry(struct mps_tcam_entry *entry)\n {\n \tmemset(entry->eth_addr, 0, RTE_ETHER_ADDR_LEN);\n \tmemset(entry->mask, 0, RTE_ETHER_ADDR_LEN);\n-\t__atomic_store_n(&entry->refcnt, 0, __ATOMIC_RELAXED);\n+\trte_atomic_store_explicit(&entry->refcnt, 0, rte_memory_order_relaxed);\n \tentry->state = MPS_ENTRY_UNUSED;\n }\n \n@@ -190,12 +190,13 @@ int cxgbe_mpstcam_remove(struct port_info *pi, u16 idx)\n \t\treturn -EINVAL;\n \t}\n \n-\tif (__atomic_load_n(&entry->refcnt, __ATOMIC_RELAXED) == 1)\n+\tif (rte_atomic_load_explicit(&entry->refcnt, rte_memory_order_relaxed) == 1)\n \t\tret = t4_free_raw_mac_filt(adap, pi->viid, entry->eth_addr,\n \t\t\t\t\t entry->mask, idx, 1, pi->port_id,\n \t\t\t\t\t false);\n \telse\n-\t\tret = __atomic_fetch_sub(&entry->refcnt, 1, __ATOMIC_RELAXED) - 1;\n+\t\tret = rte_atomic_fetch_sub_explicit(&entry->refcnt, 1,\n+\t\t rte_memory_order_relaxed) - 1;\n \n \tif (ret == 0) {\n \t\treset_mpstcam_entry(entry);\n@@ -222,7 +223,7 @@ int cxgbe_mpstcam_rawf_enable(struct port_info *pi)\n \tt4_os_write_lock(&t->lock);\n \trawf_idx = adap->params.rawf_start + pi->port_id;\n \tentry = &t->entry[rawf_idx];\n-\tif (__atomic_load_n(&entry->refcnt, __ATOMIC_RELAXED) == 1)\n+\tif (rte_atomic_load_explicit(&entry->refcnt, rte_memory_order_relaxed) == 1)\n \t\tgoto out_unlock;\n \n \tret = t4_alloc_raw_mac_filt(adap, pi->viid, entry->eth_addr,\n@@ -231,7 +232,7 @@ int cxgbe_mpstcam_rawf_enable(struct port_info *pi)\n \tif (ret < 0)\n \t\tgoto out_unlock;\n \n-\t__atomic_store_n(&entry->refcnt, 1, __ATOMIC_RELAXED);\n+\trte_atomic_store_explicit(&entry->refcnt, 1, rte_memory_order_relaxed);\n \n out_unlock:\n \tt4_os_write_unlock(&t->lock);\n@@ -253,7 +254,7 @@ int cxgbe_mpstcam_rawf_disable(struct port_info *pi)\n \tt4_os_write_lock(&t->lock);\n \trawf_idx = adap->params.rawf_start + pi->port_id;\n \tentry = &t->entry[rawf_idx];\n-\tif (__atomic_load_n(&entry->refcnt, __ATOMIC_RELAXED) != 1)\n+\tif (rte_atomic_load_explicit(&entry->refcnt, rte_memory_order_relaxed) != 1)\n \t\tgoto out_unlock;\n \n \tret = t4_free_raw_mac_filt(adap, pi->viid, entry->eth_addr,\n@@ -262,7 +263,7 @@ int cxgbe_mpstcam_rawf_disable(struct port_info *pi)\n \tif (ret < 0)\n \t\tgoto out_unlock;\n \n-\t__atomic_store_n(&entry->refcnt, 0, __ATOMIC_RELAXED);\n+\trte_atomic_store_explicit(&entry->refcnt, 0, rte_memory_order_relaxed);\n \n out_unlock:\n \tt4_os_write_unlock(&t->lock);\ndiff --git a/drivers/net/cxgbe/mps_tcam.h b/drivers/net/cxgbe/mps_tcam.h\nindex 363786b..4b421f7 100644\n--- a/drivers/net/cxgbe/mps_tcam.h\n+++ b/drivers/net/cxgbe/mps_tcam.h\n@@ -29,7 +29,7 @@ struct mps_tcam_entry {\n \tu8 mask[RTE_ETHER_ADDR_LEN];\n \n \tstruct mpstcam_table *mpstcam; /* backptr */\n-\tu32 refcnt;\n+\tRTE_ATOMIC(u32) refcnt;\n };\n \n struct mpstcam_table {\ndiff --git a/drivers/net/cxgbe/smt.c b/drivers/net/cxgbe/smt.c\nindex 4e14a73..2f961c1 100644\n--- a/drivers/net/cxgbe/smt.c\n+++ b/drivers/net/cxgbe/smt.c\n@@ -119,7 +119,7 @@ static struct smt_entry *find_or_alloc_smte(struct smt_data *s, u8 *smac)\n \tstruct smt_entry *e, *end, *first_free = NULL;\n \n \tfor (e = &s->smtab[0], end = &s->smtab[s->smt_size]; e != end; ++e) {\n-\t\tif (__atomic_load_n(&e->refcnt, __ATOMIC_RELAXED) == 0) {\n+\t\tif (rte_atomic_load_explicit(&e->refcnt, rte_memory_order_relaxed) == 0) {\n \t\t\tif (!first_free)\n \t\t\t\tfirst_free = e;\n \t\t} else {\n@@ -156,7 +156,7 @@ static struct smt_entry *t4_smt_alloc_switching(struct rte_eth_dev *dev,\n \te = find_or_alloc_smte(s, smac);\n \tif (e) {\n \t\tt4_os_lock(&e->lock);\n-\t\tif (__atomic_load_n(&e->refcnt, __ATOMIC_RELAXED) == 0) {\n+\t\tif (rte_atomic_load_explicit(&e->refcnt, rte_memory_order_relaxed) == 0) {\n \t\t\te->pfvf = pfvf;\n \t\t\trte_memcpy(e->src_mac, smac, RTE_ETHER_ADDR_LEN);\n \t\t\tret = write_smt_entry(dev, e);\n@@ -168,9 +168,9 @@ static struct smt_entry *t4_smt_alloc_switching(struct rte_eth_dev *dev,\n \t\t\t\tgoto out_write_unlock;\n \t\t\t}\n \t\t\te->state = SMT_STATE_SWITCHING;\n-\t\t\t__atomic_store_n(&e->refcnt, 1, __ATOMIC_RELAXED);\n+\t\t\trte_atomic_store_explicit(&e->refcnt, 1, rte_memory_order_relaxed);\n \t\t} else {\n-\t\t\t__atomic_fetch_add(&e->refcnt, 1, __ATOMIC_RELAXED);\n+\t\t\trte_atomic_fetch_add_explicit(&e->refcnt, 1, rte_memory_order_relaxed);\n \t\t}\n \t\tt4_os_unlock(&e->lock);\n \t}\n@@ -195,8 +195,8 @@ struct smt_entry *cxgbe_smt_alloc_switching(struct rte_eth_dev *dev, u8 *smac)\n \n void cxgbe_smt_release(struct smt_entry *e)\n {\n-\tif (__atomic_load_n(&e->refcnt, __ATOMIC_RELAXED) != 0)\n-\t\t__atomic_fetch_sub(&e->refcnt, 1, __ATOMIC_RELAXED);\n+\tif (rte_atomic_load_explicit(&e->refcnt, rte_memory_order_relaxed) != 0)\n+\t\trte_atomic_fetch_sub_explicit(&e->refcnt, 1, rte_memory_order_relaxed);\n }\n \n /**\ndiff --git a/drivers/net/cxgbe/smt.h b/drivers/net/cxgbe/smt.h\nindex 531810e..8b378ae 100644\n--- a/drivers/net/cxgbe/smt.h\n+++ b/drivers/net/cxgbe/smt.h\n@@ -23,7 +23,7 @@ struct smt_entry {\n \tu16 pfvf;\n \tu16 hw_idx;\n \tu8 src_mac[RTE_ETHER_ADDR_LEN];\n-\tu32 refcnt;\n+\tRTE_ATOMIC(u32) refcnt;\n \trte_spinlock_t lock;\n };\n \n", "prefixes": [ "v3", "12/45" ] }