Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/138879/?format=api
{ "id": 138879, "url": "http://patches.dpdk.org/api/patches/138879/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1711579078-10624-4-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1711579078-10624-4-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1711579078-10624-4-git-send-email-roretzla@linux.microsoft.com", "date": "2024-03-27T22:37:16", "name": "[v3,03/45] net/iavf: use rte stdatomic API", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "55140e8ef4ca66093e31b13cb4c75b565c25ade8", "submitter": { "id": 2077, "url": "http://patches.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1711579078-10624-4-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 31633, "url": "http://patches.dpdk.org/api/series/31633/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31633", "date": "2024-03-27T22:37:13", "name": "use stdatomic API", "version": 3, "mbox": "http://patches.dpdk.org/series/31633/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/138879/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/138879/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0433543D55;\n\tWed, 27 Mar 2024 23:38:21 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2777D427D7;\n\tWed, 27 Mar 2024 23:38:06 +0100 (CET)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id 0A365410E6\n for <dev@dpdk.org>; Wed, 27 Mar 2024 23:38:01 +0100 (CET)", "by linux.microsoft.com (Postfix, from userid 1086)\n id 038D920E6924; Wed, 27 Mar 2024 15:37:59 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com 038D920E6924", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1711579080;\n bh=47opT1nGwIbT3lN3uGnYsp7xNe1P4EQa+Asr/5cy0Ow=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=Q3w6q0ZdUxmwjWUR6yL9zkFuyPSrZB2/3CAWEZ31hHihCTdLIeb2dYbOYIOjanyjc\n ReW2LWutv3oSUq/rR5U4Jm41vbeQ68zYQxi8X4N9vmPRufTfz4hmOnS1yFbr8VwCWF\n okRnySaLzQ9zXIV0+K7ixq+jnI8/7+zGBrB50ueg=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "=?utf-8?q?Mattias_R=C3=B6nnblom?= <mattias.ronnblom@ericsson.com>,\n\t=?utf-8?q?Morten_Br=C3=B8rup?= <mb@smartsharesystems.com>,\n Abdullah Sevincer <abdullah.sevincer@intel.com>,\n Ajit Khaparde <ajit.khaparde@broadcom.com>, Alok Prasad <palok@marvell.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Anoob Joseph <anoobj@marvell.com>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Byron Marohn <byron.marohn@intel.com>, Chenbo Xia <chenbox@nvidia.com>,\n Chengwen Feng <fengchengwen@huawei.com>,\n Ciara Loftus <ciara.loftus@intel.com>, Ciara Power <ciara.power@intel.com>,\n Dariusz Sosnowski <dsosnowski@nvidia.com>, David Hunt <david.hunt@intel.com>,\n Devendra Singh Rawat <dsinghrawat@marvell.com>,\n Erik Gabriel Carrillo <erik.g.carrillo@intel.com>,\n Guoyang Zhou <zhouguoyang@huawei.com>, Harman Kalra <hkalra@marvell.com>,\n Harry van Haaren <harry.van.haaren@intel.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Jakub Grajciar <jgrajcia@cisco.com>, Jerin Jacob <jerinj@marvell.com>,\n Jeroen de Borst <jeroendb@google.com>, Jian Wang <jianwang@trustnetic.com>,\n Jiawen Wu <jiawenwu@trustnetic.com>, Jie Hai <haijie1@huawei.com>,\n Jingjing Wu <jingjing.wu@intel.com>, Joshua Washington <joshwash@google.com>,\n Joyce Kong <joyce.kong@arm.com>, Junfeng Guo <junfeng.guo@intel.com>,\n Kevin Laatz <kevin.laatz@intel.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Liang Ma <liangma@liangbit.com>, Long Li <longli@microsoft.com>,\n Maciej Czekaj <mczekaj@marvell.com>, Matan Azrad <matan@nvidia.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Nicolas Chautru <nicolas.chautru@intel.com>, Ori Kam <orika@nvidia.com>,\n Pavan Nikhilesh <pbhagavatula@marvell.com>,\n Peter Mccarthy <peter.mccarthy@intel.com>,\n Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>,\n Reshma Pattan <reshma.pattan@intel.com>, Rosen Xu <rosen.xu@intel.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Rushil Gupta <rushilg@google.com>,\n Sameh Gobriel <sameh.gobriel@intel.com>,\n Sivaprasad Tummala <sivaprasad.tummala@amd.com>,\n Somnath Kotur <somnath.kotur@broadcom.com>,\n Stephen Hemminger <stephen@networkplumber.org>,\n Suanming Mou <suanmingm@nvidia.com>, Sunil Kumar Kori <skori@marvell.com>,\n Sunil Uttarwar <sunilprakashrao.uttarwar@amd.com>,\n Tetsuya Mukawa <mtetsuyah@gmail.com>, Vamsi Attunuru <vattunuru@marvell.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Vladimir Medvedkin <vladimir.medvedkin@intel.com>,\n Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>,\n Yipeng Wang <yipeng1.wang@intel.com>, Yisen Zhuang <yisen.zhuang@huawei.com>,\n Yuying Zhang <Yuying.Zhang@intel.com>, Yuying Zhang <yuying.zhang@intel.com>,\n Ziyang Xuan <xuanziyang2@huawei.com>,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH v3 03/45] net/iavf: use rte stdatomic API", "Date": "Wed, 27 Mar 2024 15:37:16 -0700", "Message-Id": "<1711579078-10624-4-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1711579078-10624-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1710967892-7046-1-git-send-email-roretzla@linux.microsoft.com>\n <1711579078-10624-1-git-send-email-roretzla@linux.microsoft.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Replace the use of gcc builtin __atomic_xxx intrinsics with\ncorresponding rte_atomic_xxx optional rte stdatomic API.\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\nAcked-by: Stephen Hemminger <stephen@networkplumber.org>\n---\n drivers/net/iavf/iavf.h | 16 ++++++++--------\n drivers/net/iavf/iavf_rxtx.c | 4 ++--\n drivers/net/iavf/iavf_rxtx_vec_neon.c | 2 +-\n drivers/net/iavf/iavf_vchnl.c | 14 +++++++-------\n 4 files changed, 18 insertions(+), 18 deletions(-)", "diff": "diff --git a/drivers/net/iavf/iavf.h b/drivers/net/iavf/iavf.h\nindex 824ae4a..6b977e5 100644\n--- a/drivers/net/iavf/iavf.h\n+++ b/drivers/net/iavf/iavf.h\n@@ -238,8 +238,8 @@ struct iavf_info {\n \tstruct virtchnl_vlan_caps vlan_v2_caps;\n \tuint64_t supported_rxdid;\n \tuint8_t *proto_xtr; /* proto xtr type for all queues */\n-\tvolatile enum virtchnl_ops pend_cmd; /* pending command not finished */\n-\tuint32_t pend_cmd_count;\n+\tvolatile RTE_ATOMIC(enum virtchnl_ops) pend_cmd; /* pending command not finished */\n+\tRTE_ATOMIC(uint32_t) pend_cmd_count;\n \tint cmd_retval; /* return value of the cmd response from PF */\n \tuint8_t *aq_resp; /* buffer to store the adminq response from PF */\n \n@@ -456,13 +456,13 @@ struct iavf_cmd_info {\n _atomic_set_cmd(struct iavf_info *vf, enum virtchnl_ops ops)\n {\n \tenum virtchnl_ops op_unk = VIRTCHNL_OP_UNKNOWN;\n-\tint ret = __atomic_compare_exchange(&vf->pend_cmd, &op_unk, &ops,\n-\t\t\t0, __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE);\n+\tint ret = rte_atomic_compare_exchange_strong_explicit(&vf->pend_cmd, &op_unk, ops,\n+\t\t\trte_memory_order_acquire, rte_memory_order_acquire);\n \n \tif (!ret)\n \t\tPMD_DRV_LOG(ERR, \"There is incomplete cmd %d\", vf->pend_cmd);\n \n-\t__atomic_store_n(&vf->pend_cmd_count, 1, __ATOMIC_RELAXED);\n+\trte_atomic_store_explicit(&vf->pend_cmd_count, 1, rte_memory_order_relaxed);\n \n \treturn !ret;\n }\n@@ -472,13 +472,13 @@ struct iavf_cmd_info {\n _atomic_set_async_response_cmd(struct iavf_info *vf, enum virtchnl_ops ops)\n {\n \tenum virtchnl_ops op_unk = VIRTCHNL_OP_UNKNOWN;\n-\tint ret = __atomic_compare_exchange(&vf->pend_cmd, &op_unk, &ops,\n-\t\t\t0, __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE);\n+\tint ret = rte_atomic_compare_exchange_strong_explicit(&vf->pend_cmd, &op_unk, ops,\n+\t\t\trte_memory_order_acquire, rte_memory_order_acquire);\n \n \tif (!ret)\n \t\tPMD_DRV_LOG(ERR, \"There is incomplete cmd %d\", vf->pend_cmd);\n \n-\t__atomic_store_n(&vf->pend_cmd_count, 2, __ATOMIC_RELAXED);\n+\trte_atomic_store_explicit(&vf->pend_cmd_count, 2, rte_memory_order_relaxed);\n \n \treturn !ret;\n }\ndiff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c\nindex 0a5246d..d1d4e9f 100644\n--- a/drivers/net/iavf/iavf_rxtx.c\n+++ b/drivers/net/iavf/iavf_rxtx.c\n@@ -2025,7 +2025,7 @@ struct iavf_txq_ops iavf_txq_release_mbufs_ops[] = {\n \t\t\ts[j] = rte_le_to_cpu_16(rxdp[j].wb.status_error0);\n \n \t\t/* This barrier is to order loads of different words in the descriptor */\n-\t\trte_atomic_thread_fence(__ATOMIC_ACQUIRE);\n+\t\trte_atomic_thread_fence(rte_memory_order_acquire);\n \n \t\t/* Compute how many contiguous DD bits were set */\n \t\tfor (j = 0, nb_dd = 0; j < IAVF_LOOK_AHEAD; j++) {\n@@ -2152,7 +2152,7 @@ struct iavf_txq_ops iavf_txq_release_mbufs_ops[] = {\n \t\t}\n \n \t\t/* This barrier is to order loads of different words in the descriptor */\n-\t\trte_atomic_thread_fence(__ATOMIC_ACQUIRE);\n+\t\trte_atomic_thread_fence(rte_memory_order_acquire);\n \n \t\t/* Compute how many contiguous DD bits were set */\n \t\tfor (j = 0, nb_dd = 0; j < IAVF_LOOK_AHEAD; j++) {\ndiff --git a/drivers/net/iavf/iavf_rxtx_vec_neon.c b/drivers/net/iavf/iavf_rxtx_vec_neon.c\nindex 83825aa..20b656e 100644\n--- a/drivers/net/iavf/iavf_rxtx_vec_neon.c\n+++ b/drivers/net/iavf/iavf_rxtx_vec_neon.c\n@@ -273,7 +273,7 @@\n \t\tdescs[0] = vld1q_u64((uint64_t *)(rxdp));\n \n \t\t/* Use acquire fence to order loads of descriptor qwords */\n-\t\trte_atomic_thread_fence(__ATOMIC_ACQUIRE);\n+\t\trte_atomic_thread_fence(rte_memory_order_acquire);\n \t\t/* A.2 reload qword0 to make it ordered after qword1 load */\n \t\tdescs[3] = vld1q_lane_u64((uint64_t *)(rxdp + 3), descs[3], 0);\n \t\tdescs[2] = vld1q_lane_u64((uint64_t *)(rxdp + 2), descs[2], 0);\ndiff --git a/drivers/net/iavf/iavf_vchnl.c b/drivers/net/iavf/iavf_vchnl.c\nindex 1111d30..6d5969f 100644\n--- a/drivers/net/iavf/iavf_vchnl.c\n+++ b/drivers/net/iavf/iavf_vchnl.c\n@@ -41,7 +41,7 @@ struct iavf_event_element {\n };\n \n struct iavf_event_handler {\n-\tuint32_t ndev;\n+\tRTE_ATOMIC(uint32_t) ndev;\n \trte_thread_t tid;\n \tint fd[2];\n \tpthread_mutex_t lock;\n@@ -129,7 +129,7 @@ struct iavf_event_handler {\n {\n \tstruct iavf_event_handler *handler = &event_handler;\n \n-\tif (__atomic_fetch_add(&handler->ndev, 1, __ATOMIC_RELAXED) + 1 != 1)\n+\tif (rte_atomic_fetch_add_explicit(&handler->ndev, 1, rte_memory_order_relaxed) + 1 != 1)\n \t\treturn 0;\n #if defined(RTE_EXEC_ENV_IS_WINDOWS) && RTE_EXEC_ENV_IS_WINDOWS != 0\n \tint err = _pipe(handler->fd, MAX_EVENT_PENDING, O_BINARY);\n@@ -137,7 +137,7 @@ struct iavf_event_handler {\n \tint err = pipe(handler->fd);\n #endif\n \tif (err != 0) {\n-\t\t__atomic_fetch_sub(&handler->ndev, 1, __ATOMIC_RELAXED);\n+\t\trte_atomic_fetch_sub_explicit(&handler->ndev, 1, rte_memory_order_relaxed);\n \t\treturn -1;\n \t}\n \n@@ -146,7 +146,7 @@ struct iavf_event_handler {\n \n \tif (rte_thread_create_internal_control(&handler->tid, \"iavf-event\",\n \t\t\t\tiavf_dev_event_handle, NULL)) {\n-\t\t__atomic_fetch_sub(&handler->ndev, 1, __ATOMIC_RELAXED);\n+\t\trte_atomic_fetch_sub_explicit(&handler->ndev, 1, rte_memory_order_relaxed);\n \t\treturn -1;\n \t}\n \n@@ -158,7 +158,7 @@ struct iavf_event_handler {\n {\n \tstruct iavf_event_handler *handler = &event_handler;\n \n-\tif (__atomic_fetch_sub(&handler->ndev, 1, __ATOMIC_RELAXED) - 1 != 0)\n+\tif (rte_atomic_fetch_sub_explicit(&handler->ndev, 1, rte_memory_order_relaxed) - 1 != 0)\n \t\treturn;\n \n \tint unused = pthread_cancel((pthread_t)handler->tid.opaque_id);\n@@ -574,8 +574,8 @@ struct iavf_event_handler {\n \t\t\t\t/* read message and it's expected one */\n \t\t\t\tif (msg_opc == vf->pend_cmd) {\n \t\t\t\t\tuint32_t cmd_count =\n-\t\t\t\t\t__atomic_fetch_sub(&vf->pend_cmd_count,\n-\t\t\t\t\t\t\t1, __ATOMIC_RELAXED) - 1;\n+\t\t\t\t\trte_atomic_fetch_sub_explicit(&vf->pend_cmd_count,\n+\t\t\t\t\t\t\t1, rte_memory_order_relaxed) - 1;\n \t\t\t\t\tif (cmd_count == 0)\n \t\t\t\t\t\t_notify_cmd(vf, msg_ret);\n \t\t\t\t} else {\n", "prefixes": [ "v3", "03/45" ] }