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GET /api/patches/137776/?format=api
{ "id": 137776, "url": "http://patches.dpdk.org/api/patches/137776/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240301191451.57168-7-hkalra@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240301191451.57168-7-hkalra@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240301191451.57168-7-hkalra@marvell.com", "date": "2024-03-01T19:14:33", "name": "[v5,06/23] common/cnxk: common NPC changes for eswitch", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "65fc88967ce973040255ada44ea40fb7b8eb1fd3", "submitter": { "id": 1182, "url": "http://patches.dpdk.org/api/people/1182/?format=api", "name": "Harman Kalra", "email": "hkalra@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240301191451.57168-7-hkalra@marvell.com/mbox/", "series": [ { "id": 31343, "url": "http://patches.dpdk.org/api/series/31343/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31343", "date": "2024-03-01T19:14:27", "name": "net/cnxk: support for port representors", "version": 5, "mbox": "http://patches.dpdk.org/series/31343/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/137776/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/137776/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id EA40C43C0F;\n\tFri, 1 Mar 2024 20:15:44 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 22F6543434;\n\tFri, 1 Mar 2024 20:15:19 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 05A3E43401\n for <dev@dpdk.org>; Fri, 1 Mar 2024 20:15:16 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id\n 421H7ggT016897 for <dev@dpdk.org>; Fri, 1 Mar 2024 11:15:16 -0800", "from dc6wp-exch02.marvell.com ([4.21.29.225])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3wjfay8sbu-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Fri, 01 Mar 2024 11:15:15 -0800 (PST)", "from DC6WP-EXCH02.marvell.com (10.76.176.209) by\n DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.1258.12; Fri, 1 Mar 2024 11:15:15 -0800", "from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com\n (10.76.176.209) with Microsoft SMTP Server id 15.2.1258.12 via Frontend\n Transport; Fri, 1 Mar 2024 11:15:15 -0800", "from localhost.localdomain (unknown [10.29.52.211])\n by maili.marvell.com (Postfix) with ESMTP id D3D103F71E0;\n Fri, 1 Mar 2024 11:15:12 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=\n from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-type; s=pfpt0220; bh=5qh0A2IJW2WVaTbJ9wc0R\n bEUeXsJpmODCyXt39RaAhc=; b=SrGkD1xGuzmHS3ZuIGfkeL+dZe3pbhouYXgtG\n iJv0aredIPMN7RuBVpspBy8KLJUJIs9wzKTdNwb+Icr/+NlVUBJ1E5QRXe4lzvEP\n hsuz2LBXQ9PyuC2DOQr33jPhc278qhoYumorIxHKcc6h6HGss7+I63yfVscpeY7J\n SKB+iudCLMYYrmBiNlgrxeTza6djnO9Hw6/cy+8tp3m7OfFVQuRvWGEZmOS0ciz4\n Il2EDgskhfkPa25/bhOj7BSRCArRuLe4SoSb3VGkaj1LXy0qZq0SNeO5CcL+cxNV\n uTepairmVsFQQq9wCBNFtIgsa3bc4V4rTNAlMGE4ewTp5npbg==", "From": "Harman Kalra <hkalra@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Harman Kalra <hkalra@marvell.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH v5 06/23] common/cnxk: common NPC changes for eswitch", "Date": "Sat, 2 Mar 2024 00:44:33 +0530", "Message-ID": "<20240301191451.57168-7-hkalra@marvell.com>", "X-Mailer": "git-send-email 2.18.0", "In-Reply-To": "<20240301191451.57168-1-hkalra@marvell.com>", "References": "<20230811163419.165790-1-hkalra@marvell.com>\n <20240301191451.57168-1-hkalra@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "MK183qDGEfvc8c-F3iYbF0vY_tPnM2VQ", "X-Proofpoint-GUID": "MK183qDGEfvc8c-F3iYbF0vY_tPnM2VQ", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2024-03-01_20,2024-03-01_03,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Adding new MCAM API for installing flow using generic npc_install_flow\nmbox and other helper APIs. Also adding rss action configuration for\neswitch.\n\nSigned-off-by: Harman Kalra <hkalra@marvell.com>\n---\n drivers/common/cnxk/meson.build | 1 +\n drivers/common/cnxk/roc_api.h | 3 +\n drivers/common/cnxk/roc_eswitch.c | 306 +++++++++++++++++++++++++++++\n drivers/common/cnxk/roc_eswitch.h | 22 +++\n drivers/common/cnxk/roc_mbox.h | 33 ++++\n drivers/common/cnxk/roc_npc.c | 26 ++-\n drivers/common/cnxk/roc_npc.h | 5 +-\n drivers/common/cnxk/roc_npc_mcam.c | 2 +-\n drivers/common/cnxk/roc_npc_priv.h | 3 +-\n drivers/common/cnxk/version.map | 6 +\n 10 files changed, 398 insertions(+), 9 deletions(-)\n create mode 100644 drivers/common/cnxk/roc_eswitch.c\n create mode 100644 drivers/common/cnxk/roc_eswitch.h", "diff": "diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build\nindex 56eea52909..e0e4600989 100644\n--- a/drivers/common/cnxk/meson.build\n+++ b/drivers/common/cnxk/meson.build\n@@ -20,6 +20,7 @@ sources = files(\n 'roc_cpt_debug.c',\n 'roc_dev.c',\n 'roc_dpi.c',\n+ 'roc_eswitch.c',\n 'roc_hash.c',\n 'roc_idev.c',\n 'roc_irq.c',\ndiff --git a/drivers/common/cnxk/roc_api.h b/drivers/common/cnxk/roc_api.h\nindex f630853088..6a86863c57 100644\n--- a/drivers/common/cnxk/roc_api.h\n+++ b/drivers/common/cnxk/roc_api.h\n@@ -117,4 +117,7 @@\n /* MACsec */\n #include \"roc_mcs.h\"\n \n+/* Eswitch */\n+#include \"roc_eswitch.h\"\n+\n #endif /* _ROC_API_H_ */\ndiff --git a/drivers/common/cnxk/roc_eswitch.c b/drivers/common/cnxk/roc_eswitch.c\nnew file mode 100644\nindex 0000000000..e480ab1046\n--- /dev/null\n+++ b/drivers/common/cnxk/roc_eswitch.c\n@@ -0,0 +1,306 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2024 Marvell.\n+ */\n+\n+#include <arpa/inet.h>\n+\n+#include \"roc_api.h\"\n+#include \"roc_priv.h\"\n+\n+static int\n+eswitch_vlan_rx_cfg(uint16_t pcifunc, struct mbox *mbox)\n+{\n+\tstruct nix_vtag_config *vtag_cfg;\n+\tint rc;\n+\n+\tvtag_cfg = mbox_alloc_msg_nix_vtag_cfg(mbox_get(mbox));\n+\tif (!vtag_cfg) {\n+\t\trc = -EINVAL;\n+\t\tgoto exit;\n+\t}\n+\n+\t/* config strip, capture and size */\n+\tvtag_cfg->hdr.pcifunc = pcifunc;\n+\tvtag_cfg->vtag_size = NIX_VTAGSIZE_T4;\n+\tvtag_cfg->cfg_type = VTAG_RX; /* rx vlan cfg */\n+\tvtag_cfg->rx.vtag_type = NIX_RX_VTAG_TYPE0;\n+\tvtag_cfg->rx.strip_vtag = true;\n+\tvtag_cfg->rx.capture_vtag = true;\n+\n+\trc = mbox_process(mbox);\n+\tif (rc)\n+\t\tgoto exit;\n+\n+\trc = 0;\n+exit:\n+\tmbox_put(mbox);\n+\treturn rc;\n+}\n+\n+static int\n+eswitch_vlan_tx_cfg(struct roc_npc_flow *flow, uint16_t pcifunc, struct mbox *mbox,\n+\t\t uint16_t vlan_tci, uint16_t *vidx)\n+{\n+\tstruct nix_vtag_config *vtag_cfg;\n+\tstruct nix_vtag_config_rsp *rsp;\n+\tint rc;\n+\n+\tunion {\n+\t\tuint64_t reg;\n+\t\tstruct nix_tx_vtag_action_s act;\n+\t} tx_vtag_action;\n+\n+\tvtag_cfg = mbox_alloc_msg_nix_vtag_cfg(mbox_get(mbox));\n+\tif (!vtag_cfg) {\n+\t\trc = -EINVAL;\n+\t\tgoto exit;\n+\t}\n+\n+\t/* Insert vlan tag */\n+\tvtag_cfg->hdr.pcifunc = pcifunc;\n+\tvtag_cfg->vtag_size = NIX_VTAGSIZE_T4;\n+\tvtag_cfg->cfg_type = VTAG_TX; /* tx vlan cfg */\n+\tvtag_cfg->tx.cfg_vtag0 = true;\n+\tvtag_cfg->tx.vtag0 = (((uint32_t)ROC_ESWITCH_VLAN_TPID << 16) | vlan_tci);\n+\n+\trc = mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\tgoto exit;\n+\n+\tif (rsp->vtag0_idx < 0) {\n+\t\tplt_err(\"Failed to config TX VTAG action\");\n+\t\trc = -EINVAL;\n+\t\tgoto exit;\n+\t}\n+\n+\t*vidx = rsp->vtag0_idx;\n+\ttx_vtag_action.reg = 0;\n+\ttx_vtag_action.act.vtag0_def = rsp->vtag0_idx;\n+\ttx_vtag_action.act.vtag0_lid = NPC_LID_LA;\n+\ttx_vtag_action.act.vtag0_op = NIX_TX_VTAGOP_INSERT;\n+\ttx_vtag_action.act.vtag0_relptr = NIX_TX_VTAGACTION_VTAG0_RELPTR;\n+\n+\tflow->vtag_action = tx_vtag_action.reg;\n+\n+\trc = 0;\n+exit:\n+\tmbox_put(mbox);\n+\treturn rc;\n+}\n+\n+int\n+roc_eswitch_npc_mcam_tx_rule(struct roc_npc *roc_npc, struct roc_npc_flow *flow, uint16_t pcifunc,\n+\t\t\t uint32_t vlan_tci)\n+{\n+\tstruct npc *npc = roc_npc_to_npc_priv(roc_npc);\n+\tstruct npc_install_flow_req *req;\n+\tstruct npc_install_flow_rsp *rsp;\n+\tstruct mbox *mbox = npc->mbox;\n+\tuint16_t vidx = 0, lbkid;\n+\tint rc;\n+\n+\trc = eswitch_vlan_tx_cfg(flow, roc_npc->pf_func, mbox, vlan_tci, &vidx);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to configure VLAN TX, err %d\", rc);\n+\t\tgoto fail;\n+\t}\n+\n+\treq = mbox_alloc_msg_npc_install_flow(mbox_get(mbox));\n+\tif (!req) {\n+\t\trc = -EINVAL;\n+\t\tgoto exit;\n+\t}\n+\n+\tlbkid = 0;\n+\treq->hdr.pcifunc = roc_npc->pf_func; /* Eswitch PF is requester */\n+\treq->vf = pcifunc;\n+\treq->entry = flow->mcam_id;\n+\treq->intf = NPC_MCAM_TX;\n+\treq->op = NIX_TX_ACTIONOP_UCAST_CHAN;\n+\treq->index = (lbkid << 8) | ROC_ESWITCH_LBK_CHAN;\n+\treq->set_cntr = 1;\n+\treq->vtag0_def = vidx;\n+\treq->vtag0_op = 1;\n+\trc = mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\tgoto exit;\n+\n+\tflow->nix_intf = NIX_INTF_TX;\n+exit:\n+\tmbox_put(mbox);\n+fail:\n+\treturn rc;\n+}\n+\n+static int\n+eswitch_vtag_cfg_delete(struct roc_npc *roc_npc, struct roc_npc_flow *flow)\n+{\n+\tstruct npc *npc = roc_npc_to_npc_priv(roc_npc);\n+\tstruct nix_vtag_config *vtag_cfg;\n+\tstruct nix_vtag_config_rsp *rsp;\n+\tstruct mbox *mbox = npc->mbox;\n+\tint rc = 0;\n+\n+\tunion {\n+\t\tuint64_t reg;\n+\t\tstruct nix_tx_vtag_action_s act;\n+\t} tx_vtag_action;\n+\n+\ttx_vtag_action.reg = flow->vtag_action;\n+\tvtag_cfg = mbox_alloc_msg_nix_vtag_cfg(mbox_get(mbox));\n+\n+\tif (vtag_cfg == NULL) {\n+\t\trc = -ENOSPC;\n+\t\tgoto exit;\n+\t}\n+\n+\tvtag_cfg->cfg_type = VTAG_TX;\n+\tvtag_cfg->vtag_size = NIX_VTAGSIZE_T4;\n+\tvtag_cfg->tx.vtag0_idx = tx_vtag_action.act.vtag0_def;\n+\tvtag_cfg->tx.free_vtag0 = true;\n+\n+\trc = mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\tgoto exit;\n+\n+\trc = rsp->hdr.rc;\n+exit:\n+\tmbox_put(mbox);\n+\treturn rc;\n+}\n+\n+int\n+roc_eswitch_npc_mcam_delete_rule(struct roc_npc *roc_npc, struct roc_npc_flow *flow,\n+\t\t\t\t uint16_t pcifunc)\n+{\n+\tstruct npc *npc = roc_npc_to_npc_priv(roc_npc);\n+\tstruct npc_delete_flow_req *req;\n+\tstruct msg_rsp *rsp;\n+\tstruct mbox *mbox = npc->mbox;\n+\tint rc = 0;\n+\n+\t/* Removing the VLAN TX config */\n+\tif (flow->nix_intf == NIX_INTF_TX) {\n+\t\trc = eswitch_vtag_cfg_delete(roc_npc, flow);\n+\t\tif (rc)\n+\t\t\tplt_err(\"Failed to delete TX vtag config\");\n+\t}\n+\n+\treq = mbox_alloc_msg_npc_delete_flow(mbox_get(mbox));\n+\tif (!req) {\n+\t\trc = -EINVAL;\n+\t\tgoto exit;\n+\t}\n+\n+\treq->entry = flow->mcam_id;\n+\treq->vf = pcifunc;\n+\trc = mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\tgoto exit;\n+\n+\trc = rsp->hdr.rc;\n+exit:\n+\tmbox_put(mbox);\n+\treturn rc;\n+}\n+\n+int\n+roc_eswitch_npc_mcam_rx_rule(struct roc_npc *roc_npc, struct roc_npc_flow *flow, uint16_t pcifunc,\n+\t\t\t uint16_t vlan_tci, uint16_t vlan_tci_mask)\n+{\n+\tstruct npc *npc = roc_npc_to_npc_priv(roc_npc);\n+\tstruct npc_install_flow_req *req;\n+\tstruct npc_install_flow_rsp *rsp;\n+\tstruct mbox *mbox = npc->mbox;\n+\tbool is_esw_dev;\n+\tint rc;\n+\n+\t/* For ESW PF/VF */\n+\tis_esw_dev = (dev_get_pf(roc_npc->pf_func) == dev_get_pf(pcifunc));\n+\t/* VLAN Rx config */\n+\tif (is_esw_dev) {\n+\t\trc = eswitch_vlan_rx_cfg(roc_npc->pf_func, mbox);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to configure VLAN RX rule, err %d\", rc);\n+\t\t\tgoto fail;\n+\t\t}\n+\t}\n+\n+\treq = mbox_alloc_msg_npc_install_flow(mbox_get(mbox));\n+\tif (!req) {\n+\t\trc = -EINVAL;\n+\t\tgoto exit;\n+\t}\n+\n+\treq->vf = pcifunc;\n+\t/* Action */\n+\treq->op = NIX_RX_ACTIONOP_DEFAULT;\n+\treq->index = 0;\n+\treq->entry = flow->mcam_id;\n+\treq->hdr.pcifunc = roc_npc->pf_func; /* Eswitch PF is requester */\n+\treq->features = BIT_ULL(NPC_OUTER_VID) | BIT_ULL(NPC_VLAN_ETYPE_CTAG);\n+\treq->vtag0_valid = true;\n+\t/* For ESW PF/VF using configured vlan rx cfg while for other\n+\t * representees using standard vlan_type = 7 which is strip.\n+\t */\n+\treq->vtag0_type = is_esw_dev ? NIX_RX_VTAG_TYPE0 : NIX_RX_VTAG_TYPE7;\n+\treq->packet.vlan_etype = ROC_ESWITCH_VLAN_TPID;\n+\treq->mask.vlan_etype = 0xFFFF;\n+\treq->packet.vlan_tci = ntohs(vlan_tci & 0xFFFF);\n+\treq->mask.vlan_tci = ntohs(vlan_tci_mask);\n+\n+\treq->channel = ROC_ESWITCH_LBK_CHAN;\n+\treq->chan_mask = 0xffff;\n+\treq->intf = NPC_MCAM_RX;\n+\treq->set_cntr = 1;\n+\treq->cntr_val = flow->ctr_id;\n+\n+\trc = mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\tgoto exit;\n+\n+\tflow->nix_intf = NIX_INTF_RX;\n+exit:\n+\tmbox_put(mbox);\n+fail:\n+\treturn rc;\n+}\n+\n+int\n+roc_eswitch_npc_rss_action_configure(struct roc_npc *roc_npc, struct roc_npc_flow *flow,\n+\t\t\t\t uint32_t flowkey_cfg, uint16_t *reta_tbl)\n+{\n+\tstruct npc *npc = roc_npc_to_npc_priv(roc_npc);\n+\tstruct roc_nix *roc_nix = roc_npc->roc_nix;\n+\tuint32_t rss_grp_idx;\n+\tuint8_t flowkey_algx;\n+\tint rc;\n+\n+\trc = npc_rss_free_grp_get(npc, &rss_grp_idx);\n+\t/* RSS group :0 is not usable for flow rss action */\n+\tif (rc < 0 || rss_grp_idx == 0)\n+\t\treturn -ENOSPC;\n+\n+\t/* Populating reta table for the specific RSS group */\n+\trc = roc_nix_rss_reta_set(roc_nix, rss_grp_idx, reta_tbl);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to init rss table rc = %d\", rc);\n+\t\treturn rc;\n+\t}\n+\n+\trc = roc_nix_rss_flowkey_set(roc_nix, &flowkey_algx, flowkey_cfg, rss_grp_idx,\n+\t\t\t\t flow->mcam_id);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to set rss hash function rc = %d\", rc);\n+\t\treturn rc;\n+\t}\n+\n+\tplt_bitmap_set(npc->rss_grp_entries, rss_grp_idx);\n+\n+\tflow->npc_action &= (~(0xfULL));\n+\tflow->npc_action |= NIX_RX_ACTIONOP_RSS;\n+\tflow->npc_action |=\n+\t\t((uint64_t)(flowkey_algx & NPC_RSS_ACT_ALG_MASK) << NPC_RSS_ACT_ALG_OFFSET) |\n+\t\t((uint64_t)(rss_grp_idx & NPC_RSS_ACT_GRP_MASK) << NPC_RSS_ACT_GRP_OFFSET);\n+\treturn 0;\n+}\ndiff --git a/drivers/common/cnxk/roc_eswitch.h b/drivers/common/cnxk/roc_eswitch.h\nnew file mode 100644\nindex 0000000000..cdbe808a71\n--- /dev/null\n+++ b/drivers/common/cnxk/roc_eswitch.h\n@@ -0,0 +1,22 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2024 Marvell.\n+ */\n+\n+#ifndef __ROC_ESWITCH_H__\n+#define __ROC_ESWITCH_H__\n+\n+#define ROC_ESWITCH_VLAN_TPID 0x8100\n+#define ROC_ESWITCH_LBK_CHAN 63\n+\n+/* NPC */\n+int __roc_api roc_eswitch_npc_mcam_rx_rule(struct roc_npc *roc_npc, struct roc_npc_flow *flow,\n+\t\t\t\t\t uint16_t pcifunc, uint16_t vlan_tci,\n+\t\t\t\t\t uint16_t vlan_tci_mask);\n+int __roc_api roc_eswitch_npc_mcam_tx_rule(struct roc_npc *roc_npc, struct roc_npc_flow *flow,\n+\t\t\t\t\t uint16_t pcifunc, uint32_t vlan_tci);\n+int __roc_api roc_eswitch_npc_mcam_delete_rule(struct roc_npc *roc_npc, struct roc_npc_flow *flow,\n+\t\t\t\t\t uint16_t pcifunc);\n+int __roc_api roc_eswitch_npc_rss_action_configure(struct roc_npc *roc_npc,\n+\t\t\t\t\t\t struct roc_npc_flow *flow, uint32_t flowkey_cfg,\n+\t\t\t\t\t\t uint16_t *reta_tbl);\n+#endif /* __ROC_ESWITCH_H__ */\ndiff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h\nindex 54956a6a06..b76e97e9f9 100644\n--- a/drivers/common/cnxk/roc_mbox.h\n+++ b/drivers/common/cnxk/roc_mbox.h\n@@ -388,6 +388,18 @@ enum rvu_af_status {\n \tRVU_INVALID_VF_ID = -256,\n };\n \n+/* For NIX RX vtag action */\n+enum nix_rx_vtag0_type {\n+\tNIX_RX_VTAG_TYPE0,\n+\tNIX_RX_VTAG_TYPE1,\n+\tNIX_RX_VTAG_TYPE2,\n+\tNIX_RX_VTAG_TYPE3,\n+\tNIX_RX_VTAG_TYPE4,\n+\tNIX_RX_VTAG_TYPE5,\n+\tNIX_RX_VTAG_TYPE6,\n+\tNIX_RX_VTAG_TYPE7,\n+};\n+\n struct ready_msg_rsp {\n \tstruct mbox_msghdr hdr;\n \tuint16_t __io sclk_freq; /* SCLK frequency */\n@@ -2446,6 +2458,8 @@ enum header_fields {\n \tNPC_DMAC,\n \tNPC_SMAC,\n \tNPC_ETYPE,\n+\tNPC_VLAN_ETYPE_CTAG, /* 0x8100 */\n+\tNPC_VLAN_ETYPE_STAG, /* 0x88A8 */\n \tNPC_OUTER_VID,\n \tNPC_TOS,\n \tNPC_SIP_IPV4,\n@@ -2474,12 +2488,27 @@ struct flow_msg {\n \t\tuint32_t __io ip4dst;\n \t\tuint32_t __io ip6dst[4];\n \t};\n+\tunion {\n+\t\tuint32_t spi;\n+\t};\n \tuint8_t __io tos;\n \tuint8_t __io ip_ver;\n \tuint8_t __io ip_proto;\n \tuint8_t __io tc;\n \tuint16_t __io sport;\n \tuint16_t __io dport;\n+\tunion {\n+\t\tuint8_t __io ip_flag;\n+\t\tuint8_t __io next_header;\n+\t};\n+\tuint16_t __io vlan_itci;\n+\tuint8_t __io icmp_type;\n+\tuint8_t __io icmp_code;\n+\tuint16_t __io tcp_flags;\n+\tuint32_t __io gtpu_teid;\n+\tuint32_t __io gtpc_teid;\n+\tuint32_t __io mpls_lse[4];\n+\tuint16_t __io sq_id;\n };\n \n struct npc_install_flow_req {\n@@ -2489,6 +2518,7 @@ struct npc_install_flow_req {\n \tuint64_t __io features;\n \tuint16_t __io entry;\n \tuint16_t __io channel;\n+\tuint16_t __io chan_mask;\n \tuint8_t __io intf;\n \tuint8_t __io set_cntr;\n \tuint8_t __io default_rule;\n@@ -2511,6 +2541,8 @@ struct npc_install_flow_req {\n \tuint8_t __io vtag0_op;\n \tuint16_t __io vtag1_def;\n \tuint8_t __io vtag1_op;\n+\t/* old counter value */\n+\tuint16_t __io cntr_val;\n };\n \n struct npc_install_flow_rsp {\n@@ -2525,6 +2557,7 @@ struct npc_delete_flow_req {\n \tuint16_t __io start; /*Disable range of entries */\n \tuint16_t __io end;\n \tuint8_t __io all; /* PF + VFs */\n+\tuint16_t __io vf; /* Requesting VF */\n };\n \n struct npc_mcam_read_entry_req {\ndiff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c\nindex 9a0fe5f4e2..67a660a2bc 100644\n--- a/drivers/common/cnxk/roc_npc.c\n+++ b/drivers/common/cnxk/roc_npc.c\n@@ -77,8 +77,23 @@ roc_npc_inl_mcam_clear_counter(uint32_t ctr_id)\n }\n \n int\n-roc_npc_mcam_read_counter(struct roc_npc *roc_npc, uint32_t ctr_id,\n-\t\t\t uint64_t *count)\n+roc_npc_mcam_alloc_counter(struct roc_npc *roc_npc, uint16_t *ctr_id)\n+{\n+\tstruct npc *npc = roc_npc_to_npc_priv(roc_npc);\n+\n+\treturn npc_mcam_alloc_counter(npc->mbox, ctr_id);\n+}\n+\n+int\n+roc_npc_get_free_mcam_entry(struct roc_npc *roc_npc, struct roc_npc_flow *flow)\n+{\n+\tstruct npc *npc = roc_npc_to_npc_priv(roc_npc);\n+\n+\treturn npc_get_free_mcam_entry(npc->mbox, flow, npc);\n+}\n+\n+int\n+roc_npc_mcam_read_counter(struct roc_npc *roc_npc, uint32_t ctr_id, uint64_t *count)\n {\n \tstruct npc *npc = roc_npc_to_npc_priv(roc_npc);\n \n@@ -157,14 +172,13 @@ roc_npc_mcam_free_all_resources(struct roc_npc *roc_npc)\n }\n \n int\n-roc_npc_mcam_alloc_entries(struct roc_npc *roc_npc, int ref_entry,\n-\t\t\t int *alloc_entry, int req_count, int priority,\n-\t\t\t int *resp_count)\n+roc_npc_mcam_alloc_entries(struct roc_npc *roc_npc, int ref_entry, int *alloc_entry, int req_count,\n+\t\t\t int priority, int *resp_count, bool is_conti)\n {\n \tstruct npc *npc = roc_npc_to_npc_priv(roc_npc);\n \n \treturn npc_mcam_alloc_entries(npc->mbox, ref_entry, alloc_entry, req_count, priority,\n-\t\t\t\t resp_count, 0);\n+\t\t\t\t resp_count, is_conti);\n }\n \n int\ndiff --git a/drivers/common/cnxk/roc_npc.h b/drivers/common/cnxk/roc_npc.h\nindex e880a7fa67..349c7f9d22 100644\n--- a/drivers/common/cnxk/roc_npc.h\n+++ b/drivers/common/cnxk/roc_npc.h\n@@ -431,7 +431,8 @@ int __roc_api roc_npc_mcam_enable_all_entries(struct roc_npc *roc_npc, bool enab\n int __roc_api roc_npc_mcam_alloc_entry(struct roc_npc *roc_npc, struct roc_npc_flow *mcam,\n \t\t\t\t struct roc_npc_flow *ref_mcam, int prio, int *resp_count);\n int __roc_api roc_npc_mcam_alloc_entries(struct roc_npc *roc_npc, int ref_entry, int *alloc_entry,\n-\t\t\t\t\t int req_count, int priority, int *resp_count);\n+\t\t\t\t\t int req_count, int priority, int *resp_count,\n+\t\t\t\t\t bool is_conti);\n int __roc_api roc_npc_mcam_ena_dis_entry(struct roc_npc *roc_npc, struct roc_npc_flow *mcam,\n \t\t\t\t\t bool enable);\n int __roc_api roc_npc_mcam_write_entry(struct roc_npc *roc_npc, struct roc_npc_flow *mcam);\n@@ -442,6 +443,8 @@ int __roc_api roc_npc_get_low_priority_mcam(struct roc_npc *roc_npc);\n int __roc_api roc_npc_mcam_free_counter(struct roc_npc *roc_npc, uint16_t ctr_id);\n int __roc_api roc_npc_mcam_read_counter(struct roc_npc *roc_npc, uint32_t ctr_id, uint64_t *count);\n int __roc_api roc_npc_mcam_clear_counter(struct roc_npc *roc_npc, uint32_t ctr_id);\n+int __roc_api roc_npc_mcam_alloc_counter(struct roc_npc *roc_npc, uint16_t *ctr_id);\n+int __roc_api roc_npc_get_free_mcam_entry(struct roc_npc *roc_npc, struct roc_npc_flow *flow);\n int __roc_api roc_npc_inl_mcam_read_counter(uint32_t ctr_id, uint64_t *count);\n int __roc_api roc_npc_inl_mcam_clear_counter(uint32_t ctr_id);\n int __roc_api roc_npc_mcam_free_all_resources(struct roc_npc *roc_npc);\ndiff --git a/drivers/common/cnxk/roc_npc_mcam.c b/drivers/common/cnxk/roc_npc_mcam.c\nindex 3ef189e184..2de988a44b 100644\n--- a/drivers/common/cnxk/roc_npc_mcam.c\n+++ b/drivers/common/cnxk/roc_npc_mcam.c\n@@ -4,7 +4,7 @@\n #include \"roc_api.h\"\n #include \"roc_priv.h\"\n \n-static int\n+int\n npc_mcam_alloc_counter(struct mbox *mbox, uint16_t *ctr)\n {\n \tstruct npc_mcam_alloc_counter_req *req;\ndiff --git a/drivers/common/cnxk/roc_npc_priv.h b/drivers/common/cnxk/roc_npc_priv.h\nindex c0809407a6..50b62b1244 100644\n--- a/drivers/common/cnxk/roc_npc_priv.h\n+++ b/drivers/common/cnxk/roc_npc_priv.h\n@@ -432,6 +432,7 @@ roc_npc_to_npc_priv(struct roc_npc *npc)\n \treturn (struct npc *)npc->reserved;\n }\n \n+int npc_mcam_alloc_counter(struct mbox *mbox, uint16_t *ctr);\n int npc_mcam_free_counter(struct mbox *mbox, uint16_t ctr_id);\n int npc_mcam_read_counter(struct mbox *mbox, uint32_t ctr_id, uint64_t *count);\n int npc_mcam_clear_counter(struct mbox *mbox, uint32_t ctr_id);\n@@ -480,7 +481,6 @@ uint64_t npc_get_kex_capability(struct npc *npc);\n int npc_process_ipv6_field_hash(const struct roc_npc_flow_item_ipv6 *ipv6_spec,\n \t\t\t\tconst struct roc_npc_flow_item_ipv6 *ipv6_mask,\n \t\t\t\tstruct npc_parse_state *pst, uint8_t type);\n-int npc_rss_free_grp_get(struct npc *npc, uint32_t *grp);\n int npc_rss_action_configure(struct roc_npc *roc_npc, const struct roc_npc_action_rss *rss,\n \t\t\t uint8_t *alg_idx, uint32_t *rss_grp, uint32_t mcam_id);\n int npc_rss_action_program(struct roc_npc *roc_npc, const struct roc_npc_action actions[],\n@@ -496,4 +496,5 @@ void npc_aged_flows_bitmap_free(struct roc_npc *roc_npc);\n int npc_aging_ctrl_thread_create(struct roc_npc *roc_npc, const struct roc_npc_action_age *age,\n \t\t\t\t struct roc_npc_flow *flow);\n void npc_aging_ctrl_thread_destroy(struct roc_npc *roc_npc);\n+int npc_rss_free_grp_get(struct npc *npc, uint32_t *pos);\n #endif /* _ROC_NPC_PRIV_H_ */\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 9bea7af6f4..b509c28b86 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -87,6 +87,10 @@ INTERNAL {\n \troc_dpi_disable;\n \troc_dpi_enable;\n \troc_error_msg_get;\n+\troc_eswitch_npc_mcam_delete_rule;\n+\troc_eswitch_npc_mcam_rx_rule;\n+\troc_eswitch_npc_mcam_tx_rule;\n+\troc_eswitch_npc_rss_action_configure;\n \troc_hash_md5_gen;\n \troc_hash_sha1_gen;\n \troc_hash_sha256_gen;\n@@ -446,6 +450,7 @@ INTERNAL {\n \troc_npc_flow_dump;\n \troc_npc_flow_mcam_dump;\n \troc_npc_flow_parse;\n+\troc_npc_get_free_mcam_entry;\n \troc_npc_get_low_priority_mcam;\n \troc_npc_init;\n \troc_npc_kex_capa_get;\n@@ -453,6 +458,7 @@ INTERNAL {\n \troc_npc_mark_actions_sub_return;\n \troc_npc_vtag_actions_get;\n \troc_npc_vtag_actions_sub_return;\n+\troc_npc_mcam_alloc_counter;\n \troc_npc_mcam_alloc_entries;\n \troc_npc_mcam_alloc_entry;\n \troc_npc_mcam_clear_counter;\n", "prefixes": [ "v5", "06/23" ] }